VirtualBox

source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c@ 65926

Last change on this file since 65926 was 65926, checked in by vboxsync, 8 years ago

IEM: Started on generating tests from instruction specs.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 8.5 KB
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1/* $Id: bs3-cpu-generated-1-template.c 65926 2017-03-03 11:00:27Z vboxsync $ */
2/** @file
3 * BS3Kit - bs3-cpu-generated-1, C code template.
4 */
5
6/*
7 * Copyright (C) 2007-2017 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * The contents of this file may alternatively be used under the terms
18 * of the Common Development and Distribution License Version 1.0
19 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20 * VirtualBox OSE distribution, in which case the provisions of the
21 * CDDL are applicable instead of those of the GPL.
22 *
23 * You may elect to license modified versions of this file under the
24 * terms and conditions of either the GPL or the CDDL or both.
25 */
26
27#ifndef BS3_INSTANTIATING_CMN
28# error "BS3_INSTANTIATING_CMN not defined"
29#endif
30
31
32/*********************************************************************************************************************************
33* Header Files *
34*********************************************************************************************************************************/
35#include <iprt/asm.h>
36#include <iprt/asm-amd64-x86.h>
37
38#include "bs3-cpu-generated-1.h"
39
40
41/*********************************************************************************************************************************
42* Structures and Typedefs *
43*********************************************************************************************************************************/
44/**
45 * The state.
46 */
47typedef struct BS3CG1STATE
48{
49 /** @name Instruction details (expanded from BS3CG1INSTR).
50 * @{ */
51 /** Pointer to the mnemonic string (not terminated) (g_achBs3Cg1Mnemonics). */
52 const char BS3_FAR *pchMnemonic;
53 /** Pointer to the test header. */
54 PCBS3CG1TESTHDR pTestHdr;
55 /** Pointer to the per operand flags (g_abBs3Cg1Operands). */
56 const uint8_t BS3_FAR *pabOperands;
57 /** Opcode bytes (g_abBs3Cg1Opcodes). */
58 const uint8_t BS3_FAR *pabOpcodes;
59
60 /** The instruction flags. */
61 uint32_t fFlags;
62 /** The encoding. */
63 BS3CG1ENC enmEncoding;
64#if ARCH_BITS == 16
65 uint16_t u16Padding0;
66#endif
67 /** Per operand flags. */
68 BS3CG1OP aenmOperands[4];
69 /** Opcode bytes. */
70 uint8_t abOpcodes[4];
71
72 /** The length of the mnemonic. */
73 uint8_t cchMnemonic;
74 /** Whether to advance the mnemonic pointer or not. */
75 uint8_t fAdvanceMnemonic;
76 /** The number of opcode bytes. */
77 uint8_t cbOpcode;
78 /** Number of operands. */
79 uint8_t cOperands;
80 /** @} */
81
82 /** Operand size (16, 32, 64, or 0). */
83 uint8_t cBitsOp;
84 /** Target ring (0..3). */
85 uint8_t uCpl;
86
87 /** Target mode (g_bBs3CurrentMode). */
88 uint8_t bMode;
89
90 uint8_t abPadding1[2];
91
92 /** Page to put code in. When paging is enabled, the page before and after
93 * are marked not-present. */
94 uint8_t BS3_FAR *pbCodePg;
95 /** Page for placing data operands in. When paging is enabled, the page before
96 * and after are marked not-present. */
97 uint8_t BS3_FAR *pbDataPg;
98
99 /** The context we're working on. */
100 BS3REGCTX Ctx;
101 /** The trap context and frame. */
102 BS3TRAPFRAME TrapFrame;
103 /** Initial contexts, one for each ring. */
104 BS3REGCTX aInitialCtxs[4];
105
106 /** Memory operand scratch space. */
107 union
108 {
109 uint8_t ab[128];
110 uint16_t au16[128 / sizeof(uint16_t)];
111 uint32_t au32[128 / sizeof(uint32_t)];
112 uint64_t au64[128 / sizeof(uint64_t)];
113 } MemOp;
114} BS3CG1STATE;
115
116
117
118BS3_DECL_FAR(uint8_t) BS3_CMN_NM(bs3CpuInstr2_mul)(uint8_t bMode)
119{
120 BS3CG1STATE This;
121 unsigned const iFirstRing = BS3_MODE_IS_V86(bMode) ? 3 : 0;
122 unsigned const cRings = BS3_MODE_IS_RM_OR_V86(bMode) ? 1 : 4;
123 unsigned iRing;
124 unsigned iInstr;
125 BS3MEMKIND const enmMemKind = BS3_MODE_IS_RM_OR_V86(bMode) ? BS3MEMKIND_REAL
126 : BS3_MODE_IS_16BIT_CODE(bMode) ? BS3MEMKIND_TILED : BS3MEMKIND_FLAT32;
127
128 /*
129 * Initalize the state.
130 */
131 Bs3MemSet(&This, 0, sizeof(This));
132
133 This.bMode = bMode;
134 This.pchMnemonic = g_achBs3Cg1Mnemonics;
135 This.pabOperands = g_abBs3Cg1Operands;
136 This.pabOpcodes = g_abBs3Cg1Opcodes;
137
138 /* Allocate guarded exectuable and data memory. */
139 if (BS3_MODE_IS_PAGED(bMode))
140 {
141 This.pbCodePg = Bs3MemGuardedTestPageAlloc(enmMemKind);
142 if (This.pbCodePg)
143 {
144 Bs3TestFailedF("First Bs3MemGuardedTestPageAlloc(%d) failed", enmMemKind);
145 return 0;
146 }
147 This.pbDataPg = Bs3MemGuardedTestPageAlloc(enmMemKind);
148 if (!This.pbDataPg)
149 {
150 Bs3MemGuardedTestPageFree(This.pbCodePg);
151 Bs3TestFailedF("Second Bs3MemGuardedTestPageAlloc(%d) failed", enmMemKind);
152 return 0;
153 }
154 }
155 else
156 {
157 This.pbCodePg = Bs3MemAlloc(enmMemKind, X86_PAGE_SIZE);
158 if (!This.pbCodePg)
159 {
160 Bs3TestFailedF("First Bs3MemAlloc(%d,Pg) failed", enmMemKind);
161 return 0;
162 }
163 This.pbDataPg = Bs3MemAlloc(enmMemKind, X86_PAGE_SIZE);
164 if (!This.pbDataPg)
165 {
166 Bs3MemFree(This.pbCodePg, X86_PAGE_SIZE);
167 Bs3TestFailedF("Second Bs3MemAlloc(%d,Pg) failed", enmMemKind);
168 return 0;
169 }
170 }
171
172 Bs3RegCtxSaveEx(&This.aInitialCtxs[iFirstRing], bMode, 512);
173 for (iRing = iFirstRing + 1; iRing < cRings; iRing++)
174 Bs3RegCtxConvertToRingX(&This.aInitialCtxs[iFirstRing], iRing);
175
176 /*
177 * Test the instructions.
178 */
179 for (iInstr = 0; iInstr < g_cBs3Cg1Instructions;
180 iInstr++,
181 This.pchMnemonic += This.fAdvanceMnemonic * This.cchMnemonic,
182 This.pabOperands += This.cOperands,
183 This.pabOpcodes += This.cbOpcode )
184 {
185 unsigned iEncoding;
186
187 /*
188 * Expand the instruction information into the state.
189 * Note! 16-bit will switch to a two level test header lookup once we exceed 64KB.
190 */
191 PCBS3CG1INSTR pInstr = &g_aBs3Cg1Instructions[iInstr];
192 This.pTestHdr = (PCBS3CG1TESTHDR)&g_abBs3Cg1Tests[pInstr->offTests];
193 This.fFlags = pInstr->fFlags;
194 This.enmEncoding = (BS3CG1ENC)pInstr->enmEncoding;
195 This.cchMnemonic = pInstr->cchMnemonic;
196 This.fAdvanceMnemonic= pInstr->fAdvanceMnemonic;
197 This.cOperands = pInstr->cOperands;
198 This.cbOpcode = pInstr->cbOpcode;
199 switch (This.cOperands)
200 {
201 case 3: This.aenmOperands[3] = (BS3CG1OP)This.pabOperands[3];
202 case 2: This.aenmOperands[2] = (BS3CG1OP)This.pabOperands[2];
203 case 1: This.aenmOperands[1] = (BS3CG1OP)This.pabOperands[1];
204 case 0: This.aenmOperands[0] = (BS3CG1OP)This.pabOperands[0];
205 }
206
207 switch (This.cbOpcode)
208 {
209 case 3: This.abOpcodes[3] = This.pabOpcodes[3];
210 case 2: This.abOpcodes[2] = This.pabOpcodes[2];
211 case 1: This.abOpcodes[1] = This.pabOpcodes[1];
212 case 0: This.abOpcodes[0] = This.pabOpcodes[0];
213 }
214
215 if (This.enmEncoding <= BS3CG1ENC_INVALID || This.enmEncoding >= BS3CG1ENC_END)
216 {
217 Bs3TestFailedF("Invalid enmEncoding for instruction #%u (%.*s): %d",
218 iInstr, This.cchMnemonic, This.pchMnemonic, This.enmEncoding);
219 continue;
220 }
221
222 /*
223 * Encode the instruction in various ways and check out the test values.
224 */
225 for (iEncoding = 0; ; iEncoding++)
226 {
227 //switch (This.enmEncoding)
228 //{
229 //
230 //}
231
232
233 /*
234 * Run the tests.
235 */
236
237 }
238
239 }
240
241 return 0;
242}
243
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