| 1 | /* $Id: bs3-cpu-generated-1.h 65903 2017-02-28 15:25:30Z vboxsync $ */
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| 2 | /** @file
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| 3 | * BS3Kit - bs3-cpu-generated-1, common header file.
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| 4 | */
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| 5 |
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| 6 | /*
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| 7 | * Copyright (C) 2007-2016 Oracle Corporation
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| 8 | *
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| 9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | * available from http://www.virtualbox.org. This file is free software;
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| 11 | * you can redistribute it and/or modify it under the terms of the GNU
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| 12 | * General Public License (GPL) as published by the Free Software
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| 13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | *
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| 17 | * The contents of this file may alternatively be used under the terms
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| 18 | * of the Common Development and Distribution License Version 1.0
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| 19 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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| 20 | * VirtualBox OSE distribution, in which case the provisions of the
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| 21 | * CDDL are applicable instead of those of the GPL.
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| 22 | *
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| 23 | * You may elect to license modified versions of this file under the
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| 24 | * terms and conditions of either the GPL or the CDDL or both.
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| 25 | */
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| 26 |
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| 27 |
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| 28 | #ifndef ___bs3_cpu_generated_1_h___
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| 29 | #define ___bs3_cpu_generated_1_h___
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| 30 |
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| 31 | #include <bs3kit.h>
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| 32 | #include <iprt/assert.h>
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| 33 |
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| 34 |
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| 35 |
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| 36 | /** Instruction encoding format. */
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| 37 | typedef enum BS3CG1ENC
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| 38 | {
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| 39 | BS3CG1ENC_INVALID = 0,
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| 40 | BS3CG1ENC_FIXED,
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| 41 | BS3CG1ENC_MODRM,
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| 42 | BS3CG1ENC_END
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| 43 | } BS3CG1ENC;
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| 44 |
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| 45 |
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| 46 | /**
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| 47 | * Operand details.
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| 48 | *
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| 49 | * Currently simply using the encoding from the reference manuals.
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| 50 | */
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| 51 | typedef enum BS3CG1OP
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| 52 | {
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| 53 | BS3CG1OP_INVALID = 0,
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| 54 |
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| 55 | BS3CG1OP_Eb,
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| 56 | BS3CG1OP_Ev,
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| 57 |
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| 58 | BS3CG1OP_Gb,
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| 59 | BS3CG1OP_Gv,
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| 60 |
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| 61 | BS3CG1OP_END
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| 62 | } BS3CG1OP;
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| 63 |
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| 64 |
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| 65 | /**
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| 66 | * Generated instruction info.
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| 67 | */
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| 68 | typedef struct BS3CG1INSTR
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| 69 | {
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| 70 | /** Opcode bytes. */
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| 71 | uint8_t abOpcode[4];
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| 72 | /** BS3CG1OP values for each operand. */
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| 73 | uint8_t aenmOperands[4];
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| 74 | /** The opcode size. */
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| 75 | uint32_t cbOpcode : 2;
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| 76 | /** The number of operands. */
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| 77 | uint32_t cOperands : 2;
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| 78 | /** BS3CG1ENC values. */
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| 79 | uint32_t enmEncoding : 5;
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| 80 | /** The length of the mnemonic. */
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| 81 | uint32_t cchMnemonic : 4;
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| 82 | /** Index of the test header into g_aBs3Cg1Tests */
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| 83 | uint32_t idxTestHdr : 19;
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| 84 | /** BS3CG1INSTR_F_XXX. */
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| 85 | uint32_t fFlags;
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| 86 | } BS3CG1INSTR;
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| 87 | AssertCompileSize(BS3CG1INSTR, 16);
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| 88 | /** Pointer to a const instruction. */
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| 89 | typedef BS3CG1INSTR const BS3_FAR *PCBS3CG1INSTR;
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| 90 |
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| 91 |
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| 92 | /** @name BS3CG1INSTR_F_XXX
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| 93 | * @{ */
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| 94 | #define BS3CG1INSTR_F_ UINT32_C(0x00000000)
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| 95 | /** @} */
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| 96 |
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| 97 |
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| 98 | /**
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| 99 | * Test header.
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| 100 | */
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| 101 | typedef struct BS3CG1TESTHDR
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| 102 | {
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| 103 | /** The size of the selector program in bytes.
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| 104 | * This is also the offset of the input context modification program. */
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| 105 | uint32_t cbSelector : 9;
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| 106 | /** The size of the input context modification program in bytes.
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| 107 | * This immediately follows the selector program. */
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| 108 | uint32_t cbInput : 11;
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| 109 | /** The size of the output context modification program in bytes.
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| 110 | * This immediately follows the input context modification program. The
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| 111 | * program takes the result of the input program as starting point. */
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| 112 | uint32_t cbOutput : 11;
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| 113 | /** Indicates whether this is the last test or not. */
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| 114 | uint32_t fLast : 1;
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| 115 | } BS3CG1TESTHDR;
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| 116 | AssertCompileSize(BS3CG1TESTHDR, 4);
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| 117 | /** Pointer to a const test header. */
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| 118 | typedef BS3CG1TESTHDR const BS3_FAR *PCBS3CG1TESTHDR;
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| 119 |
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| 120 | /** @name Opcode format for the BS3CG1 context modifier.
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| 121 | *
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| 122 | * Used by both the input and output context programs.
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| 123 | *
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| 124 | * The most common operations are encoded as a single byte opcode followed by
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| 125 | * one or more immediate bytes with data.
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| 126 | *
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| 127 | * @{ */
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| 128 | #define BS3CG1_CTXOP_SIZE_MASK UINT8_C(0x07)
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| 129 | #define BS3CG1_CTXOP_1_BYTE UINT8_C(0x00)
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| 130 | #define BS3CG1_CTXOP_2_BYTE UINT8_C(0x01)
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| 131 | #define BS3CG1_CTXOP_4_BYTE UINT8_C(0x02)
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| 132 | #define BS3CG1_CTXOP_8_BYTE UINT8_C(0x03)
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| 133 | #define BS3CG1_CTXOP_16_BYTE UINT8_C(0x04)
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| 134 | #define BS3CG1_CTXOP_32_BYTE UINT8_C(0x05)
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| 135 | #define BS3CG1_CTXOP_12_BYTE UINT8_C(0x06)
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| 136 | #define BS3CG1_CTXOP_SIZE_ESC UINT8_C(0x07) /**< Separate byte encoding the value size follows immediately. */
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| 137 |
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| 138 | #define BS3CG1_CTXOP_DST_MASK UINT8_C(0x18)
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| 139 | #define BS3CG1_CTXOP_OP1 UINT8_C(0x00)
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| 140 | #define BS3CG1_CTXOP_OP2 UINT8_C(0x08)
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| 141 | #define BS3CG1_CTXOP_EFL UINT8_C(0x10)
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| 142 | #define BS3CG1_CTXOP_DST_ESC UINT8_C(0x18) /**< Separate byte giving the destination follows after any size byte.*/
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| 143 |
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| 144 | #define BS3CG1_CTXOP_SIGN_EXT UINT8_C(0x20) /**< Whether to sign-extend (set) the immediate value. */
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| 145 |
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| 146 | #define BS3CG1_CTXOP_OPERATOR_MASK UINT8_C(0xc0)
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| 147 | #define BS3CG1_CTXOP_ASSIGN UINT8_C(0x00) /**< Simple assignment operator (=) */
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| 148 | #define BS3CG1_CTXOP_OR UINT8_C(0x40) /**< OR assignment operator (|=). */
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| 149 | #define BS3CG1_CTXOP_AND UINT8_C(0x80) /**< AND assignment operator (&=). */
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| 150 | #define BS3CG1_CTXOP_AND_INV UINT8_C(0xc0) /**< AND assignment operator of the inverted value (&~=). */
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| 151 | /** @} */
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| 152 |
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| 153 | /**
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| 154 | * Escaped destination values
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| 155 | *
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| 156 | * These are just uppercased versions of TestInOut.kdFields, where dots are
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| 157 | * replaced by underscores.
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| 158 | */
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| 159 | enum BS3CG1DST
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| 160 | {
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| 161 | BS3CG1DST_INVALID = 0,
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| 162 | /* Operands. */
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| 163 | BS3CG1DST_OP1,
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| 164 | BS3CG1DST_OP2,
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| 165 | BS3CG1DST_OP3,
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| 166 | BS3CG1DST_OP4,
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| 167 | /* Flags. */
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| 168 | BS3CG1DST_EFL,
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| 169 | /* 8-bit GPRs. */
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| 170 | BS3CG1DST_AL,
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| 171 | BS3CG1DST_CL,
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| 172 | BS3CG1DST_DL,
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| 173 | BS3CG1DST_BL,
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| 174 | BS3CG1DST_AH,
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| 175 | BS3CG1DST_CH,
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| 176 | BS3CG1DST_DH,
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| 177 | BS3CG1DST_BH,
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| 178 | BS3CG1DST_R8L,
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| 179 | BS3CG1DST_R9L,
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| 180 | BS3CG1DST_R10L,
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| 181 | BS3CG1DST_R11L,
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| 182 | BS3CG1DST_R12L,
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| 183 | BS3CG1DST_R13L,
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| 184 | BS3CG1DST_R14L,
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| 185 | BS3CG1DST_R15L,
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| 186 | /* 16-bit GPRs. */
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| 187 | BS3CG1DST_AX,
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| 188 | BS3CG1DST_DX,
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| 189 | BS3CG1DST_CX,
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| 190 | BS3CG1DST_BX,
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| 191 | BS3CG1DST_SP,
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| 192 | BS3CG1DST_BP,
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| 193 | BS3CG1DST_SI,
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| 194 | BS3CG1DST_DI,
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| 195 | BS3CG1DST_R8W,
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| 196 | BS3CG1DST_R9W,
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| 197 | BS3CG1DST_R10W,
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| 198 | BS3CG1DST_R11W,
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| 199 | BS3CG1DST_R12W,
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| 200 | BS3CG1DST_R13W,
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| 201 | BS3CG1DST_R14W,
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| 202 | BS3CG1DST_R15W,
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| 203 | /* 32-bit GPRs. */
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| 204 | BS3CG1DST_EAX,
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| 205 | BS3CG1DST_EDX,
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| 206 | BS3CG1DST_ECX,
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| 207 | BS3CG1DST_EBX,
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| 208 | BS3CG1DST_ESP,
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| 209 | BS3CG1DST_EBP,
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| 210 | BS3CG1DST_ESI,
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| 211 | BS3CG1DST_EDI,
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| 212 | BS3CG1DST_R8D,
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| 213 | BS3CG1DST_R9D,
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| 214 | BS3CG1DST_R10D,
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| 215 | BS3CG1DST_R11D,
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| 216 | BS3CG1DST_R12D,
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| 217 | BS3CG1DST_R13D,
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| 218 | BS3CG1DST_R14D,
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| 219 | BS3CG1DST_R15D,
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| 220 | /* 64-bit GPRs. */
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| 221 | BS3CG1DST_RAX,
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| 222 | BS3CG1DST_RDX,
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| 223 | BS3CG1DST_RCX,
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| 224 | BS3CG1DST_RBX,
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| 225 | BS3CG1DST_RSP,
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| 226 | BS3CG1DST_RBP,
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| 227 | BS3CG1DST_RSI,
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| 228 | BS3CG1DST_RDI,
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| 229 | BS3CG1DST_R8,
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| 230 | BS3CG1DST_R9,
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| 231 | BS3CG1DST_R10,
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| 232 | BS3CG1DST_R11,
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| 233 | BS3CG1DST_R12,
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| 234 | BS3CG1DST_R13,
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| 235 | BS3CG1DST_R14,
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| 236 | BS3CG1DST_R15,
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| 237 | /* 16-bit, 32-bit or 64-bit registers according to operand size. */
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| 238 | BS3CG1DST_OZ_RAX,
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| 239 | BS3CG1DST_OZ_RDX,
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| 240 | BS3CG1DST_OZ_RCX,
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| 241 | BS3CG1DST_OZ_RBX,
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| 242 | BS3CG1DST_OZ_RSP,
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| 243 | BS3CG1DST_OZ_RBP,
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| 244 | BS3CG1DST_OZ_RSI,
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| 245 | BS3CG1DST_OZ_RDI,
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| 246 | BS3CG1DST_OZ_R8,
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| 247 | BS3CG1DST_OZ_R9,
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| 248 | BS3CG1DST_OZ_R10,
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| 249 | BS3CG1DST_OZ_R11,
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| 250 | BS3CG1DST_OZ_R12,
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| 251 | BS3CG1DST_OZ_R13,
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| 252 | BS3CG1DST_OZ_R14,
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| 253 | BS3CG1DST_OZ_R15,
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| 254 |
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| 255 | BS3CG1DST_END
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| 256 | } BS3CG1DST;
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| 257 |
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| 258 | /** @name Selector opcode definitions.
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| 259 | *
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| 260 | * Selector programs are very simple, they are zero or more predicate tests
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| 261 | * that are ANDed together. If a predicate test fails, the test is skipped.
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| 262 | *
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| 263 | * One instruction is encoded as byte, where the first bit indicates what kind
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| 264 | * of test and the 7 remaining bits indicates which predicate to check.
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| 265 | *
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| 266 | * @{ */
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| 267 | #define BS3CG1SEL_OP_KIND_MASK UINT8_C(0x01) /**< The operator part (put in lower bit to reduce switch value range). */
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| 268 | #define BS3CG1SEL_OP_IS_TRUE UINT8_C(0x00) /**< Check that the predicate is true. */
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| 269 | #define BS3CG1SEL_OP_IS_FALSE UINT8_C(0x01) /**< Check that the predicate is false. */
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| 270 | #define BS3CG1SEL_OP_PRED_SHIFT 1 /**< Shift factor for getting/putting a BS3CG1PRED value into/from a byte. */
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| 271 | /** @} */
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| 272 |
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| 273 | /**
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| 274 | * Test selector predicates (values are shifted by BS3CG1SEL_OP_PRED_SHIFT).
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| 275 | */
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| 276 | typedef enum BS3CG1PRED
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| 277 | {
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| 278 | BS3CG1PRED_INVALID = 0,
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| 279 |
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| 280 | /* Operand size. */
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| 281 | BS3CG1PRED_SIZE_O16,
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| 282 | BS3CG1PRED_SIZE_O32,
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| 283 | BS3CG1PRED_SIZE_O64,
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| 284 | /* Execution ring. */
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| 285 | BS3CG1PRED_RING_0,
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| 286 | BS3CG1PRED_RING_1,
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| 287 | BS3CG1PRED_RING_2,
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| 288 | BS3CG1PRED_RING_3,
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| 289 | BS3CG1PRED_RING_0_THRU_2,
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| 290 | BS3CG1PRED_RING_1_THRU_3,
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| 291 | /* Basic code mode. */
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| 292 | BS3CG1PRED_CODE_64BIT,
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| 293 | BS3CG1PRED_CODE_32BIT,
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| 294 | BS3CG1PRED_CODE_16BIT,
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| 295 | /* CPU modes. */
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| 296 | BS3CG1PRED_MODE_REAL,
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| 297 | BS3CG1PRED_MODE_PROT,
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| 298 | BS3CG1PRED_MODE_LONG,
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| 299 | BS3CG1PRED_MODE_V86,
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| 300 | BS3CG1PRED_MODE_SMM,
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| 301 | BS3CG1PRED_MODE_VMX,
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| 302 | BS3CG1PRED_MODE_SVM,
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| 303 | /* Paging on/off */
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| 304 | BS3CG1PRED_PAGING_ON,
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| 305 | BS3CG1PRED_PAGING_OFF,
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| 306 |
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| 307 | BS3CG1PRED_END
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| 308 | } BS3CG1PRED;
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| 309 |
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| 310 |
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| 311 | /** The number of test instructions (generated). */
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| 312 | extern uint16_t BS3_FAR_DATA g_cBs3Cg1Instructions;
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| 313 | /** The test instructions (generated). */
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| 314 | extern const char BS3_FAR_DATA g_aBs3Cg1Instructions[];
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| 315 | /** The test data that BS3CG1INSTR. */
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| 316 | extern BS3CG1TESTHDR BS3_FAR_DATA g_aBs3Cg1Tests[];
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| 317 | /** The mnemonics (generated).
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| 318 | * Variable length sequence of mnemonics that runs in parallel to
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| 319 | * g_aBs3Cg1Instructions. */
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| 320 | extern const char BS3_FAR_DATA g_achBs3Cg1Mnemonics[];
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| 321 |
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| 322 |
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| 323 | #endif
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| 324 |
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