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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h@ 66058

Last change on this file since 66058 was 66055, checked in by vboxsync, 8 years ago

bs3-cpu-generated-1: updates.
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1/* $Id: bs3-cpu-generated-1.h 66055 2017-03-10 21:00:14Z vboxsync $ */
2/** @file
3 * BS3Kit - bs3-cpu-generated-1, common header file.
4 */
5
6/*
7 * Copyright (C) 2007-2016 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * The contents of this file may alternatively be used under the terms
18 * of the Common Development and Distribution License Version 1.0
19 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20 * VirtualBox OSE distribution, in which case the provisions of the
21 * CDDL are applicable instead of those of the GPL.
22 *
23 * You may elect to license modified versions of this file under the
24 * terms and conditions of either the GPL or the CDDL or both.
25 */
26
27
28#ifndef ___bs3_cpu_generated_1_h___
29#define ___bs3_cpu_generated_1_h___
30
31#include <bs3kit.h>
32#include <iprt/assert.h>
33
34
35/**
36 * Operand details.
37 *
38 * Currently simply using the encoding from the reference manuals.
39 */
40typedef enum BS3CG1OP
41{
42 BS3CG1OP_INVALID = 0,
43
44 BS3CG1OP_Eb,
45 BS3CG1OP_Ev,
46
47 BS3CG1OP_Gb,
48 BS3CG1OP_Gv,
49
50 BS3CG1OP_Ib,
51 BS3CG1OP_Iz,
52
53 BS3CG1OP_AL,
54 BS3CG1OP_rAX,
55
56 BS3CG1OP_END
57} BS3CG1OP;
58/** Pointer to a const operand enum. */
59typedef const BS3CG1OP BS3_FAR *PCBS3CG1OP;
60
61
62/**
63 * Instruction encoding format.
64 *
65 * This duplicates some of the info in the operand array, however it makes it
66 * easier to figure out encoding variations.
67 */
68typedef enum BS3CG1ENC
69{
70 BS3CG1ENC_INVALID = 0,
71
72 BS3CG1ENC_MODRM_Eb_Gb,
73 BS3CG1ENC_MODRM_Ev_Gv,
74
75 BS3CG1ENC_FIXED_AL_Ib,
76 BS3CG1ENC_FIXED_rAX_Iz,
77
78 BS3CG1ENC_END
79} BS3CG1ENC;
80
81
82/**
83 * Prefix sensitivitiy kind.
84 */
85typedef enum BS3CGPFXKIND
86{
87 BS3CGPFXKIND_INVALID = 0,
88
89 BS3CGPFXKIND_MODRM,
90 BS3CGPFXKIND_MODRM_NO_OP_SIZES,
91
92 BS3CGPFXKIND_END
93} BS3CGPFXKIND;
94
95
96/**
97 * Generated instruction info.
98 */
99typedef struct BS3CG1INSTR
100{
101 /** The opcode size. */
102 uint32_t cbOpcodes : 2;
103 /** The number of operands. */
104 uint32_t cOperands : 2;
105 /** The length of the mnemonic. */
106 uint32_t cchMnemonic : 3;
107 /** Whether to advance the mnemonic array pointer. */
108 uint32_t fAdvanceMnemonic : 1;
109 /** Offset into g_abBs3Cg1Tests of the first test. */
110 uint32_t offTests : 23;
111 /** BS3CG1ENC values. */
112 uint32_t enmEncoding : 10;
113 /** BS3CGPFXKIND values. */
114 uint32_t enmPrefixKind : 4;
115 /** Currently unused bits. */
116 uint32_t uUnused : 18;
117 /** BS3CG1INSTR_F_XXX. */
118 uint32_t fFlags;
119} BS3CG1INSTR;
120AssertCompileSize(BS3CG1INSTR, 12);
121/** Pointer to a const instruction. */
122typedef BS3CG1INSTR const BS3_FAR *PCBS3CG1INSTR;
123
124
125/** @name BS3CG1INSTR_F_XXX
126 * @{ */
127/** Defaults to SS rather than DS. */
128#define BS3CG1INSTR_F_DEF_SS UINT32_C(0x00000001)
129/** @} */
130
131
132/**
133 * Test header.
134 */
135typedef struct BS3CG1TESTHDR
136{
137 /** The size of the selector program in bytes.
138 * This is also the offset of the input context modification program. */
139 uint32_t cbSelector : 8;
140 /** The size of the input context modification program in bytes.
141 * This immediately follows the selector program. */
142 uint32_t cbInput : 12;
143 /** The size of the output context modification program in bytes.
144 * This immediately follows the input context modification program. The
145 * program takes the result of the input program as starting point. */
146 uint32_t cbOutput : 11;
147 /** Indicates whether this is the last test or not. */
148 uint32_t fLast : 1;
149} BS3CG1TESTHDR;
150AssertCompileSize(BS3CG1TESTHDR, 4);
151/** Pointer to a const test header. */
152typedef BS3CG1TESTHDR const BS3_FAR *PCBS3CG1TESTHDR;
153
154/** @name Opcode format for the BS3CG1 context modifier.
155 *
156 * Used by both the input and output context programs.
157 *
158 * The most common operations are encoded as a single byte opcode followed by
159 * one or more immediate bytes with data.
160 *
161 * @{ */
162#define BS3CG1_CTXOP_SIZE_MASK UINT8_C(0x07)
163#define BS3CG1_CTXOP_1_BYTE UINT8_C(0x00)
164#define BS3CG1_CTXOP_2_BYTES UINT8_C(0x01)
165#define BS3CG1_CTXOP_4_BYTES UINT8_C(0x02)
166#define BS3CG1_CTXOP_8_BYTES UINT8_C(0x03)
167#define BS3CG1_CTXOP_16_BYTES UINT8_C(0x04)
168#define BS3CG1_CTXOP_32_BYTES UINT8_C(0x05)
169#define BS3CG1_CTXOP_12_BYTES UINT8_C(0x06)
170#define BS3CG1_CTXOP_SIZE_ESC UINT8_C(0x07) /**< Separate byte encoding the value size following any destination escape byte. */
171
172#define BS3CG1_CTXOP_DST_MASK UINT8_C(0x18)
173#define BS3CG1_CTXOP_OP1 UINT8_C(0x00)
174#define BS3CG1_CTXOP_OP2 UINT8_C(0x08)
175#define BS3CG1_CTXOP_EFL UINT8_C(0x10)
176#define BS3CG1_CTXOP_DST_ESC UINT8_C(0x18) /**< Separate byte giving the destination follows immediately. */
177
178#define BS3CG1_CTXOP_SIGN_EXT UINT8_C(0x20) /**< Whether to sign-extend (set) the immediate value. */
179
180#define BS3CG1_CTXOP_OPERATOR_MASK UINT8_C(0xc0)
181#define BS3CG1_CTXOP_ASSIGN UINT8_C(0x00) /**< Simple assignment operator (=) */
182#define BS3CG1_CTXOP_OR UINT8_C(0x40) /**< OR assignment operator (|=). */
183#define BS3CG1_CTXOP_AND UINT8_C(0x80) /**< AND assignment operator (&=). */
184#define BS3CG1_CTXOP_AND_INV UINT8_C(0xc0) /**< AND assignment operator of the inverted value (&~=). */
185/** @} */
186
187/**
188 * Escaped destination values
189 *
190 * These are just uppercased versions of TestInOut.kdFields, where dots are
191 * replaced by underscores.
192 */
193typedef enum BS3CG1DST
194{
195 BS3CG1DST_INVALID = 0,
196 /* Operands. */
197 BS3CG1DST_OP1,
198 BS3CG1DST_OP2,
199 BS3CG1DST_OP3,
200 BS3CG1DST_OP4,
201 /* Flags. */
202 BS3CG1DST_EFL,
203 /* 8-bit GPRs. */
204 BS3CG1DST_AL,
205 BS3CG1DST_CL,
206 BS3CG1DST_DL,
207 BS3CG1DST_BL,
208 BS3CG1DST_AH,
209 BS3CG1DST_CH,
210 BS3CG1DST_DH,
211 BS3CG1DST_BH,
212 BS3CG1DST_SPL,
213 BS3CG1DST_BPL,
214 BS3CG1DST_SIL,
215 BS3CG1DST_DIL,
216 BS3CG1DST_R8L,
217 BS3CG1DST_R9L,
218 BS3CG1DST_R10L,
219 BS3CG1DST_R11L,
220 BS3CG1DST_R12L,
221 BS3CG1DST_R13L,
222 BS3CG1DST_R14L,
223 BS3CG1DST_R15L,
224 /* 16-bit GPRs. */
225 BS3CG1DST_AX,
226 BS3CG1DST_CX,
227 BS3CG1DST_DX,
228 BS3CG1DST_BX,
229 BS3CG1DST_SP,
230 BS3CG1DST_BP,
231 BS3CG1DST_SI,
232 BS3CG1DST_DI,
233 BS3CG1DST_R8W,
234 BS3CG1DST_R9W,
235 BS3CG1DST_R10W,
236 BS3CG1DST_R11W,
237 BS3CG1DST_R12W,
238 BS3CG1DST_R13W,
239 BS3CG1DST_R14W,
240 BS3CG1DST_R15W,
241 /* 32-bit GPRs. */
242 BS3CG1DST_EAX,
243 BS3CG1DST_ECX,
244 BS3CG1DST_EDX,
245 BS3CG1DST_EBX,
246 BS3CG1DST_ESP,
247 BS3CG1DST_EBP,
248 BS3CG1DST_ESI,
249 BS3CG1DST_EDI,
250 BS3CG1DST_R8D,
251 BS3CG1DST_R9D,
252 BS3CG1DST_R10D,
253 BS3CG1DST_R11D,
254 BS3CG1DST_R12D,
255 BS3CG1DST_R13D,
256 BS3CG1DST_R14D,
257 BS3CG1DST_R15D,
258 /* 64-bit GPRs. */
259 BS3CG1DST_RAX,
260 BS3CG1DST_RCX,
261 BS3CG1DST_RDX,
262 BS3CG1DST_RBX,
263 BS3CG1DST_RSP,
264 BS3CG1DST_RBP,
265 BS3CG1DST_RSI,
266 BS3CG1DST_RDI,
267 BS3CG1DST_R8,
268 BS3CG1DST_R9,
269 BS3CG1DST_R10,
270 BS3CG1DST_R11,
271 BS3CG1DST_R12,
272 BS3CG1DST_R13,
273 BS3CG1DST_R14,
274 BS3CG1DST_R15,
275 /* 16-bit, 32-bit or 64-bit registers according to operand size. */
276 BS3CG1DST_OZ_RAX,
277 BS3CG1DST_OZ_RCX,
278 BS3CG1DST_OZ_RDX,
279 BS3CG1DST_OZ_RBX,
280 BS3CG1DST_OZ_RSP,
281 BS3CG1DST_OZ_RBP,
282 BS3CG1DST_OZ_RSI,
283 BS3CG1DST_OZ_RDI,
284 BS3CG1DST_OZ_R8,
285 BS3CG1DST_OZ_R9,
286 BS3CG1DST_OZ_R10,
287 BS3CG1DST_OZ_R11,
288 BS3CG1DST_OZ_R12,
289 BS3CG1DST_OZ_R13,
290 BS3CG1DST_OZ_R14,
291 BS3CG1DST_OZ_R15,
292
293 BS3CG1DST_END
294} BS3CG1DST;
295
296/** @name Selector opcode definitions.
297 *
298 * Selector programs are very simple, they are zero or more predicate tests
299 * that are ANDed together. If a predicate test fails, the test is skipped.
300 *
301 * One instruction is encoded as byte, where the first bit indicates what kind
302 * of test and the 7 remaining bits indicates which predicate to check.
303 *
304 * @{ */
305#define BS3CG1SEL_OP_KIND_MASK UINT8_C(0x01) /**< The operator part (put in lower bit to reduce switch value range). */
306#define BS3CG1SEL_OP_IS_TRUE UINT8_C(0x00) /**< Check that the predicate is true. */
307#define BS3CG1SEL_OP_IS_FALSE UINT8_C(0x01) /**< Check that the predicate is false. */
308#define BS3CG1SEL_OP_PRED_SHIFT 1 /**< Shift factor for getting/putting a BS3CG1PRED value into/from a byte. */
309/** @} */
310
311/**
312 * Test selector predicates (values are shifted by BS3CG1SEL_OP_PRED_SHIFT).
313 */
314typedef enum BS3CG1PRED
315{
316 BS3CG1PRED_INVALID = 0,
317
318 /* Operand size. */
319 BS3CG1PRED_SIZE_O16,
320 BS3CG1PRED_SIZE_O32,
321 BS3CG1PRED_SIZE_O64,
322 /* Execution ring. */
323 BS3CG1PRED_RING_0,
324 BS3CG1PRED_RING_1,
325 BS3CG1PRED_RING_2,
326 BS3CG1PRED_RING_3,
327 BS3CG1PRED_RING_0_THRU_2,
328 BS3CG1PRED_RING_1_THRU_3,
329 /* Basic code mode. */
330 BS3CG1PRED_CODE_64BIT,
331 BS3CG1PRED_CODE_32BIT,
332 BS3CG1PRED_CODE_16BIT,
333 /* CPU modes. */
334 BS3CG1PRED_MODE_REAL,
335 BS3CG1PRED_MODE_PROT,
336 BS3CG1PRED_MODE_LONG,
337 BS3CG1PRED_MODE_V86,
338 BS3CG1PRED_MODE_SMM,
339 BS3CG1PRED_MODE_VMX,
340 BS3CG1PRED_MODE_SVM,
341 /* Paging on/off */
342 BS3CG1PRED_PAGING_ON,
343 BS3CG1PRED_PAGING_OFF,
344
345 BS3CG1PRED_END
346} BS3CG1PRED;
347
348
349/** The test instructions (generated). */
350extern const BS3CG1INSTR BS3_FAR_DATA g_aBs3Cg1Instructions[];
351/** The number of test instructions (generated). */
352extern const uint16_t BS3_FAR_DATA g_cBs3Cg1Instructions;
353/** The mnemonics (generated).
354 * Variable length sequence of mnemonics that runs in parallel to
355 * g_aBs3Cg1Instructions. */
356extern const char BS3_FAR_DATA g_achBs3Cg1Mnemonics[];
357/** The opcodes (generated).
358 * Variable length sequence of opcode bytes that runs in parallel to
359 * g_aBs3Cg1Instructions, advancing by BS3CG1INSTR::cbOpcodes each time. */
360extern const uint8_t BS3_FAR_DATA g_abBs3Cg1Opcodes[];
361/** The operands (generated).
362 * Variable length sequence of opcode values (BS3CG1OP) that runs in
363 * parallel to g_aBs3Cg1Instructions, advancing by BS3CG1INSTR::cOperands. */
364extern const uint8_t BS3_FAR_DATA g_abBs3Cg1Operands[];
365/** The test data that BS3CG1INSTR.
366 * In order to simplify generating these, we use a byte array. */
367extern const uint8_t BS3_FAR_DATA g_abBs3Cg1Tests[];
368
369
370#endif
371
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