VirtualBox

source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2-data.h@ 105845

Last change on this file since 105845 was 104000, checked in by vboxsync, 8 months ago

ValKit/bs3-cpu-instr-2: Added shl,shr,sar,rol,ror,rcl&rcr tests (only intel data). bugref:10376
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 14.6 KB
Line 
1/* $Id: bs3-cpu-instr-2-data.h 104000 2024-03-22 15:37:38Z vboxsync $ */
2/** @file
3 * BS3Kit - bs3-cpu-instr-2, bs3-cpu-instr-2-data.h - auto generated (do not edit).
4 */
5
6/*
7 * Copyright (C) 2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * The contents of this file may alternatively be used under the terms
26 * of the Common Development and Distribution License Version 1.0
27 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28 * in the VirtualBox distribution, in which case the provisions of the
29 * CDDL are applicable instead of those of the GPL.
30 *
31 * You may elect to license modified versions of this file under the
32 * terms and conditions of either the GPL or the CDDL or both.
33 *
34 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35 */
36
37#ifndef VBOX_INCLUDED_SRC_bootsectors_bs3_cpu_instr_2_data_h
38#define VBOX_INCLUDED_SRC_bootsectors_bs3_cpu_instr_2_data_h
39#ifndef RT_WITHOUT_PRAGMA_ONCE
40# pragma once
41#endif
42
43extern const uint16_t g_cBs3CpuInstr2_and_TestDataU8;
44extern const BS3CPUINSTR2BIN8 g_aBs3CpuInstr2_and_TestDataU8[];
45
46extern const uint16_t g_cBs3CpuInstr2_and_TestDataU16;
47extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_and_TestDataU16[];
48
49extern const uint16_t g_cBs3CpuInstr2_and_TestDataU32;
50extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_and_TestDataU32[];
51
52extern const uint16_t g_cBs3CpuInstr2_and_TestDataU64;
53extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_and_TestDataU64[];
54
55extern const uint16_t g_cBs3CpuInstr2_or_TestDataU8;
56extern const BS3CPUINSTR2BIN8 g_aBs3CpuInstr2_or_TestDataU8[];
57
58extern const uint16_t g_cBs3CpuInstr2_or_TestDataU16;
59extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_or_TestDataU16[];
60
61extern const uint16_t g_cBs3CpuInstr2_or_TestDataU32;
62extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_or_TestDataU32[];
63
64extern const uint16_t g_cBs3CpuInstr2_or_TestDataU64;
65extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_or_TestDataU64[];
66
67extern const uint16_t g_cBs3CpuInstr2_xor_TestDataU8;
68extern const BS3CPUINSTR2BIN8 g_aBs3CpuInstr2_xor_TestDataU8[];
69
70extern const uint16_t g_cBs3CpuInstr2_xor_TestDataU16;
71extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_xor_TestDataU16[];
72
73extern const uint16_t g_cBs3CpuInstr2_xor_TestDataU32;
74extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_xor_TestDataU32[];
75
76extern const uint16_t g_cBs3CpuInstr2_xor_TestDataU64;
77extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_xor_TestDataU64[];
78
79extern const uint16_t g_cBs3CpuInstr2_test_TestDataU8;
80extern const BS3CPUINSTR2BIN8 g_aBs3CpuInstr2_test_TestDataU8[];
81
82extern const uint16_t g_cBs3CpuInstr2_test_TestDataU16;
83extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_test_TestDataU16[];
84
85extern const uint16_t g_cBs3CpuInstr2_test_TestDataU32;
86extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_test_TestDataU32[];
87
88extern const uint16_t g_cBs3CpuInstr2_test_TestDataU64;
89extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_test_TestDataU64[];
90
91extern const uint16_t g_cBs3CpuInstr2_add_TestDataU8;
92extern const BS3CPUINSTR2BIN8 g_aBs3CpuInstr2_add_TestDataU8[];
93
94extern const uint16_t g_cBs3CpuInstr2_add_TestDataU16;
95extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_add_TestDataU16[];
96
97extern const uint16_t g_cBs3CpuInstr2_add_TestDataU32;
98extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_add_TestDataU32[];
99
100extern const uint16_t g_cBs3CpuInstr2_add_TestDataU64;
101extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_add_TestDataU64[];
102
103extern const uint16_t g_cBs3CpuInstr2_adc_TestDataU8;
104extern const BS3CPUINSTR2BIN8 g_aBs3CpuInstr2_adc_TestDataU8[];
105
106extern const uint16_t g_cBs3CpuInstr2_adc_TestDataU16;
107extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_adc_TestDataU16[];
108
109extern const uint16_t g_cBs3CpuInstr2_adc_TestDataU32;
110extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_adc_TestDataU32[];
111
112extern const uint16_t g_cBs3CpuInstr2_adc_TestDataU64;
113extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_adc_TestDataU64[];
114
115extern const uint16_t g_cBs3CpuInstr2_sub_TestDataU8;
116extern const BS3CPUINSTR2BIN8 g_aBs3CpuInstr2_sub_TestDataU8[];
117
118extern const uint16_t g_cBs3CpuInstr2_sub_TestDataU16;
119extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_sub_TestDataU16[];
120
121extern const uint16_t g_cBs3CpuInstr2_sub_TestDataU32;
122extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_sub_TestDataU32[];
123
124extern const uint16_t g_cBs3CpuInstr2_sub_TestDataU64;
125extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_sub_TestDataU64[];
126
127extern const uint16_t g_cBs3CpuInstr2_sbb_TestDataU8;
128extern const BS3CPUINSTR2BIN8 g_aBs3CpuInstr2_sbb_TestDataU8[];
129
130extern const uint16_t g_cBs3CpuInstr2_sbb_TestDataU16;
131extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_sbb_TestDataU16[];
132
133extern const uint16_t g_cBs3CpuInstr2_sbb_TestDataU32;
134extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_sbb_TestDataU32[];
135
136extern const uint16_t g_cBs3CpuInstr2_sbb_TestDataU64;
137extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_sbb_TestDataU64[];
138
139extern const uint16_t g_cBs3CpuInstr2_cmp_TestDataU8;
140extern const BS3CPUINSTR2BIN8 g_aBs3CpuInstr2_cmp_TestDataU8[];
141
142extern const uint16_t g_cBs3CpuInstr2_cmp_TestDataU16;
143extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_cmp_TestDataU16[];
144
145extern const uint16_t g_cBs3CpuInstr2_cmp_TestDataU32;
146extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_cmp_TestDataU32[];
147
148extern const uint16_t g_cBs3CpuInstr2_cmp_TestDataU64;
149extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_cmp_TestDataU64[];
150
151extern const uint16_t g_cBs3CpuInstr2_bt_TestDataU16;
152extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_bt_TestDataU16[];
153
154extern const uint16_t g_cBs3CpuInstr2_bt_TestDataU32;
155extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_bt_TestDataU32[];
156
157extern const uint16_t g_cBs3CpuInstr2_bt_TestDataU64;
158extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_bt_TestDataU64[];
159
160extern const uint16_t g_cBs3CpuInstr2_btc_TestDataU16;
161extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_btc_TestDataU16[];
162
163extern const uint16_t g_cBs3CpuInstr2_btc_TestDataU32;
164extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_btc_TestDataU32[];
165
166extern const uint16_t g_cBs3CpuInstr2_btc_TestDataU64;
167extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_btc_TestDataU64[];
168
169extern const uint16_t g_cBs3CpuInstr2_btr_TestDataU16;
170extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_btr_TestDataU16[];
171
172extern const uint16_t g_cBs3CpuInstr2_btr_TestDataU32;
173extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_btr_TestDataU32[];
174
175extern const uint16_t g_cBs3CpuInstr2_btr_TestDataU64;
176extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_btr_TestDataU64[];
177
178extern const uint16_t g_cBs3CpuInstr2_bts_TestDataU16;
179extern const BS3CPUINSTR2BIN16 g_aBs3CpuInstr2_bts_TestDataU16[];
180
181extern const uint16_t g_cBs3CpuInstr2_bts_TestDataU32;
182extern const BS3CPUINSTR2BIN32 g_aBs3CpuInstr2_bts_TestDataU32[];
183
184extern const uint16_t g_cBs3CpuInstr2_bts_TestDataU64;
185extern const BS3CPUINSTR2BIN64 g_aBs3CpuInstr2_bts_TestDataU64[];
186
187extern const uint16_t g_cBs3CpuInstr2_shl_intel_TestDataU8;
188extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_shl_intel_TestDataU8[];
189
190extern const uint16_t g_cBs3CpuInstr2_shl_intel_TestDataU16;
191extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_shl_intel_TestDataU16[];
192
193extern const uint16_t g_cBs3CpuInstr2_shl_intel_TestDataU32;
194extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_shl_intel_TestDataU32[];
195
196extern const uint16_t g_cBs3CpuInstr2_shl_intel_TestDataU64;
197extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_shl_intel_TestDataU64[];
198
199extern const uint16_t g_cBs3CpuInstr2_shl_amd_TestDataU8;
200extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_shl_amd_TestDataU8[];
201
202extern const uint16_t g_cBs3CpuInstr2_shl_amd_TestDataU16;
203extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_shl_amd_TestDataU16[];
204
205extern const uint16_t g_cBs3CpuInstr2_shl_amd_TestDataU32;
206extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_shl_amd_TestDataU32[];
207
208extern const uint16_t g_cBs3CpuInstr2_shl_amd_TestDataU64;
209extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_shl_amd_TestDataU64[];
210
211extern const uint16_t g_cBs3CpuInstr2_shr_intel_TestDataU8;
212extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_shr_intel_TestDataU8[];
213
214extern const uint16_t g_cBs3CpuInstr2_shr_intel_TestDataU16;
215extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_shr_intel_TestDataU16[];
216
217extern const uint16_t g_cBs3CpuInstr2_shr_intel_TestDataU32;
218extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_shr_intel_TestDataU32[];
219
220extern const uint16_t g_cBs3CpuInstr2_shr_intel_TestDataU64;
221extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_shr_intel_TestDataU64[];
222
223extern const uint16_t g_cBs3CpuInstr2_shr_amd_TestDataU8;
224extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_shr_amd_TestDataU8[];
225
226extern const uint16_t g_cBs3CpuInstr2_shr_amd_TestDataU16;
227extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_shr_amd_TestDataU16[];
228
229extern const uint16_t g_cBs3CpuInstr2_shr_amd_TestDataU32;
230extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_shr_amd_TestDataU32[];
231
232extern const uint16_t g_cBs3CpuInstr2_shr_amd_TestDataU64;
233extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_shr_amd_TestDataU64[];
234
235extern const uint16_t g_cBs3CpuInstr2_sar_intel_TestDataU8;
236extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_sar_intel_TestDataU8[];
237
238extern const uint16_t g_cBs3CpuInstr2_sar_intel_TestDataU16;
239extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_sar_intel_TestDataU16[];
240
241extern const uint16_t g_cBs3CpuInstr2_sar_intel_TestDataU32;
242extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_sar_intel_TestDataU32[];
243
244extern const uint16_t g_cBs3CpuInstr2_sar_intel_TestDataU64;
245extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_sar_intel_TestDataU64[];
246
247extern const uint16_t g_cBs3CpuInstr2_sar_amd_TestDataU8;
248extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_sar_amd_TestDataU8[];
249
250extern const uint16_t g_cBs3CpuInstr2_sar_amd_TestDataU16;
251extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_sar_amd_TestDataU16[];
252
253extern const uint16_t g_cBs3CpuInstr2_sar_amd_TestDataU32;
254extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_sar_amd_TestDataU32[];
255
256extern const uint16_t g_cBs3CpuInstr2_sar_amd_TestDataU64;
257extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_sar_amd_TestDataU64[];
258
259extern const uint16_t g_cBs3CpuInstr2_rol_intel_TestDataU8;
260extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_rol_intel_TestDataU8[];
261
262extern const uint16_t g_cBs3CpuInstr2_rol_intel_TestDataU16;
263extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_rol_intel_TestDataU16[];
264
265extern const uint16_t g_cBs3CpuInstr2_rol_intel_TestDataU32;
266extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_rol_intel_TestDataU32[];
267
268extern const uint16_t g_cBs3CpuInstr2_rol_intel_TestDataU64;
269extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_rol_intel_TestDataU64[];
270
271extern const uint16_t g_cBs3CpuInstr2_rol_amd_TestDataU8;
272extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_rol_amd_TestDataU8[];
273
274extern const uint16_t g_cBs3CpuInstr2_rol_amd_TestDataU16;
275extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_rol_amd_TestDataU16[];
276
277extern const uint16_t g_cBs3CpuInstr2_rol_amd_TestDataU32;
278extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_rol_amd_TestDataU32[];
279
280extern const uint16_t g_cBs3CpuInstr2_rol_amd_TestDataU64;
281extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_rol_amd_TestDataU64[];
282
283extern const uint16_t g_cBs3CpuInstr2_ror_intel_TestDataU8;
284extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_ror_intel_TestDataU8[];
285
286extern const uint16_t g_cBs3CpuInstr2_ror_intel_TestDataU16;
287extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_ror_intel_TestDataU16[];
288
289extern const uint16_t g_cBs3CpuInstr2_ror_intel_TestDataU32;
290extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_ror_intel_TestDataU32[];
291
292extern const uint16_t g_cBs3CpuInstr2_ror_intel_TestDataU64;
293extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_ror_intel_TestDataU64[];
294
295extern const uint16_t g_cBs3CpuInstr2_ror_amd_TestDataU8;
296extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_ror_amd_TestDataU8[];
297
298extern const uint16_t g_cBs3CpuInstr2_ror_amd_TestDataU16;
299extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_ror_amd_TestDataU16[];
300
301extern const uint16_t g_cBs3CpuInstr2_ror_amd_TestDataU32;
302extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_ror_amd_TestDataU32[];
303
304extern const uint16_t g_cBs3CpuInstr2_ror_amd_TestDataU64;
305extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_ror_amd_TestDataU64[];
306
307extern const uint16_t g_cBs3CpuInstr2_rcl_intel_TestDataU8;
308extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_rcl_intel_TestDataU8[];
309
310extern const uint16_t g_cBs3CpuInstr2_rcl_intel_TestDataU16;
311extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_rcl_intel_TestDataU16[];
312
313extern const uint16_t g_cBs3CpuInstr2_rcl_intel_TestDataU32;
314extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_rcl_intel_TestDataU32[];
315
316extern const uint16_t g_cBs3CpuInstr2_rcl_intel_TestDataU64;
317extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_rcl_intel_TestDataU64[];
318
319extern const uint16_t g_cBs3CpuInstr2_rcl_amd_TestDataU8;
320extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_rcl_amd_TestDataU8[];
321
322extern const uint16_t g_cBs3CpuInstr2_rcl_amd_TestDataU16;
323extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_rcl_amd_TestDataU16[];
324
325extern const uint16_t g_cBs3CpuInstr2_rcl_amd_TestDataU32;
326extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_rcl_amd_TestDataU32[];
327
328extern const uint16_t g_cBs3CpuInstr2_rcl_amd_TestDataU64;
329extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_rcl_amd_TestDataU64[];
330
331extern const uint16_t g_cBs3CpuInstr2_rcr_intel_TestDataU8;
332extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_rcr_intel_TestDataU8[];
333
334extern const uint16_t g_cBs3CpuInstr2_rcr_intel_TestDataU16;
335extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_rcr_intel_TestDataU16[];
336
337extern const uint16_t g_cBs3CpuInstr2_rcr_intel_TestDataU32;
338extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_rcr_intel_TestDataU32[];
339
340extern const uint16_t g_cBs3CpuInstr2_rcr_intel_TestDataU64;
341extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_rcr_intel_TestDataU64[];
342
343extern const uint16_t g_cBs3CpuInstr2_rcr_amd_TestDataU8;
344extern const BS3CPUINSTR2SHIFT8 g_aBs3CpuInstr2_rcr_amd_TestDataU8[];
345
346extern const uint16_t g_cBs3CpuInstr2_rcr_amd_TestDataU16;
347extern const BS3CPUINSTR2SHIFT16 g_aBs3CpuInstr2_rcr_amd_TestDataU16[];
348
349extern const uint16_t g_cBs3CpuInstr2_rcr_amd_TestDataU32;
350extern const BS3CPUINSTR2SHIFT32 g_aBs3CpuInstr2_rcr_amd_TestDataU32[];
351
352extern const uint16_t g_cBs3CpuInstr2_rcr_amd_TestDataU64;
353extern const BS3CPUINSTR2SHIFT64 g_aBs3CpuInstr2_rcr_amd_TestDataU64[];
354
355#endif /* !VBOX_INCLUDED_SRC_bootsectors_bs3_cpu_instr_2_data_h */
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette