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Last change
on this file since 106644 was 106620, checked in by vboxsync, 4 months ago |
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ValidationKit/bootsectors: preparing SIMD FP testcases for cvt family instructions: generalize the test register setup; bugref:10658; bugref:9898
- define tokens for each computational register an instruction test might use
- support MMX registers MM[0-7]
- support FSxDI, needed by some instructions in bs3-cpu-instr-3
- support arbitrary FSxREG, needed by some instructions in bs3-cpu-instr-3
- support x86 general purpose registers (incomplete, not yet tested)
- support placeholders for AVX-512 registers (ZMM, [XY]MM16..31, k0..7)
- support placeholders for APX general purpose registers (R16..31)
- provide token-to-name-string function bs3CpuInstrXGetRegisterName()
- provide set-this-register-in-test-context function Bs3ExtCtxSetReg()
- call these functions from SIMD FP test worker to set up a test's context
- change all instruction test data in bs3-cpu-instr-4 to the new format
- update bs3-cpu-instr-3 worker #7 to use new scheme (proof of concept)
- fix register naming in vpextrb, vgather[dq]p[sd], vpgather[dq][dq]
- fix unused register numbers in [v]pmovmskb #UD tests
- todo: finish in bs3-cpu-instr-3 (will need implementation improvements)
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