| 1 | ; $Id: bs3-cpu-instr-4-template.mac 105632 2024-08-09 06:38:07Z vboxsync $
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| 2 | ;; @file
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| 3 | ; BS3Kit - bs3-cpu-instr-4 - SSE, AVX FPU instructions, assembly template.
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| 4 | ;
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| 5 |
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| 6 | ;
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| 7 | ; Copyright (C) 2024 Oracle and/or its affiliates.
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| 8 | ;
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| 9 | ; This file is part of VirtualBox base platform packages, as
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| 10 | ; available from https://www.virtualbox.org.
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| 11 | ;
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| 12 | ; This program is free software; you can redistribute it and/or
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| 13 | ; modify it under the terms of the GNU General Public License
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| 14 | ; as published by the Free Software Foundation, in version 3 of the
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| 15 | ; License.
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| 16 | ;
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| 17 | ; This program is distributed in the hope that it will be useful, but
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| 18 | ; WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | ; General Public License for more details.
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| 21 | ;
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| 22 | ; You should have received a copy of the GNU General Public License
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| 23 | ; along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | ;
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| 25 | ; The contents of this file may alternatively be used under the terms
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| 26 | ; of the Common Development and Distribution License Version 1.0
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| 27 | ; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 28 | ; in the VirtualBox distribution, in which case the provisions of the
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| 29 | ; CDDL are applicable instead of those of the GPL.
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| 30 | ;
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| 31 | ; You may elect to license modified versions of this file under the
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| 32 | ; terms and conditions of either the GPL or the CDDL or both.
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| 33 | ;
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| 34 | ; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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| 35 | ;
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| 36 |
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| 37 |
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| 38 | ;*********************************************************************************************************************************
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| 39 | ;* Header Files *
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| 40 | ;*********************************************************************************************************************************
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| 41 | %include "bs3kit-template-header.mac" ; setup environment
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| 42 |
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| 43 |
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| 44 | ;*********************************************************************************************************************************
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| 45 | ;* External Symbols *
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| 46 | ;*********************************************************************************************************************************
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| 47 | TMPL_BEGIN_TEXT
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| 48 |
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| 49 |
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| 50 | ;
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| 51 | ; Test code snippets containing code which differs between 16-bit, 32-bit
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| 52 | ; and 64-bit CPUs modes.
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| 53 | ;
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| 54 | %ifdef BS3_INSTANTIATING_CMN
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| 55 |
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| 56 |
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| 57 | ;;
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| 58 | ; Variant on BS3_PROC_BEGIN_CMN w/ BS3_PBC_NEAR that prefixes the function
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| 59 | ; with an instruction length byte.
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| 60 | ;
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| 61 | ; ASSUMES the length is between the start of the function and the .again label.
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| 62 | ;
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| 63 | %ifndef BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
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| 64 | %define BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
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| 65 | %macro BS3CPUINSTR4_PROC_BEGIN_CMN 1
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| 66 | align 8, db 0cch
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| 67 | db BS3_CMN_NM(%1).again - BS3_CMN_NM(%1)
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| 68 | BS3_PROC_BEGIN_CMN %1, BS3_PBC_NEAR
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| 69 | %endmacro
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| 70 | %endif ; !BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
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| 71 |
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| 72 | ;;
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| 73 | ; The EMIT_INSTR_PLUS_ICEBP macros is for creating a common function for and
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| 74 | ; named after a single instruction, followed by a looping ICEBP.
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| 75 | ;
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| 76 | ; This works like a prefix to the instruction invocation, only exception is that
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| 77 | ; instead of [fs:xBX] you write FSxBS as that's what is wanted in the name.
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| 78 | ;
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| 79 | %ifndef EMIT_INSTR_PLUS_ICEBP_DEFINED
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| 80 | %define EMIT_INSTR_PLUS_ICEBP_DEFINED
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| 81 |
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| 82 | %macro EMIT_INSTR_PLUS_ICEBP 2
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| 83 | BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _icebp
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| 84 | %define FSxBX [fs:xBX]
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| 85 | %1 %2
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| 86 | %undef FSxBX
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| 87 | .again:
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| 88 | icebp
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| 89 | jmp .again
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| 90 | BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _icebp
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| 91 | %endmacro
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| 92 |
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| 93 | %macro EMIT_INSTR_PLUS_ICEBP 3
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| 94 | BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _icebp
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| 95 | %define FSxBX [fs:xBX]
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| 96 | %1 %2, %3
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| 97 | %undef FSxBX
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| 98 | .again:
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| 99 | icebp
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| 100 | jmp .again
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| 101 | BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _icebp
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| 102 | %endmacro
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| 103 |
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| 104 | %macro EMIT_INSTR_PLUS_ICEBP 4
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| 105 | BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _icebp
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| 106 | %define FSxBX [fs:xBX]
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| 107 | %1 %2, %3, %4
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| 108 | %undef FSxBX
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| 109 | .again:
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| 110 | icebp
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| 111 | jmp .again
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| 112 | BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _icebp
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| 113 | %endmacro
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| 114 |
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| 115 | %macro EMIT_INSTR_PLUS_ICEBP 5
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| 116 | BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _ %+ %5 %+ _icebp
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| 117 | %define FSxBX [fs:xBX]
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| 118 | %1 %2, %3, %4, %5
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| 119 | %undef FSxBX
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| 120 | .again:
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| 121 | icebp
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| 122 | jmp .again
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| 123 | BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _ %+ %5 %+ _icebp
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| 124 | %endmacro
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| 125 |
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| 126 | %macro EMIT_INSTR_PLUS_ICEBP_C64 2
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| 127 | %if TMPL_BITS == 64
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| 128 | EMIT_INSTR_PLUS_ICEBP %1, %2
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| 129 | %endif
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| 130 | %endmacro
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| 131 |
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| 132 | %macro EMIT_INSTR_PLUS_ICEBP_C64 3
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| 133 | %if TMPL_BITS == 64
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| 134 | EMIT_INSTR_PLUS_ICEBP %1, %2, %3
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| 135 | %endif
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| 136 | %endmacro
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| 137 |
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| 138 | %macro EMIT_INSTR_PLUS_ICEBP_C64 4
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| 139 | %if TMPL_BITS == 64
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| 140 | EMIT_INSTR_PLUS_ICEBP %1, %2, %3, %4
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| 141 | %endif
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| 142 | %endmacro
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| 143 |
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| 144 | %macro EMIT_INSTR_PLUS_ICEBP_C64 5
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| 145 | %if TMPL_BITS == 64
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| 146 | EMIT_INSTR_PLUS_ICEBP %1, %2, %3, %4, %5
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| 147 | %endif
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| 148 | %endmacro
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| 149 |
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| 150 | %endif ; !EMIT_INSTR_PLUS_ICEBP_DEFINED
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| 151 |
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| 152 | ;
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| 153 | ;; [v]addps
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| 154 | ;
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| 155 | EMIT_INSTR_PLUS_ICEBP addps, XMM1, XMM2
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| 156 | EMIT_INSTR_PLUS_ICEBP addps, XMM1, FSxBX
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| 157 | EMIT_INSTR_PLUS_ICEBP_C64 addps, XMM8, XMM9
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| 158 | EMIT_INSTR_PLUS_ICEBP_C64 addps, XMM8, FSxBX
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| 159 |
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| 160 | EMIT_INSTR_PLUS_ICEBP vaddps, XMM1, XMM2, XMM3
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| 161 | EMIT_INSTR_PLUS_ICEBP vaddps, XMM1, XMM2, FSxBX
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| 162 | EMIT_INSTR_PLUS_ICEBP_C64 vaddps, XMM8, XMM9, XMM10
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| 163 | EMIT_INSTR_PLUS_ICEBP_C64 vaddps, XMM8, XMM9, FSxBX
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| 164 |
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| 165 | EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM2, YMM3
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| 166 | EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM2, FSxBX
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| 167 | EMIT_INSTR_PLUS_ICEBP_C64 vaddps, YMM8, YMM9, YMM10
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| 168 | EMIT_INSTR_PLUS_ICEBP_C64 vaddps, YMM8, YMM9, FSxBX
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| 169 |
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| 170 | ;
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| 171 | ;; [v]addpd
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| 172 | ;
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| 173 | EMIT_INSTR_PLUS_ICEBP addpd, XMM1, XMM2
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| 174 | EMIT_INSTR_PLUS_ICEBP addpd, XMM1, FSxBX
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| 175 | EMIT_INSTR_PLUS_ICEBP_C64 addpd, XMM8, XMM9
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| 176 | EMIT_INSTR_PLUS_ICEBP_C64 addpd, XMM8, FSxBX
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| 177 |
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| 178 | EMIT_INSTR_PLUS_ICEBP vaddpd, XMM1, XMM2, XMM3
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| 179 | EMIT_INSTR_PLUS_ICEBP vaddpd, XMM1, XMM2, FSxBX
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| 180 | EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, XMM8, XMM9, XMM10
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| 181 | EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, XMM8, XMM9, FSxBX
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| 182 |
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| 183 | EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM2, YMM3
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| 184 | EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM2, FSxBX
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| 185 | EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, YMM8, YMM9, YMM10
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| 186 | EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, YMM8, YMM9, FSxBX
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| 187 |
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| 188 | ;
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| 189 | ;; [v]addss
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| 190 | ;
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| 191 | EMIT_INSTR_PLUS_ICEBP addss, XMM1, XMM2
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| 192 | EMIT_INSTR_PLUS_ICEBP addss, XMM1, FSxBX
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| 193 | EMIT_INSTR_PLUS_ICEBP_C64 addss, XMM8, XMM9
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| 194 | EMIT_INSTR_PLUS_ICEBP_C64 addss, XMM8, FSxBX
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| 195 |
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| 196 | EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM2, XMM3
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| 197 | EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM2, FSxBX
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| 198 | EMIT_INSTR_PLUS_ICEBP_C64 vaddss, XMM8, XMM9, XMM10
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| 199 | EMIT_INSTR_PLUS_ICEBP_C64 vaddss, XMM8, XMM9, FSxBX
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| 200 |
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| 201 | ;
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| 202 | ;; [v]addsd
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| 203 | ;
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| 204 | EMIT_INSTR_PLUS_ICEBP addsd, XMM1, XMM2
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| 205 | EMIT_INSTR_PLUS_ICEBP addsd, XMM1, FSxBX
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| 206 | EMIT_INSTR_PLUS_ICEBP_C64 addsd, XMM8, XMM9
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| 207 | EMIT_INSTR_PLUS_ICEBP_C64 addsd, XMM8, FSxBX
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| 208 |
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| 209 | EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM2, XMM3
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| 210 | EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM2, FSxBX
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| 211 | EMIT_INSTR_PLUS_ICEBP_C64 vaddsd, XMM8, XMM9, XMM10
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| 212 | EMIT_INSTR_PLUS_ICEBP_C64 vaddsd, XMM8, XMM9, FSxBX
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| 213 |
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| 214 | ;
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| 215 | ;; [v]haddps
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| 216 | ;
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| 217 | EMIT_INSTR_PLUS_ICEBP haddps, XMM1, XMM2
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| 218 | EMIT_INSTR_PLUS_ICEBP haddps, XMM1, FSxBX
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| 219 | EMIT_INSTR_PLUS_ICEBP_C64 haddps, XMM8, XMM9
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| 220 | EMIT_INSTR_PLUS_ICEBP_C64 haddps, XMM8, FSxBX
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| 221 |
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| 222 | EMIT_INSTR_PLUS_ICEBP vhaddps, XMM1, XMM2, XMM3
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| 223 | EMIT_INSTR_PLUS_ICEBP vhaddps, XMM1, XMM2, FSxBX
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| 224 | EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, XMM8, XMM9, XMM10
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| 225 | EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, XMM8, XMM9, FSxBX
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| 226 |
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| 227 | EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM2, YMM3
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| 228 | EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM2, FSxBX
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| 229 | EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, YMM8, YMM9, YMM10
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| 230 | EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, YMM8, YMM9, FSxBX
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| 231 |
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| 232 | ;
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| 233 | ;; [v]haddpd
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| 234 | ;
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| 235 | EMIT_INSTR_PLUS_ICEBP haddpd, XMM1, XMM2
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| 236 | EMIT_INSTR_PLUS_ICEBP haddpd, XMM1, FSxBX
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| 237 | EMIT_INSTR_PLUS_ICEBP_C64 haddpd, XMM8, XMM9
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| 238 | EMIT_INSTR_PLUS_ICEBP_C64 haddpd, XMM8, FSxBX
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| 239 |
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| 240 | EMIT_INSTR_PLUS_ICEBP vhaddpd, XMM1, XMM2, XMM3
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| 241 | EMIT_INSTR_PLUS_ICEBP vhaddpd, XMM1, XMM2, FSxBX
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| 242 | EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, XMM8, XMM9, XMM10
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| 243 | EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, XMM8, XMM9, FSxBX
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| 244 |
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| 245 | EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM2, YMM3
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| 246 | EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM2, FSxBX
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| 247 | EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, YMM8, YMM9, YMM10
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| 248 | EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, YMM8, YMM9, FSxBX
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| 249 |
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| 250 | ;
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| 251 | ;; [v]subps
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| 252 | ;
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| 253 | EMIT_INSTR_PLUS_ICEBP subps, XMM1, XMM2
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| 254 | EMIT_INSTR_PLUS_ICEBP subps, XMM1, FSxBX
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| 255 | EMIT_INSTR_PLUS_ICEBP_C64 subps, XMM8, XMM9
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| 256 | EMIT_INSTR_PLUS_ICEBP_C64 subps, XMM8, FSxBX
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| 257 |
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| 258 | EMIT_INSTR_PLUS_ICEBP vsubps, XMM1, XMM2, XMM3
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| 259 | EMIT_INSTR_PLUS_ICEBP vsubps, XMM1, XMM2, FSxBX
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| 260 | EMIT_INSTR_PLUS_ICEBP_C64 vsubps, XMM8, XMM9, XMM10
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| 261 | EMIT_INSTR_PLUS_ICEBP_C64 vsubps, XMM8, XMM9, FSxBX
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| 262 |
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| 263 | EMIT_INSTR_PLUS_ICEBP vsubps, YMM1, YMM2, YMM3
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| 264 | EMIT_INSTR_PLUS_ICEBP vsubps, YMM1, YMM2, FSxBX
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| 265 | EMIT_INSTR_PLUS_ICEBP_C64 vsubps, YMM8, YMM9, YMM10
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| 266 | EMIT_INSTR_PLUS_ICEBP_C64 vsubps, YMM8, YMM9, FSxBX
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| 267 |
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| 268 | ;
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| 269 | ;; [v]subpd
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| 270 | ;
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| 271 | EMIT_INSTR_PLUS_ICEBP subpd, XMM1, XMM2
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| 272 | EMIT_INSTR_PLUS_ICEBP subpd, XMM1, FSxBX
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| 273 | EMIT_INSTR_PLUS_ICEBP_C64 subpd, XMM8, XMM9
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| 274 | EMIT_INSTR_PLUS_ICEBP_C64 subpd, XMM8, FSxBX
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| 275 |
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| 276 | EMIT_INSTR_PLUS_ICEBP vsubpd, XMM1, XMM2, XMM3
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| 277 | EMIT_INSTR_PLUS_ICEBP vsubpd, XMM1, XMM2, FSxBX
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| 278 | EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, XMM8, XMM9, XMM10
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| 279 | EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, XMM8, XMM9, FSxBX
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| 280 |
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| 281 | EMIT_INSTR_PLUS_ICEBP vsubpd, YMM1, YMM2, YMM3
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| 282 | EMIT_INSTR_PLUS_ICEBP vsubpd, YMM1, YMM2, FSxBX
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| 283 | EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, YMM8, YMM9, YMM10
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| 284 | EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, YMM8, YMM9, FSxBX
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| 285 |
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| 286 | ;
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| 287 | ;; [v]subss
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| 288 | ;
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| 289 | EMIT_INSTR_PLUS_ICEBP subss, XMM1, XMM2
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| 290 | EMIT_INSTR_PLUS_ICEBP subss, XMM1, FSxBX
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| 291 | EMIT_INSTR_PLUS_ICEBP_C64 subss, XMM8, XMM9
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| 292 | EMIT_INSTR_PLUS_ICEBP_C64 subss, XMM8, FSxBX
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| 293 |
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| 294 | EMIT_INSTR_PLUS_ICEBP vsubss, XMM1, XMM2, XMM3
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| 295 | EMIT_INSTR_PLUS_ICEBP vsubss, XMM1, XMM2, FSxBX
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| 296 | EMIT_INSTR_PLUS_ICEBP_C64 vsubss, XMM8, XMM9, XMM10
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| 297 | EMIT_INSTR_PLUS_ICEBP_C64 vsubss, XMM8, XMM9, FSxBX
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| 298 |
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| 299 | ;
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| 300 | ;; [v]mulps
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| 301 | ;
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| 302 | EMIT_INSTR_PLUS_ICEBP mulps, XMM1, XMM2
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| 303 | EMIT_INSTR_PLUS_ICEBP mulps, XMM1, FSxBX
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| 304 | EMIT_INSTR_PLUS_ICEBP_C64 mulps, XMM8, XMM9
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| 305 | EMIT_INSTR_PLUS_ICEBP_C64 mulps, XMM8, FSxBX
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| 306 |
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| 307 | EMIT_INSTR_PLUS_ICEBP vmulps, XMM1, XMM2, XMM3
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| 308 | EMIT_INSTR_PLUS_ICEBP vmulps, XMM1, XMM2, FSxBX
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| 309 | EMIT_INSTR_PLUS_ICEBP_C64 vmulps, XMM8, XMM9, XMM10
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| 310 | EMIT_INSTR_PLUS_ICEBP_C64 vmulps, XMM8, XMM9, FSxBX
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| 311 |
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| 312 | EMIT_INSTR_PLUS_ICEBP vmulps, YMM1, YMM2, YMM3
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| 313 | EMIT_INSTR_PLUS_ICEBP vmulps, YMM1, YMM2, FSxBX
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| 314 | EMIT_INSTR_PLUS_ICEBP_C64 vmulps, YMM8, YMM9, YMM10
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| 315 | EMIT_INSTR_PLUS_ICEBP_C64 vmulps, YMM8, YMM9, FSxBX
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| 316 |
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| 317 | ;
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| 318 | ;; [v]mulpd
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| 319 | ;
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| 320 | EMIT_INSTR_PLUS_ICEBP mulpd, XMM1, XMM2
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| 321 | EMIT_INSTR_PLUS_ICEBP mulpd, XMM1, FSxBX
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| 322 | EMIT_INSTR_PLUS_ICEBP_C64 mulpd, XMM8, XMM9
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| 323 | EMIT_INSTR_PLUS_ICEBP_C64 mulpd, XMM8, FSxBX
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| 324 |
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| 325 | EMIT_INSTR_PLUS_ICEBP vmulpd, XMM1, XMM2, XMM3
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| 326 | EMIT_INSTR_PLUS_ICEBP vmulpd, XMM1, XMM2, FSxBX
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| 327 | EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, XMM8, XMM9, XMM10
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| 328 | EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, XMM8, XMM9, FSxBX
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|---|
| 329 |
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|---|
| 330 | EMIT_INSTR_PLUS_ICEBP vmulpd, YMM1, YMM2, YMM3
|
|---|
| 331 | EMIT_INSTR_PLUS_ICEBP vmulpd, YMM1, YMM2, FSxBX
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|---|
| 332 | EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, YMM8, YMM9, YMM10
|
|---|
| 333 | EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, YMM8, YMM9, FSxBX
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| 334 |
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| 335 | ;
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| 336 | ;; [v]mulss
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| 337 | ;
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|---|
| 338 | EMIT_INSTR_PLUS_ICEBP mulss, XMM1, XMM2
|
|---|
| 339 | EMIT_INSTR_PLUS_ICEBP mulss, XMM1, FSxBX
|
|---|
| 340 | EMIT_INSTR_PLUS_ICEBP_C64 mulss, XMM8, XMM9
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|---|
| 341 | EMIT_INSTR_PLUS_ICEBP_C64 mulss, XMM8, FSxBX
|
|---|
| 342 |
|
|---|
| 343 | EMIT_INSTR_PLUS_ICEBP vmulss, XMM1, XMM2, XMM3
|
|---|
| 344 | EMIT_INSTR_PLUS_ICEBP vmulss, XMM1, XMM2, FSxBX
|
|---|
| 345 | EMIT_INSTR_PLUS_ICEBP_C64 vmulss, XMM8, XMM9, XMM10
|
|---|
| 346 | EMIT_INSTR_PLUS_ICEBP_C64 vmulss, XMM8, XMM9, FSxBX
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|---|
| 347 |
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|---|
| 348 | %endif ; BS3_INSTANTIATING_CMN
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| 349 |
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| 350 | %include "bs3kit-template-footer.mac" ; reset environment
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