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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4-template.mac@ 106016

Last change on this file since 106016 was 106016, checked in by vboxsync, 3 months ago

ValidationKit/bootsectors: Implement SISD FP testcases for [v]divss (derived from [v]mulss); bugref:10658
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1; $Id: bs3-cpu-instr-4-template.mac 106016 2024-09-12 06:43:59Z vboxsync $
2;; @file
3; BS3Kit - bs3-cpu-instr-4 - SSE, AVX FPU instructions, assembly template.
4;
5
6;
7; Copyright (C) 2024 Oracle and/or its affiliates.
8;
9; This file is part of VirtualBox base platform packages, as
10; available from https://www.virtualbox.org.
11;
12; This program is free software; you can redistribute it and/or
13; modify it under the terms of the GNU General Public License
14; as published by the Free Software Foundation, in version 3 of the
15; License.
16;
17; This program is distributed in the hope that it will be useful, but
18; WITHOUT ANY WARRANTY; without even the implied warranty of
19; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20; General Public License for more details.
21;
22; You should have received a copy of the GNU General Public License
23; along with this program; if not, see <https://www.gnu.org/licenses>.
24;
25; The contents of this file may alternatively be used under the terms
26; of the Common Development and Distribution License Version 1.0
27; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28; in the VirtualBox distribution, in which case the provisions of the
29; CDDL are applicable instead of those of the GPL.
30;
31; You may elect to license modified versions of this file under the
32; terms and conditions of either the GPL or the CDDL or both.
33;
34; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35;
36
37
38;*********************************************************************************************************************************
39;* Header Files *
40;*********************************************************************************************************************************
41%include "bs3kit-template-header.mac" ; setup environment
42
43
44;*********************************************************************************************************************************
45;* External Symbols *
46;*********************************************************************************************************************************
47TMPL_BEGIN_TEXT
48
49
50;
51; Test code snippets containing code which differs between 16-bit, 32-bit
52; and 64-bit CPUs modes.
53;
54%ifdef BS3_INSTANTIATING_CMN
55
56
57;;
58; Variant on BS3_PROC_BEGIN_CMN w/ BS3_PBC_NEAR that prefixes the function
59; with an instruction length byte.
60;
61; ASSUMES the length is between the start of the function and the .again label.
62;
63 %ifndef BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
64 %define BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
65 %macro BS3CPUINSTR4_PROC_BEGIN_CMN 1
66 align 8, db 0cch
67 db BS3_CMN_NM(%1).again - BS3_CMN_NM(%1)
68BS3_PROC_BEGIN_CMN %1, BS3_PBC_NEAR
69 %endmacro
70 %endif ; !BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
71
72;;
73; The EMIT_INSTR_PLUS_ICEBP macros is for creating a common function for and
74; named after a single instruction, followed by a looping ICEBP.
75;
76; This works like a prefix to the instruction invocation, only exception is that
77; instead of [fs:xBX] you write FSxBS as that's what is wanted in the name.
78;
79 %ifndef EMIT_INSTR_PLUS_ICEBP_DEFINED
80 %define EMIT_INSTR_PLUS_ICEBP_DEFINED
81
82 %macro EMIT_INSTR_PLUS_ICEBP 2
83BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _icebp
84 %define FSxBX [fs:xBX]
85 %1 %2
86 %undef FSxBX
87.again:
88 icebp
89 jmp .again
90BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _icebp
91 %endmacro
92
93 %macro EMIT_INSTR_PLUS_ICEBP 3
94BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _icebp
95 %define FSxBX [fs:xBX]
96 %1 %2, %3
97 %undef FSxBX
98.again:
99 icebp
100 jmp .again
101BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _icebp
102 %endmacro
103
104 %macro EMIT_INSTR_PLUS_ICEBP 4
105BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _icebp
106 %define FSxBX [fs:xBX]
107 %1 %2, %3, %4
108 %undef FSxBX
109.again:
110 icebp
111 jmp .again
112BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _icebp
113 %endmacro
114
115 %macro EMIT_INSTR_PLUS_ICEBP 5
116BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _ %+ %5 %+ _icebp
117 %define FSxBX [fs:xBX]
118 %1 %2, %3, %4, %5
119 %undef FSxBX
120.again:
121 icebp
122 jmp .again
123BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _ %+ %5 %+ _icebp
124 %endmacro
125
126 %macro EMIT_INSTR_PLUS_ICEBP_C64 2
127 %if TMPL_BITS == 64
128 EMIT_INSTR_PLUS_ICEBP %1, %2
129 %endif
130 %endmacro
131
132 %macro EMIT_INSTR_PLUS_ICEBP_C64 3
133 %if TMPL_BITS == 64
134 EMIT_INSTR_PLUS_ICEBP %1, %2, %3
135 %endif
136 %endmacro
137
138 %macro EMIT_INSTR_PLUS_ICEBP_C64 4
139 %if TMPL_BITS == 64
140 EMIT_INSTR_PLUS_ICEBP %1, %2, %3, %4
141 %endif
142 %endmacro
143
144 %macro EMIT_INSTR_PLUS_ICEBP_C64 5
145 %if TMPL_BITS == 64
146 EMIT_INSTR_PLUS_ICEBP %1, %2, %3, %4, %5
147 %endif
148 %endmacro
149
150 %endif ; !EMIT_INSTR_PLUS_ICEBP_DEFINED
151
152;
153;; [v]addps
154;
155EMIT_INSTR_PLUS_ICEBP addps, XMM1, XMM2
156EMIT_INSTR_PLUS_ICEBP addps, XMM1, FSxBX
157EMIT_INSTR_PLUS_ICEBP_C64 addps, XMM8, XMM9
158EMIT_INSTR_PLUS_ICEBP_C64 addps, XMM8, FSxBX
159
160EMIT_INSTR_PLUS_ICEBP vaddps, XMM1, XMM2, XMM3
161EMIT_INSTR_PLUS_ICEBP vaddps, XMM1, XMM2, FSxBX
162EMIT_INSTR_PLUS_ICEBP_C64 vaddps, XMM8, XMM9, XMM10
163EMIT_INSTR_PLUS_ICEBP_C64 vaddps, XMM8, XMM9, FSxBX
164
165EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM2, YMM3
166EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM2, FSxBX
167EMIT_INSTR_PLUS_ICEBP_C64 vaddps, YMM8, YMM9, YMM10
168EMIT_INSTR_PLUS_ICEBP_C64 vaddps, YMM8, YMM9, FSxBX
169
170;
171;; [v]addpd
172;
173EMIT_INSTR_PLUS_ICEBP addpd, XMM1, XMM2
174EMIT_INSTR_PLUS_ICEBP addpd, XMM1, FSxBX
175EMIT_INSTR_PLUS_ICEBP_C64 addpd, XMM8, XMM9
176EMIT_INSTR_PLUS_ICEBP_C64 addpd, XMM8, FSxBX
177
178EMIT_INSTR_PLUS_ICEBP vaddpd, XMM1, XMM2, XMM3
179EMIT_INSTR_PLUS_ICEBP vaddpd, XMM1, XMM2, FSxBX
180EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, XMM8, XMM9, XMM10
181EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, XMM8, XMM9, FSxBX
182
183EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM2, YMM3
184EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM2, FSxBX
185EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, YMM8, YMM9, YMM10
186EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, YMM8, YMM9, FSxBX
187
188;
189;; [v]addss
190;
191EMIT_INSTR_PLUS_ICEBP addss, XMM1, XMM2
192EMIT_INSTR_PLUS_ICEBP addss, XMM1, FSxBX
193EMIT_INSTR_PLUS_ICEBP_C64 addss, XMM8, XMM9
194EMIT_INSTR_PLUS_ICEBP_C64 addss, XMM8, FSxBX
195
196EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM2, XMM3
197EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM2, FSxBX
198EMIT_INSTR_PLUS_ICEBP_C64 vaddss, XMM8, XMM9, XMM10
199EMIT_INSTR_PLUS_ICEBP_C64 vaddss, XMM8, XMM9, FSxBX
200
201;
202;; [v]addsd
203;
204EMIT_INSTR_PLUS_ICEBP addsd, XMM1, XMM2
205EMIT_INSTR_PLUS_ICEBP addsd, XMM1, FSxBX
206EMIT_INSTR_PLUS_ICEBP_C64 addsd, XMM8, XMM9
207EMIT_INSTR_PLUS_ICEBP_C64 addsd, XMM8, FSxBX
208
209EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM2, XMM3
210EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM2, FSxBX
211EMIT_INSTR_PLUS_ICEBP_C64 vaddsd, XMM8, XMM9, XMM10
212EMIT_INSTR_PLUS_ICEBP_C64 vaddsd, XMM8, XMM9, FSxBX
213
214;
215;; [v]haddps
216;
217EMIT_INSTR_PLUS_ICEBP haddps, XMM1, XMM2
218EMIT_INSTR_PLUS_ICEBP haddps, XMM1, FSxBX
219EMIT_INSTR_PLUS_ICEBP_C64 haddps, XMM8, XMM9
220EMIT_INSTR_PLUS_ICEBP_C64 haddps, XMM8, FSxBX
221
222EMIT_INSTR_PLUS_ICEBP vhaddps, XMM1, XMM2, XMM3
223EMIT_INSTR_PLUS_ICEBP vhaddps, XMM1, XMM2, FSxBX
224EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, XMM8, XMM9, XMM10
225EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, XMM8, XMM9, FSxBX
226
227EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM2, YMM3
228EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM2, FSxBX
229EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, YMM8, YMM9, YMM10
230EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, YMM8, YMM9, FSxBX
231
232;
233;; [v]haddpd
234;
235EMIT_INSTR_PLUS_ICEBP haddpd, XMM1, XMM2
236EMIT_INSTR_PLUS_ICEBP haddpd, XMM1, FSxBX
237EMIT_INSTR_PLUS_ICEBP_C64 haddpd, XMM8, XMM9
238EMIT_INSTR_PLUS_ICEBP_C64 haddpd, XMM8, FSxBX
239
240EMIT_INSTR_PLUS_ICEBP vhaddpd, XMM1, XMM2, XMM3
241EMIT_INSTR_PLUS_ICEBP vhaddpd, XMM1, XMM2, FSxBX
242EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, XMM8, XMM9, XMM10
243EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, XMM8, XMM9, FSxBX
244
245EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM2, YMM3
246EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM2, FSxBX
247EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, YMM8, YMM9, YMM10
248EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, YMM8, YMM9, FSxBX
249
250;
251;; [v]subps
252;
253EMIT_INSTR_PLUS_ICEBP subps, XMM1, XMM2
254EMIT_INSTR_PLUS_ICEBP subps, XMM1, FSxBX
255EMIT_INSTR_PLUS_ICEBP_C64 subps, XMM8, XMM9
256EMIT_INSTR_PLUS_ICEBP_C64 subps, XMM8, FSxBX
257
258EMIT_INSTR_PLUS_ICEBP vsubps, XMM1, XMM2, XMM3
259EMIT_INSTR_PLUS_ICEBP vsubps, XMM1, XMM2, FSxBX
260EMIT_INSTR_PLUS_ICEBP_C64 vsubps, XMM8, XMM9, XMM10
261EMIT_INSTR_PLUS_ICEBP_C64 vsubps, XMM8, XMM9, FSxBX
262
263EMIT_INSTR_PLUS_ICEBP vsubps, YMM1, YMM2, YMM3
264EMIT_INSTR_PLUS_ICEBP vsubps, YMM1, YMM2, FSxBX
265EMIT_INSTR_PLUS_ICEBP_C64 vsubps, YMM8, YMM9, YMM10
266EMIT_INSTR_PLUS_ICEBP_C64 vsubps, YMM8, YMM9, FSxBX
267
268;
269;; [v]subpd
270;
271EMIT_INSTR_PLUS_ICEBP subpd, XMM1, XMM2
272EMIT_INSTR_PLUS_ICEBP subpd, XMM1, FSxBX
273EMIT_INSTR_PLUS_ICEBP_C64 subpd, XMM8, XMM9
274EMIT_INSTR_PLUS_ICEBP_C64 subpd, XMM8, FSxBX
275
276EMIT_INSTR_PLUS_ICEBP vsubpd, XMM1, XMM2, XMM3
277EMIT_INSTR_PLUS_ICEBP vsubpd, XMM1, XMM2, FSxBX
278EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, XMM8, XMM9, XMM10
279EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, XMM8, XMM9, FSxBX
280
281EMIT_INSTR_PLUS_ICEBP vsubpd, YMM1, YMM2, YMM3
282EMIT_INSTR_PLUS_ICEBP vsubpd, YMM1, YMM2, FSxBX
283EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, YMM8, YMM9, YMM10
284EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, YMM8, YMM9, FSxBX
285
286;
287;; [v]subss
288;
289EMIT_INSTR_PLUS_ICEBP subss, XMM1, XMM2
290EMIT_INSTR_PLUS_ICEBP subss, XMM1, FSxBX
291EMIT_INSTR_PLUS_ICEBP_C64 subss, XMM8, XMM9
292EMIT_INSTR_PLUS_ICEBP_C64 subss, XMM8, FSxBX
293
294EMIT_INSTR_PLUS_ICEBP vsubss, XMM1, XMM2, XMM3
295EMIT_INSTR_PLUS_ICEBP vsubss, XMM1, XMM2, FSxBX
296EMIT_INSTR_PLUS_ICEBP_C64 vsubss, XMM8, XMM9, XMM10
297EMIT_INSTR_PLUS_ICEBP_C64 vsubss, XMM8, XMM9, FSxBX
298
299;
300;; [v]subsd
301;
302EMIT_INSTR_PLUS_ICEBP subsd, XMM1, XMM2
303EMIT_INSTR_PLUS_ICEBP subsd, XMM1, FSxBX
304EMIT_INSTR_PLUS_ICEBP_C64 subsd, XMM8, XMM9
305EMIT_INSTR_PLUS_ICEBP_C64 subsd, XMM8, FSxBX
306
307EMIT_INSTR_PLUS_ICEBP vsubsd, XMM1, XMM2, XMM3
308EMIT_INSTR_PLUS_ICEBP vsubsd, XMM1, XMM2, FSxBX
309EMIT_INSTR_PLUS_ICEBP_C64 vsubsd, XMM8, XMM9, XMM10
310EMIT_INSTR_PLUS_ICEBP_C64 vsubsd, XMM8, XMM9, FSxBX
311
312;
313;; [v]hsubps
314;
315EMIT_INSTR_PLUS_ICEBP hsubps, XMM1, XMM2
316EMIT_INSTR_PLUS_ICEBP hsubps, XMM1, FSxBX
317EMIT_INSTR_PLUS_ICEBP_C64 hsubps, XMM8, XMM9
318EMIT_INSTR_PLUS_ICEBP_C64 hsubps, XMM8, FSxBX
319
320EMIT_INSTR_PLUS_ICEBP vhsubps, XMM1, XMM2, XMM3
321EMIT_INSTR_PLUS_ICEBP vhsubps, XMM1, XMM2, FSxBX
322EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, XMM8, XMM9, XMM10
323EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, XMM8, XMM9, FSxBX
324
325EMIT_INSTR_PLUS_ICEBP vhsubps, YMM1, YMM2, YMM3
326EMIT_INSTR_PLUS_ICEBP vhsubps, YMM1, YMM2, FSxBX
327EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, YMM8, YMM9, YMM10
328EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, YMM8, YMM9, FSxBX
329
330;
331;; [v]hsubpd
332;
333EMIT_INSTR_PLUS_ICEBP hsubpd, XMM1, XMM2
334EMIT_INSTR_PLUS_ICEBP hsubpd, XMM1, FSxBX
335EMIT_INSTR_PLUS_ICEBP_C64 hsubpd, XMM8, XMM9
336EMIT_INSTR_PLUS_ICEBP_C64 hsubpd, XMM8, FSxBX
337
338EMIT_INSTR_PLUS_ICEBP vhsubpd, XMM1, XMM2, XMM3
339EMIT_INSTR_PLUS_ICEBP vhsubpd, XMM1, XMM2, FSxBX
340EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, XMM8, XMM9, XMM10
341EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, XMM8, XMM9, FSxBX
342
343EMIT_INSTR_PLUS_ICEBP vhsubpd, YMM1, YMM2, YMM3
344EMIT_INSTR_PLUS_ICEBP vhsubpd, YMM1, YMM2, FSxBX
345EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, YMM8, YMM9, YMM10
346EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, YMM8, YMM9, FSxBX
347
348;
349;; [v]mulps
350;
351EMIT_INSTR_PLUS_ICEBP mulps, XMM1, XMM2
352EMIT_INSTR_PLUS_ICEBP mulps, XMM1, FSxBX
353EMIT_INSTR_PLUS_ICEBP_C64 mulps, XMM8, XMM9
354EMIT_INSTR_PLUS_ICEBP_C64 mulps, XMM8, FSxBX
355
356EMIT_INSTR_PLUS_ICEBP vmulps, XMM1, XMM2, XMM3
357EMIT_INSTR_PLUS_ICEBP vmulps, XMM1, XMM2, FSxBX
358EMIT_INSTR_PLUS_ICEBP_C64 vmulps, XMM8, XMM9, XMM10
359EMIT_INSTR_PLUS_ICEBP_C64 vmulps, XMM8, XMM9, FSxBX
360
361EMIT_INSTR_PLUS_ICEBP vmulps, YMM1, YMM2, YMM3
362EMIT_INSTR_PLUS_ICEBP vmulps, YMM1, YMM2, FSxBX
363EMIT_INSTR_PLUS_ICEBP_C64 vmulps, YMM8, YMM9, YMM10
364EMIT_INSTR_PLUS_ICEBP_C64 vmulps, YMM8, YMM9, FSxBX
365
366;
367;; [v]mulpd
368;
369EMIT_INSTR_PLUS_ICEBP mulpd, XMM1, XMM2
370EMIT_INSTR_PLUS_ICEBP mulpd, XMM1, FSxBX
371EMIT_INSTR_PLUS_ICEBP_C64 mulpd, XMM8, XMM9
372EMIT_INSTR_PLUS_ICEBP_C64 mulpd, XMM8, FSxBX
373
374EMIT_INSTR_PLUS_ICEBP vmulpd, XMM1, XMM2, XMM3
375EMIT_INSTR_PLUS_ICEBP vmulpd, XMM1, XMM2, FSxBX
376EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, XMM8, XMM9, XMM10
377EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, XMM8, XMM9, FSxBX
378
379EMIT_INSTR_PLUS_ICEBP vmulpd, YMM1, YMM2, YMM3
380EMIT_INSTR_PLUS_ICEBP vmulpd, YMM1, YMM2, FSxBX
381EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, YMM8, YMM9, YMM10
382EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, YMM8, YMM9, FSxBX
383
384;
385;; [v]mulss
386;
387EMIT_INSTR_PLUS_ICEBP mulss, XMM1, XMM2
388EMIT_INSTR_PLUS_ICEBP mulss, XMM1, FSxBX
389EMIT_INSTR_PLUS_ICEBP_C64 mulss, XMM8, XMM9
390EMIT_INSTR_PLUS_ICEBP_C64 mulss, XMM8, FSxBX
391
392EMIT_INSTR_PLUS_ICEBP vmulss, XMM1, XMM2, XMM3
393EMIT_INSTR_PLUS_ICEBP vmulss, XMM1, XMM2, FSxBX
394EMIT_INSTR_PLUS_ICEBP_C64 vmulss, XMM8, XMM9, XMM10
395EMIT_INSTR_PLUS_ICEBP_C64 vmulss, XMM8, XMM9, FSxBX
396
397;
398;; [v]mulsd
399;
400EMIT_INSTR_PLUS_ICEBP mulsd, XMM1, XMM2
401EMIT_INSTR_PLUS_ICEBP mulsd, XMM1, FSxBX
402EMIT_INSTR_PLUS_ICEBP_C64 mulsd, XMM8, XMM9
403EMIT_INSTR_PLUS_ICEBP_C64 mulsd, XMM8, FSxBX
404
405EMIT_INSTR_PLUS_ICEBP vmulsd, XMM1, XMM2, XMM3
406EMIT_INSTR_PLUS_ICEBP vmulsd, XMM1, XMM2, FSxBX
407EMIT_INSTR_PLUS_ICEBP_C64 vmulsd, XMM8, XMM9, XMM10
408EMIT_INSTR_PLUS_ICEBP_C64 vmulsd, XMM8, XMM9, FSxBX
409
410;
411;; [v]addsubps
412;
413EMIT_INSTR_PLUS_ICEBP addsubps, XMM1, XMM2
414EMIT_INSTR_PLUS_ICEBP addsubps, XMM1, FSxBX
415EMIT_INSTR_PLUS_ICEBP_C64 addsubps, XMM8, XMM9
416EMIT_INSTR_PLUS_ICEBP_C64 addsubps, XMM8, FSxBX
417
418EMIT_INSTR_PLUS_ICEBP vaddsubps, XMM1, XMM2, XMM3
419EMIT_INSTR_PLUS_ICEBP vaddsubps, XMM1, XMM2, FSxBX
420EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, XMM8, XMM9, XMM10
421EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, XMM8, XMM9, FSxBX
422
423EMIT_INSTR_PLUS_ICEBP vaddsubps, YMM1, YMM2, YMM3
424EMIT_INSTR_PLUS_ICEBP vaddsubps, YMM1, YMM2, FSxBX
425EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, YMM13, YMM14, YMM15
426EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, YMM13, YMM14, FSxBX
427
428;
429;; [v]addsubpd
430;
431EMIT_INSTR_PLUS_ICEBP addsubpd, XMM1, XMM2
432EMIT_INSTR_PLUS_ICEBP addsubpd, XMM1, FSxBX
433EMIT_INSTR_PLUS_ICEBP_C64 addsubpd, XMM8, XMM9
434EMIT_INSTR_PLUS_ICEBP_C64 addsubpd, XMM8, FSxBX
435
436EMIT_INSTR_PLUS_ICEBP vaddsubpd, XMM1, XMM2, XMM3
437EMIT_INSTR_PLUS_ICEBP vaddsubpd, XMM1, XMM2, FSxBX
438EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, XMM8, XMM9, XMM10
439EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, XMM8, XMM9, FSxBX
440
441EMIT_INSTR_PLUS_ICEBP vaddsubpd, YMM1, YMM2, YMM3
442EMIT_INSTR_PLUS_ICEBP vaddsubpd, YMM1, YMM2, FSxBX
443EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, YMM13, YMM14, YMM15
444EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, YMM13, YMM14, FSxBX
445
446;
447;; [v]maxps
448;
449EMIT_INSTR_PLUS_ICEBP maxps, XMM1, XMM2
450EMIT_INSTR_PLUS_ICEBP maxps, XMM1, FSxBX
451EMIT_INSTR_PLUS_ICEBP_C64 maxps, XMM8, XMM9
452EMIT_INSTR_PLUS_ICEBP_C64 maxps, XMM8, FSxBX
453
454EMIT_INSTR_PLUS_ICEBP vmaxps, XMM1, XMM2, XMM3
455EMIT_INSTR_PLUS_ICEBP vmaxps, XMM1, XMM2, FSxBX
456EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, XMM8, XMM9, XMM10
457EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, XMM8, XMM9, FSxBX
458
459EMIT_INSTR_PLUS_ICEBP vmaxps, YMM1, YMM2, YMM3
460EMIT_INSTR_PLUS_ICEBP vmaxps, YMM1, YMM2, FSxBX
461EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, YMM8, YMM9, YMM10
462EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, YMM8, YMM9, FSxBX
463
464;
465;; [v]divss
466;
467EMIT_INSTR_PLUS_ICEBP divss, XMM1, XMM2
468EMIT_INSTR_PLUS_ICEBP divss, XMM1, FSxBX
469EMIT_INSTR_PLUS_ICEBP_C64 divss, XMM8, XMM9
470EMIT_INSTR_PLUS_ICEBP_C64 divss, XMM8, FSxBX
471
472EMIT_INSTR_PLUS_ICEBP vdivss, XMM1, XMM2, XMM3
473EMIT_INSTR_PLUS_ICEBP vdivss, XMM1, XMM2, FSxBX
474EMIT_INSTR_PLUS_ICEBP_C64 vdivss, XMM8, XMM9, XMM10
475EMIT_INSTR_PLUS_ICEBP_C64 vdivss, XMM8, XMM9, FSxBX
476
477%endif ; BS3_INSTANTIATING_CMN
478
479%include "bs3kit-template-footer.mac" ; reset environment
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