VirtualBox

source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-fpustate-1-template.c@ 92580

Last change on this file since 92580 was 92554, checked in by vboxsync, 3 years ago

ValKit/bs3-fpustate-1: More NEM/linux tweaks. bugref:9044

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 16.9 KB
Line 
1/* $Id: bs3-fpustate-1-template.c 92554 2021-11-22 18:36:16Z vboxsync $ */
2/** @file
3 * BS3Kit - bs3-fpustate-1, C code template.
4 */
5
6/*
7 * Copyright (C) 2007-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * The contents of this file may alternatively be used under the terms
18 * of the Common Development and Distribution License Version 1.0
19 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20 * VirtualBox OSE distribution, in which case the provisions of the
21 * CDDL are applicable instead of those of the GPL.
22 *
23 * You may elect to license modified versions of this file under the
24 * terms and conditions of either the GPL or the CDDL or both.
25 */
26
27
28/*********************************************************************************************************************************
29* Header Files *
30*********************************************************************************************************************************/
31#include <iprt/asm.h>
32#include <iprt/asm-amd64-x86.h>
33#include <VBox/VMMDevTesting.h>
34
35
36/*********************************************************************************************************************************
37* Defined Constants And Macros *
38*********************************************************************************************************************************/
39
40
41#ifdef BS3_INSTANTIATING_CMN
42
43/**
44 * Displays the differences between the two states.
45 */
46# define bs3FpuState1_Diff BS3_CMN_NM(bs3FpuState1_Diff)
47BS3_DECL_NEAR(void) bs3FpuState1_Diff(X86FXSTATE const BS3_FAR *pExpected, X86FXSTATE const BS3_FAR *pChecking)
48{
49 unsigned i;
50
51# define CHECK(a_Member, a_Fmt) \
52 if (pExpected->a_Member != pChecking->a_Member) \
53 Bs3TestPrintf(" " #a_Member ": " a_Fmt ", expected " a_Fmt "\n", pChecking->a_Member, pExpected->a_Member); \
54 else do { } while (0)
55 CHECK(FCW, "%#RX16");
56 CHECK(FSW, "%#RX16");
57 CHECK(FTW, "%#RX16");
58 CHECK(FOP, "%#RX16");
59 CHECK(FPUIP, "%#RX32");
60 CHECK(CS, "%#RX16");
61 CHECK(Rsrvd1, "%#RX16");
62 CHECK(FPUDP, "%#RX32");
63 CHECK(DS, "%#RX16");
64 CHECK(Rsrvd2, "%#RX16");
65 CHECK(MXCSR, "%#RX32");
66 CHECK(MXCSR_MASK, "%#RX32");
67# undef CHECK
68 for (i = 0; i < RT_ELEMENTS(pExpected->aRegs); i++)
69 if ( pChecking->aRegs[i].au64[0] != pExpected->aRegs[i].au64[0]
70 || pChecking->aRegs[i].au64[1] != pExpected->aRegs[i].au64[1])
71 Bs3TestPrintf("st%u: %.16Rhxs\n"
72 "exp: %.16Rhxs\n",
73 i, &pChecking->aRegs[i], &pExpected->aRegs[i]);
74 for (i = 0; i < RT_ELEMENTS(pExpected->aXMM); i++)
75 if ( pChecking->aXMM[i].au64[0] != pExpected->aXMM[i].au64[0]
76 || pChecking->aXMM[i].au64[1] != pExpected->aXMM[i].au64[1])
77 Bs3TestPrintf("xmm%u: %.16Rhxs\n"
78 " %sexp: %.16Rhxs\n",
79 i, &pChecking->aRegs[i], &pExpected->aRegs[i], i >= 10 ? " " : "");
80}
81
82
83#endif /* BS3_INSTANTIATING_CMN */
84
85
86/*
87 * Mode specific code.
88 * Mode specific code.
89 * Mode specific code.
90 */
91#ifdef BS3_INSTANTIATING_MODE
92# if TMPL_MODE == BS3_MODE_PE32 \
93 || TMPL_MODE == BS3_MODE_PP32 \
94 || TMPL_MODE == BS3_MODE_PAE32 \
95 || TMPL_MODE == BS3_MODE_LM64 \
96 || TMPL_MODE == BS3_MODE_RM
97
98/* Assembly helpers: */
99BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_InitState)(X86FXSTATE BS3_FAR *pFxState, void BS3_FAR *pvMmioReg);
100BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Restore)(X86FXSTATE const BS3_FAR *pFxState);
101BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Save)(X86FXSTATE BS3_FAR *pFxState);
102
103BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FNStEnv)(void BS3_FAR *pvMmioReg);
104BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Read)(void BS3_FAR *pvMmioReg, void BS3_FAR *pvResult);
105BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Write)(void BS3_FAR *pvMmioReg);
106BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovUPS_Read)(void BS3_FAR *pvMmioReg, void BS3_FAR *pvResult);
107BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovUPS_Write)(void BS3_FAR *pvMmioReg);
108BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FMul)(void BS3_FAR *pvMmioReg, void BS3_FAR *pvNoResult);
109
110
111/**
112 * Checks if we're seeing a problem with fnstenv saving zero selectors when
113 * running on the compare area.
114 *
115 * This triggers in NEM mode if the native hypervisor doesn't do a good enough
116 * job at save the FPU state for 16-bit and 32-bit guests. We have heuristics
117 * in CPUMInternal.mac (SAVE_32_OR_64_FPU) for this.
118 *
119 * @returns true if this the zero selector issue.
120 * @param pabReadback The MMIO read buffer containing the fnstenv result
121 * typically produced by IEM.
122 * @param pabCompare The buffer containing the fnstenv result typcially
123 * produced by the CPU itself.
124 */
125static bool TMPL_NM(bs3FpuState1_IsZeroFnStEnvSelectorsProblem)(const uint8_t BS3_FAR *pabReadback,
126 const uint8_t BS3_FAR *pabCompare)
127{
128 unsigned const offCs = ARCH_BITS == 16 ? 8 : 16;
129 unsigned const offDs = ARCH_BITS == 16 ? 12 : 24;
130 if ( *(const uint16_t BS3_FAR *)&pabCompare[offCs] == 0
131 && *(const uint16_t BS3_FAR *)&pabCompare[offDs] == 0)
132 {
133 /* Check the stuff before the CS register: */
134 if (Bs3MemCmp(pabReadback, pabCompare, offCs) == 0)
135 {
136 /* Check the stuff between the DS and CS registers:*/
137 if (Bs3MemCmp(&pabReadback[offCs + 2], &pabCompare[offCs + 2], offDs - offCs - 2) == 0)
138 {
139#if ARCH_BITS != 16
140 /* Check the stuff after the DS register if 32-bit mode: */
141 if ( *(const uint16_t BS3_FAR *)&pabReadback[offDs + 2]
142 == *(const uint16_t BS3_FAR *)&pabCompare[offDs + 2])
143#endif
144 return true;
145 }
146 }
147 }
148 return false;
149}
150
151
152/**
153 * Tests for FPU state corruption.
154 *
155 * First we don't do anything to quit guest context for a while.
156 * Then we start testing weird MMIO accesses, some which amonger other things
157 * forces the use of the FPU state or host FPU to do the emulation. Both are a
158 * little complicated in raw-mode and ring-0 contexts.
159 *
160 * We ASSUME FXSAVE/FXRSTOR support here.
161 */
162BS3_DECL_FAR(uint8_t) TMPL_NM(bs3FpuState1_Corruption)(uint8_t bMode)
163{
164 /* We don't need to test that many modes, probably. */
165
166 uint8_t abBuf[sizeof(X86FXSTATE)*2 + 32];
167 uint8_t BS3_FAR *pbTmp = &abBuf[0x10 - (((uintptr_t)abBuf) & 0x0f)];
168 X86FXSTATE BS3_FAR *pExpected = (X86FXSTATE BS3_FAR *)pbTmp;
169 X86FXSTATE BS3_FAR *pChecking = pExpected + 1;
170 uint32_t iLoop;
171 uint32_t uStartTick;
172 bool fMmioReadback;
173 bool fReadBackError = false;
174 bool fReadError = false;
175 uint32_t cFnStEnvSelectorsZero = 0;
176 BS3PTRUNION MmioReg;
177 BS3CPUVENDOR const enmCpuVendor = Bs3GetCpuVendor();
178 bool const fSkipStorIdt = Bs3TestQueryCfgBool(VMMDEV_TESTING_CFG_IS_NEM_LINUX);
179 bool const fMayHaveZeroStEnvSels = Bs3TestQueryCfgBool(VMMDEV_TESTING_CFG_IS_NEM_LINUX);
180 bool const fFastFxSaveRestore = RT_BOOL(ASMCpuId_EDX(0x80000001) & X86_CPUID_AMD_FEATURE_EDX_FFXSR);
181 //bool const fFdpXcptOnly = (ASMCpuIdEx_EBX(7, 0) & X86_CPUID_STEXT_FEATURE_EBX_FDP_EXCPTN_ONLY)
182 // && ASMCpuId_EAX(0) >= 7;
183 RT_NOREF(bMode);
184
185 if (fSkipStorIdt)
186 Bs3TestPrintf("NEM/linux - skipping SIDT\n");
187
188# undef CHECK_STATE
189# define CHECK_STATE(a_Instr, a_fIsFnStEnv) \
190 do { \
191 TMPL_NM(bs3FpuState1_Save)(pChecking); \
192 if (Bs3MemCmp(pExpected, pChecking, sizeof(*pExpected)) != 0) \
193 { \
194 Bs3TestFailedF("State differs after " #a_Instr " (write) in loop #%RU32\n", iLoop); \
195 bs3FpuState1_Diff(pExpected, pChecking); \
196 Bs3PitDisable(); \
197 return 1; \
198 } \
199 } while (0)
200
201
202 /* Make this code executable in raw-mode. A bit tricky. */
203 ASMSetCR0(ASMGetCR0() | X86_CR0_WP);
204 Bs3PitSetupAndEnablePeriodTimer(20);
205 ASMIntEnable();
206# if ARCH_BITS != 64
207 ASMHalt();
208# endif
209
210 /* Figure out which MMIO region we'll be using so we can correctly initialize FPUDS. */
211# if BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
212 MmioReg.pv = BS3_FP_MAKE(VMMDEV_TESTING_MMIO_RM_SEL, VMMDEV_TESTING_MMIO_RM_OFF2(0));
213# elif BS3_MODE_IS_16BIT_CODE(TMPL_MODE)
214 MmioReg.pv = BS3_FP_MAKE(BS3_SEL_VMMDEV_MMIO16, 0);
215# else
216 MmioReg.pv = (uint8_t *)VMMDEV_TESTING_MMIO_BASE;
217# endif
218 if (MmioReg.pu32[VMMDEV_TESTING_MMIO_OFF_NOP / sizeof(uint32_t)] == VMMDEV_TESTING_NOP_RET)
219 {
220 fMmioReadback = true;
221 MmioReg.pb += VMMDEV_TESTING_MMIO_OFF_READBACK;
222 }
223 else
224 {
225 Bs3TestPrintf("VMMDev MMIO not found, using VGA instead\n");
226 fMmioReadback = false;
227 MmioReg.pv = Bs3XptrFlatToCurrent(0xa7800);
228 }
229
230 /* Make 100% sure we don't trap accessing the FPU state and that we can use fxsave/fxrstor. */
231 g_usBs3TestStep = 1;
232 ASMSetCR0((ASMGetCR0() & ~(X86_CR0_TS | X86_CR0_EM)) | X86_CR0_MP);
233 ASMSetCR4(ASMGetCR4() | X86_CR4_OSFXSR /*| X86_CR4_OSXMMEEXCPT*/);
234
235 /* Come up with a distinct state. We do that from assembly (will do FPU in R0/RC). */
236 g_usBs3TestStep = 2;
237 Bs3MemSet(abBuf, 0x42, sizeof(abBuf));
238 TMPL_NM(bs3FpuState1_InitState)(pExpected, MmioReg.pb);
239
240
241 /*
242 * Test #1: Check that we can keep it consistent for a while.
243 */
244 g_usBs3TestStep = 3;
245 uStartTick = g_cBs3PitTicks;
246 for (iLoop = 0; iLoop < _16M; iLoop++)
247 {
248 CHECK_STATE(nop, false);
249 if ( (iLoop & 0xffff) == 0xffff
250 && g_cBs3PitTicks - uStartTick >= 20 * 20) /* 20 seconds*/
251 break;
252 }
253
254 /*
255 * Test #2: Use various FPU, SSE and weird instructions to do MMIO writes.
256 *
257 * We'll use the VMMDev readback register if possible, but make do
258 * with VGA if not configured.
259 */
260 g_usBs3TestStep = 4;
261 uStartTick = g_cBs3PitTicks;
262 for (iLoop = 0; iLoop < _1M; iLoop++)
263 {
264 unsigned off;
265 uint8_t abCompare[64];
266 uint8_t abReadback[64];
267
268 /* Macros */
269# undef CHECK_READBACK_WRITE_RUN
270# define CHECK_READBACK_WRITE_RUN(a_Instr, a_Worker, a_Type, a_fIsFnStEnv) \
271 do { \
272 off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
273 if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
274 off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
275 a_Worker((a_Type *)&MmioReg.pb[off]); \
276 if (fMmioReadback && (!fReadBackError || iLoop == 0)) \
277 { \
278 a_Worker((a_Type *)&abCompare[0]); \
279 Bs3MemCpy(abReadback, &MmioReg.pb[off], sizeof(a_Type)); \
280 if (Bs3MemCmp(abReadback, abCompare, sizeof(a_Type)) == 0) \
281 { /* likely */ } \
282 else if ( (a_fIsFnStEnv) \
283 && fMayHaveZeroStEnvSels \
284 && TMPL_NM(bs3FpuState1_IsZeroFnStEnvSelectorsProblem)(abReadback, abCompare)) \
285 cFnStEnvSelectorsZero += 1; \
286 else \
287 { \
288 Bs3TestFailedF("Read back error for " #a_Instr " in loop #%RU32:\n%.*Rhxs expected:\n%.*Rhxs\n", \
289 iLoop, sizeof(a_Type), abReadback, sizeof(a_Type), abCompare); \
290 fReadBackError = true; \
291 } \
292 } \
293 } while (0)
294
295# undef CHECK_READBACK_WRITE
296# define CHECK_READBACK_WRITE(a_Instr, a_Worker, a_Type, a_fIsFnStEnv) \
297 CHECK_READBACK_WRITE_RUN(a_Instr, a_Worker, a_Type, a_fIsFnStEnv); \
298 CHECK_STATE(a_Instr, a_fIsFnStEnv)
299# undef CHECK_READBACK_WRITE_Z
300# define CHECK_READBACK_WRITE_Z(a_Instr, a_Worker, a_Type, a_fIsFnStEnv) \
301 do { \
302 if (fMmioReadback && (!fReadBackError || iLoop == 0)) \
303 { \
304 Bs3MemZero(&abCompare[0], sizeof(a_Type)); \
305 off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
306 if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
307 off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
308 Bs3MemZero(&MmioReg.pb[off], sizeof(a_Type)); \
309 } \
310 CHECK_READBACK_WRITE(a_Instr, a_Worker, a_Type, a_fIsFnStEnv); \
311 } while (0)
312
313# undef CHECK_READBACK_READ_RUN
314#define CHECK_READBACK_READ_RUN(a_Instr, a_Worker, a_Type) \
315 do { \
316 off = (unsigned)(iLoop & (VMMDEV_TESTING_READBACK_SIZE / 2 - 1)); \
317 if (off + sizeof(a_Type) > VMMDEV_TESTING_READBACK_SIZE) \
318 off = VMMDEV_TESTING_READBACK_SIZE - sizeof(a_Type); \
319 a_Worker((a_Type *)&MmioReg.pb[off], (a_Type *)&abReadback[0]); \
320 TMPL_NM(bs3FpuState1_Save)(pChecking); \
321 } while (0)
322# undef CHECK_READBACK_READ
323# define CHECK_READBACK_READ(a_Instr, a_Worker, a_Type) \
324 do { \
325 Bs3MemSet(&abReadback[0], 0xcc, sizeof(abReadback)); \
326 CHECK_READBACK_READ_RUN(a_Instr, a_Worker, a_Type); \
327 CHECK_STATE(a_Instr, false); \
328 if (!fReadError || iLoop == 0) \
329 { \
330 Bs3MemZero(&abCompare[0], sizeof(abCompare)); \
331 Bs3MemCpy(&abCompare[0], &MmioReg.pb[off], sizeof(a_Type)); \
332 if (Bs3MemCmp(abReadback, abCompare, sizeof(a_Type)) != 0) \
333 { \
334 Bs3TestFailedF("Read result check for " #a_Instr " in loop #%RU32:\n%.*Rhxs expected:\n%.*Rhxs\n", \
335 iLoop, sizeof(a_Type), abReadback, sizeof(a_Type), abCompare); \
336 fReadError = true; \
337 } \
338 } \
339 } while (0)
340
341 /* The tests. */
342 if (!fSkipStorIdt) /* KVM doesn't advance RIP executing a SIDT [MMIO-memory], it seems. (Linux 5.13.1) */
343 CHECK_READBACK_WRITE_Z(SIDT, ASMGetIDTR, RTIDTR, false);
344 CHECK_READBACK_WRITE_Z(FNSTENV, TMPL_NM(bs3FpuState1_FNStEnv), X86FSTENV32P, true); /** @todo x86.h is missing types */
345 CHECK_READBACK_WRITE( MOVDQU, TMPL_NM(bs3FpuState1_MovDQU_Write), X86XMMREG, false);
346 CHECK_READBACK_READ( MOVDQU, TMPL_NM(bs3FpuState1_MovDQU_Read), X86XMMREG);
347 CHECK_READBACK_WRITE( MOVUPS, TMPL_NM(bs3FpuState1_MovUPS_Write), X86XMMREG, false);
348 CHECK_READBACK_READ( MOVUPS, TMPL_NM(bs3FpuState1_MovUPS_Read), X86XMMREG);
349
350 /* Using the FPU is a little complicated, but we really need to check these things. */
351 CHECK_READBACK_READ_RUN(FMUL, TMPL_NM(bs3FpuState1_FMul), uint64_t);
352 if (enmCpuVendor == BS3CPUVENDOR_INTEL)
353# if BS3_MODE_IS_16BIT_CODE(TMPL_MODE)
354 pExpected->FOP = 0x040f; // skylake 6700k
355# else
356 pExpected->FOP = 0x040b; // skylake 6700k
357# endif
358 else if (enmCpuVendor == BS3CPUVENDOR_AMD && fFastFxSaveRestore)
359 pExpected->FOP = 0x0000; // Zen2 (3990x)
360 else
361 pExpected->FOP = 0x07dc; // dunno where we got this.
362# if ARCH_BITS == 64
363 pExpected->FPUDP = (uint32_t) (uintptr_t)&MmioReg.pb[off];
364 pExpected->DS = (uint16_t)((uintptr_t)&MmioReg.pb[off] >> 32);
365 pExpected->Rsrvd2 = (uint16_t)((uintptr_t)&MmioReg.pb[off] >> 48);
366# elif BS3_MODE_IS_RM_OR_V86(TMPL_MODE)
367 pExpected->FPUDP = Bs3SelPtrToFlat(&MmioReg.pb[off]);
368# else
369 pExpected->FPUDP = BS3_FP_OFF(&MmioReg.pb[off]);
370# endif
371 if (enmCpuVendor == BS3CPUVENDOR_AMD && fFastFxSaveRestore)
372 pExpected->FPUDP = 0; // Zen2 (3990x)
373 CHECK_STATE(FMUL, false);
374
375 /* check for timeout every now an then. */
376 if ( (iLoop & 0xfff) == 0xfff
377 && g_cBs3PitTicks - uStartTick >= 20 * 20) /* 20 seconds*/
378 break;
379 }
380
381 Bs3PitDisable();
382
383 /*
384 * Warn if selectors are borked (for real VBox we'll fail and not warn).
385 */
386 if (cFnStEnvSelectorsZero > 0)
387 Bs3TestPrintf("Warning! NEM borked the FPU selectors %u times.\n", cFnStEnvSelectorsZero);
388 return 0;
389}
390# endif
391#endif /* BS3_INSTANTIATING_MODE */
392
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette