VirtualBox

source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-PagingQueryAddressInfo.c@ 98103

Last change on this file since 98103 was 98103, checked in by vboxsync, 2 years ago

Copyright year updates by scm.

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1/* $Id: bs3-cmn-PagingQueryAddressInfo.c 98103 2023-01-17 14:15:46Z vboxsync $ */
2/** @file
3 * BS3Kit - Bs3PagingQueryAddressInfo
4 */
5
6/*
7 * Copyright (C) 2007-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * The contents of this file may alternatively be used under the terms
26 * of the Common Development and Distribution License Version 1.0
27 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28 * in the VirtualBox distribution, in which case the provisions of the
29 * CDDL are applicable instead of those of the GPL.
30 *
31 * You may elect to license modified versions of this file under the
32 * terms and conditions of either the GPL or the CDDL or both.
33 *
34 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35 */
36
37
38/*********************************************************************************************************************************
39* Header Files *
40*********************************************************************************************************************************/
41#include <bs3kit.h>
42#include <iprt/asm-amd64-x86.h>
43#include <VBox/err.h>
44
45
46#undef Bs3PagingQueryAddressInfo
47BS3_CMN_DEF(int, Bs3PagingQueryAddressInfo,(uint64_t uFlat, PBS3PAGINGINFO4ADDR pPgInfo))
48{
49 RTCCUINTXREG const cr3 = ASMGetCR3();
50 RTCCUINTXREG const cr4 = g_uBs3CpuDetected & BS3CPU_F_CPUID ? ASMGetCR4() : 0;
51 bool const fLegacyPTs = !(cr4 & X86_CR4_PAE);
52 int rc = VERR_OUT_OF_RANGE;
53
54
55 pPgInfo->fFlags = 0;
56 pPgInfo->u.apbEntries[0] = NULL;
57 pPgInfo->u.apbEntries[1] = NULL;
58 pPgInfo->u.apbEntries[2] = NULL;
59 pPgInfo->u.apbEntries[3] = NULL;
60
61 if (!fLegacyPTs)
62 {
63#if TMPL_BITS == 16
64 uint32_t const uMaxAddr = BS3_MODE_IS_RM_OR_V86(g_bBs3CurrentMode) ? _1M - 1 : BS3_SEL_TILED_AREA_SIZE - 1;
65#else
66 uintptr_t const uMaxAddr = ~(uintptr_t)0;
67#endif
68 uint64_t const fEfer = g_uBs3CpuDetected & BS3CPU_F_LONG_MODE ? ASMRdMsr(MSR_K6_EFER) : 0;
69
70 pPgInfo->cEntries = fEfer & MSR_K6_EFER_LMA ? 4 : 3;
71 pPgInfo->cbEntry = sizeof(X86PTEPAE);
72 if ((cr3 & X86_CR3_AMD64_PAGE_MASK) <= uMaxAddr)
73 {
74 if ( (fEfer & MSR_K6_EFER_LMA)
75 && X86_IS_CANONICAL(uFlat))
76 {
77 /* 48-bit long mode paging. */
78 pPgInfo->u.Pae.pPml4e = (X86PML4E BS3_FAR *)Bs3XptrFlatToCurrent(cr3 & X86_CR3_AMD64_PAGE_MASK);
79 pPgInfo->u.Pae.pPml4e += (uFlat >> X86_PML4_SHIFT) & X86_PML4_MASK;
80 if (!pPgInfo->u.Pae.pPml4e->n.u1Present)
81 rc = VERR_PAGE_NOT_PRESENT;
82 else if ((pPgInfo->u.Pae.pPml4e->u & X86_PML4E_PG_MASK) <= uMaxAddr)
83 {
84 pPgInfo->u.Pae.pPdpe = (X86PDPE BS3_FAR *)Bs3XptrFlatToCurrent(pPgInfo->u.Pae.pPml4e->u & X86_PML4E_PG_MASK);
85 pPgInfo->u.Pae.pPdpe += (uFlat >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64;
86 if (!pPgInfo->u.Pae.pPdpe->n.u1Present)
87 rc = VERR_PAGE_NOT_PRESENT;
88 else if (pPgInfo->u.Pae.pPdpe->b.u1Size)
89 rc = VINF_SUCCESS;
90 else
91 rc = VINF_TRY_AGAIN;
92 }
93 }
94 else if ( !(fEfer & MSR_K6_EFER_LMA)
95 && uFlat <= _4G)
96 {
97 /* 32-bit PAE paging. */
98 pPgInfo->u.Pae.pPdpe = (X86PDPE BS3_FAR *)Bs3XptrFlatToCurrent(cr3 & X86_CR3_PAE_PAGE_MASK);
99 pPgInfo->u.Pae.pPdpe += ((uint32_t)uFlat >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE;
100 if (!pPgInfo->u.Pae.pPdpe->n.u1Present)
101 rc = VERR_PAGE_NOT_PRESENT;
102 else
103 rc = VINF_TRY_AGAIN;
104 }
105
106 /* Common code for the PD and PT levels. */
107 if ( rc == VINF_TRY_AGAIN
108 && (pPgInfo->u.Pae.pPdpe->u & X86_PDPE_PG_MASK) <= uMaxAddr)
109 {
110 rc = VERR_OUT_OF_RANGE;
111 pPgInfo->u.Pae.pPde = (X86PDEPAE BS3_FAR *)Bs3XptrFlatToCurrent(pPgInfo->u.Pae.pPdpe->u & X86_PDPE_PG_MASK);
112 pPgInfo->u.Pae.pPde += (uFlat >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
113 if (!pPgInfo->u.Pae.pPde->n.u1Present)
114 rc = VERR_PAGE_NOT_PRESENT;
115 else if (pPgInfo->u.Pae.pPde->b.u1Size)
116 rc = VINF_SUCCESS;
117 else if ((pPgInfo->u.Pae.pPde->u & X86_PDE_PAE_PG_MASK) <= uMaxAddr)
118 {
119 pPgInfo->u.Pae.pPte = (X86PTEPAE BS3_FAR *)Bs3XptrFlatToCurrent(pPgInfo->u.Pae.pPde->u & X86_PDE_PAE_PG_MASK);
120 rc = VINF_SUCCESS;
121 }
122 }
123 else if (rc == VINF_TRY_AGAIN)
124 rc = VERR_OUT_OF_RANGE;
125 }
126 }
127 else
128 {
129#if TMPL_BITS == 16
130 uint32_t const uMaxAddr = BS3_MODE_IS_RM_OR_V86(g_bBs3CurrentMode) ? _1M - 1 : BS3_SEL_TILED_AREA_SIZE - 1;
131#else
132 uint32_t const uMaxAddr = UINT32_MAX;
133#endif
134
135 pPgInfo->cEntries = 2;
136 pPgInfo->cbEntry = sizeof(X86PTE);
137 if ( uFlat < _4G
138 && cr3 <= uMaxAddr)
139 {
140 pPgInfo->u.Legacy.pPde = (X86PDE BS3_FAR *)Bs3XptrFlatToCurrent(cr3 & X86_CR3_PAGE_MASK);
141 pPgInfo->u.Legacy.pPde += ((uint32_t)uFlat >> X86_PD_SHIFT) & X86_PD_MASK;
142 if (!pPgInfo->u.Legacy.pPde->b.u1Present)
143 rc = VERR_PAGE_NOT_PRESENT;
144 else if (pPgInfo->u.Legacy.pPde->b.u1Size)
145 rc = VINF_SUCCESS;
146 else if (pPgInfo->u.Legacy.pPde->u <= uMaxAddr)
147 {
148 pPgInfo->u.Legacy.pPte = (X86PTE BS3_FAR *)Bs3XptrFlatToCurrent(pPgInfo->u.Legacy.pPde->u & X86_PDE_PG_MASK);
149 pPgInfo->u.Legacy.pPte += ((uint32_t)uFlat >> X86_PT_SHIFT) & X86_PT_MASK;
150 if (pPgInfo->u.Legacy.pPte->n.u1Present)
151 rc = VINF_SUCCESS;
152 else
153 rc = VERR_PAGE_NOT_PRESENT;
154 }
155 }
156 }
157 return rc;
158}
159
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