1 | /* $Id: bs3-rm-InitMemory.c 59941 2016-03-07 15:13:51Z vboxsync $ */
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2 | /** @file
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3 | * BS3Kit - Bs3InitMemory
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2007-2015 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * The contents of this file may alternatively be used under the terms
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18 | * of the Common Development and Distribution License Version 1.0
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19 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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20 | * VirtualBox OSE distribution, in which case the provisions of the
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21 | * CDDL are applicable instead of those of the GPL.
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22 | *
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23 | * You may elect to license modified versions of this file under the
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24 | * terms and conditions of either the GPL or the CDDL or both.
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25 | */
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26 |
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27 | /*********************************************************************************************************************************
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28 | * Header Files *
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29 | *********************************************************************************************************************************/
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30 | #include "bs3kit-template-header.h"
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31 | #include "bs3-cmn-memory.h"
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32 | #include <iprt/asm.h>
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33 |
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34 |
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35 | /*********************************************************************************************************************************
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36 | * Structures and Typedefs *
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37 | *********************************************************************************************************************************/
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38 |
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39 | typedef struct INT15E820ENTRY
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40 | {
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41 | uint64_t uBaseAddr;
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42 | uint64_t cbRange;
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43 | /** Memory type this entry describes, see INT15E820_TYPE_XXX. */
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44 | uint32_t uType;
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45 | uint32_t fAcpi3;
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46 | } INT15E820ENTRY;
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47 | AssertCompileSize(INT15E820ENTRY,24);
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48 |
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49 |
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50 | /** @name INT15E820_TYPE_XXX - Memory types returned by int 15h function 0xe820.
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51 | * @{ */
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52 | #define INT15E820_TYPE_USABLE 1 /**< Usable RAM. */
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53 | #define INT15E820_TYPE_RESERVED 2 /**< Reserved by the system, unusable. */
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54 | #define INT15E820_TYPE_ACPI_RECLAIMABLE 3 /**< ACPI reclaimable memory, whatever that means. */
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55 | #define INT15E820_TYPE_ACPI_NVS 4 /**< ACPI non-volatile storage? */
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56 | #define INT15E820_TYPE_BAD 5 /**< Bad memory, unusable. */
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57 | /** @} */
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58 |
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59 |
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60 | /**
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61 | * Performs a int 15h function 0xe820 call.
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62 | *
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63 | * @returns Continuation value on success, 0 on failure.
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64 | * (Because of the way the API works, EBX should never be zero when
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65 | * data is returned.)
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66 | * @param pEntry The return buffer.
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67 | * @param cbEntry The size of the buffer (min 20 bytes).
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68 | * @param uContinuationValue Zero the first time, the return value from the
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69 | * previous call after that.
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70 | */
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71 | BS3_DECL(uint32_t) Bs3BiosInt15hE820(INT15E820ENTRY BS3_FAR *pEntry, size_t cbEntry, uint32_t uContinuationValue);
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72 | #pragma aux Bs3BiosInt15hE820 = \
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73 | ".386" \
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74 | "shl ebx, 10h" \
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75 | "mov bx, ax" /* ebx = continutation */ \
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76 | "movzx ecx, cx" \
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77 | "movzx edi, di" \
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78 | "mov edx, 0534d4150h" /*SMAP*/ \
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79 | "mov eax, 0xe820" \
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80 | "int 15h" \
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81 | "jc failed" \
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82 | "cmp eax, 0534d4150h" \
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83 | "jne failed" \
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84 | "cmp cx, 20" \
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85 | "jb failed" \
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86 | "mov ax, bx" \
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87 | "shr ebx, 10h" /* ax:bx = continuation */ \
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88 | "jmp done" \
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89 | "failed:" \
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90 | "xor ax, ax" \
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91 | "xor bx, bx" \
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92 | "done:" \
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93 | parm [es di] [cx] [ax bx] \
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94 | value [ax bx] \
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95 | modify exact [ax bx cx dx di es];
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96 |
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97 |
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98 | /*********************************************************************************************************************************
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99 | * Global Variables *
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100 | *********************************************************************************************************************************/
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101 | /** Slab control structure for the 4K management of low memory (< 1MB). */
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102 | BS3SLABCTLLOW BS3_DATA_NM(g_Bs3Mem4KLow);
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103 | /** Slab control structure for the 4K management of tiled upper memory,
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104 | * between 1 MB and 16MB. */
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105 | BS3SLABCTLUPPERTILED BS3_DATA_NM(g_Bs3Mem4KUpperTiled);
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106 |
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107 |
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108 | /** Translates a power of two request size to an slab list index. */
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109 | uint8_t const BS3_DATA_NM(g_aiBs3SlabListsByPowerOfTwo)[12] =
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110 | {
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111 | /* 2^0 = 1 */ 0,
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112 | /* 2^1 = 2 */ 0,
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113 | /* 2^2 = 4 */ 0,
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114 | /* 2^3 = 8 */ 0,
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115 | /* 2^4 = 16 */ 0,
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116 | /* 2^5 = 32 */ 1,
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117 | /* 2^6 = 64 */ 2,
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118 | /* 2^7 = 128 */ 3,
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119 | /* 2^8 = 256 */ 4,
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120 | /* 2^9 = 512 */ 5,
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121 | /* 2^10 = 1024 */ -1
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122 | /* 2^11 = 2048 */ -1
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123 | };
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124 |
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125 | /** The slab list chunk sizes. */
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126 | uint16_t const BS3_DATA_NM(g_acbBs3SlabLists)[BS3_MEM_SLAB_LIST_COUNT] =
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127 | {
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128 | 16,
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129 | 32,
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130 | 64,
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131 | 128,
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132 | 256,
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133 | 512,
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134 | };
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135 |
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136 | /** Low memory slab lists, sizes given by g_acbBs3SlabLists. */
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137 | BS3SLABHEAD BS3_DATA_NM(g_aBs3LowSlabLists)[BS3_MEM_SLAB_LIST_COUNT];
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138 | /** Upper tiled memory slab lists, sizes given by g_acbBs3SlabLists. */
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139 | BS3SLABHEAD BS3_DATA_NM(g_aBs3UpperTiledSlabLists)[BS3_MEM_SLAB_LIST_COUNT];
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140 |
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141 | /** Slab control structure sizes for the slab lists.
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142 | * This is to help the allocator when growing a list. */
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143 | uint16_t const BS3_DATA_NM(g_cbBs3SlabCtlSizesforLists)[BS3_MEM_SLAB_LIST_COUNT] =
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144 | {
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145 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 16 / 8 /*=32*/), 16),
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146 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 32 / 8 /*=16*/), 32),
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147 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 64 / 8 /*=8*/), 64),
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148 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 128 / 8 /*=4*/), 128),
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149 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 256 / 8 /*=2*/), 256),
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150 | RT_ALIGN(sizeof(BS3SLABCTL) - 4 + (4096 / 512 / 8 /*=1*/), 512),
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151 | };
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152 |
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153 |
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154 |
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155 | BS3_DECL(void) Bs3InitMemory_rm(void)
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156 | {
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157 | uint16_t i;
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158 | uint16_t cPages;
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159 | INT15E820ENTRY Entry;
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160 |
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161 | /*
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162 | * Enable the A20 gate.
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163 | */
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164 | Bs3A20Enable();
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165 |
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166 | /*
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167 | * Low memory (4K chunks).
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168 | * - 0x00000 to 0x004ff - Interrupt Vector table, BIOS data area.
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169 | * - 0x01000 to 0x0ffff - Stacks.
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170 | * - 0x10000 to 0x1yyyy - BS3TEXT16
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171 | * - 0x20000 to 0x26fff - BS3SYSTEM16
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172 | * - 0x27000 to 0xzzzzz - BS3DATA16, BS3TEXT32, BS3TEXT64, BS3DATA32, BS3DATA64 (in that order).
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173 | * - 0xzzzzZ to 0x9fdff - Free conventional memory.
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174 | * - 0x9fc00 to 0x9ffff - Extended BIOS data area (exact start may vary).
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175 | * - 0xa0000 to 0xbffff - VGA MMIO
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176 | * - 0xc0000 to 0xc7fff - VGA BIOS
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177 | * - 0xc8000 to 0xeffff - ROMs, tables, unusable.
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178 | * - 0xf0000 to 0xfffff - PC BIOS.
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179 | */
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180 | Bs3SlabInit(&BS3_DATA_NM(g_Bs3Mem4KLow).Core, sizeof(BS3_DATA_NM(g_Bs3Mem4KLow)),
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181 | 0 /*uFlatSlabPtr*/, 0xA0000 /* 640 KB*/, _4K);
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182 |
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183 | /* Mark the stacks and whole image as allocated. */
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184 | cPages = (BS3_DATA_NM(Bs3TotalImageSize) + _4K - 1U) >> 12;
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185 | ASMBitSetRange(BS3_DATA_NM(g_Bs3Mem4KLow).Core.bmAllocated, 0, 0x10 + cPages);
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186 |
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187 | /* Mark any unused pages between BS3TEXT16 and BS3SYSTEM16 as free. */
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188 | cPages = (BS3_DATA_NM(Bs3Text16_Size) + _4K - 1U) >> 12;
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189 | ASMBitClearRange(BS3_DATA_NM(g_Bs3Mem4KLow).Core.bmAllocated, 0x10U + cPages, 0x20U);
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190 |
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191 | /* In case the system has less than 640KB of memory, check the BDA variable for it. */
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192 | cPages = *(uint16_t BS3_FAR *)BS3_FP_MAKE(0x0000, 0x0413); /* KB of low memory */
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193 | if (cPages < 640)
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194 | {
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195 | cPages = 640 - cPages;
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196 | cPages = RT_ALIGN(cPages, 4);
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197 | cPages >>= 2;
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198 | ASMBitSetRange(BS3_DATA_NM(g_Bs3Mem4KLow).Core.bmAllocated, 0xA0 - cPages, 0xA0);
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199 | }
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200 | else
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201 | ASMBitSet(BS3_DATA_NM(g_Bs3Mem4KLow).Core.bmAllocated, 0x9F);
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202 |
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203 | /* Recalc free pages. */
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204 | cPages = 0;
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205 | i = BS3_DATA_NM(g_Bs3Mem4KLow).Core.cChunks;
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206 | while (i-- > 0)
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207 | cPages += !ASMBitTest(BS3_DATA_NM(g_Bs3Mem4KLow).Core.bmAllocated, i);
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208 | BS3_DATA_NM(g_Bs3Mem4KLow).Core.cFreeChunks = cPages;
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209 |
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210 | /*
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211 | * First 16 MB of memory above 1MB. We start out by marking it all allocated.
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212 | */
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213 | Bs3SlabInit(&BS3_DATA_NM(g_Bs3Mem4KUpperTiled).Core, sizeof(BS3_DATA_NM(g_Bs3Mem4KUpperTiled)),
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214 | _1M, BS3_SEL_TILED_AREA_SIZE - _1M, _4K);
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215 |
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216 | ASMBitSetRange(BS3_DATA_NM(g_Bs3Mem4KUpperTiled).Core.bmAllocated, 0, BS3_DATA_NM(g_Bs3Mem4KUpperTiled).Core.cChunks);
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217 | BS3_DATA_NM(g_Bs3Mem4KUpperTiled).Core.cFreeChunks = 0;
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218 |
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219 | /* Ask the BIOS about where there's memory, and make pages in between 1MB
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220 | and BS3_SEL_TILED_AREA_SIZE present. This means we're only interested
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221 | in entries describing usable memory, ASSUMING of course no overlaps. */
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222 | if ( (BS3_DATA_NM(g_uBs3CpuDetected) & BS3CPU_TYPE_MASK) >= BS3CPU_80386
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223 | && Bs3BiosInt15hE820(&Entry, sizeof(Entry), 0) != 0)
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224 | {
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225 | uint32_t uCont = 0;
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226 | i = 0;
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227 | while ( (uCont = Bs3BiosInt15hE820(&Entry, sizeof(Entry), uCont)) != 0
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228 | && i++ < 2048)
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229 | {
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230 | if (Entry.uType == INT15E820_TYPE_USABLE)
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231 | {
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232 | if (Entry.uBaseAddr < BS3_SEL_TILED_AREA_SIZE)
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233 | {
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234 | /* Entry concerning tiled memory. Convert from 64-bit to 32-bit
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235 | values and check whether it's concerning anything at or above 1MB */
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236 | uint32_t uRange = (uint32_t)Entry.uBaseAddr;
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237 | uint32_t cbRange = Entry.cbRange >= BS3_SEL_TILED_AREA_SIZE
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238 | ? BS3_SEL_TILED_AREA_SIZE : (uint32_t)Entry.cbRange;
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239 | uint32_t uRangeEnd = uRange + cbRange;
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240 | AssertCompile(BS3_SEL_TILED_AREA_SIZE <= _512M /* the range of 16-bit cPages. */ );
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241 | if ( uRange >= _1M
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242 | || uRangeEnd > _1M)
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243 | {
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244 | /* Adjust the start of the range such that it's at or above 1MB and page aligned. */
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245 | if (uRange < _1M)
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246 | {
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247 | cbRange -= _1M - uRange;
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248 | uRange = _1M;
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249 | }
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250 | else if (uRange & (_4K - 1U))
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251 | {
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252 | cbRange -= uRange & (_4K - 1U);
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253 | uRange = RT_ALIGN_32(uRange, _4K);
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254 | }
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255 |
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256 | /* Adjust the end/size of the range such that it's page aligned and not beyond the tiled area. */
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257 | if (uRangeEnd > BS3_SEL_TILED_AREA_SIZE)
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258 | {
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259 | cbRange -= uRangeEnd - BS3_SEL_TILED_AREA_SIZE;
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260 | uRangeEnd = BS3_SEL_TILED_AREA_SIZE;
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261 | }
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262 | else if (uRangeEnd & (_4K - 1U))
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263 | {
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264 | cbRange -= uRangeEnd & (_4K - 1U);
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265 | uRangeEnd &= ~(uint32_t)(_4K - 1U);
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266 | }
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267 |
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268 | /* If there is still something, enable it.
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269 | (We're a bit paranoid here don't trust the BIOS to only report a page once.) */
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270 | cPages = cbRange >> 12; /*div 4K*/
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271 | if (cPages)
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272 | {
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273 | uRange -= _1M;
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274 | i = uRange >> 12; /*div _4K*/
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275 | while (cPages-- > 0)
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276 | {
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277 | uint16_t uLineToLong = ASMBitTestAndClear(g_Bs3Mem4KUpperTiled.Core.bmAllocated, i);
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278 | BS3_DATA_NM(g_Bs3Mem4KUpperTiled).Core.cFreeChunks += uLineToLong;
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279 | i++;
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280 | }
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281 | }
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282 | }
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283 | }
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284 | }
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285 | }
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286 | }
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287 |
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288 | /*
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289 | * Initialize the slab lists.
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290 | */
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291 | for (i = 0; i < BS3_MEM_SLAB_LIST_COUNT; i++)
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292 | {
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293 | Bs3SlabListInit(&g_aBs3LowSlabLists[i], g_acbBs3SlabLists[i]);
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294 | Bs3SlabListInit(&g_aBs3UpperTiledSlabLists[i], g_acbBs3SlabLists[i]);
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295 | }
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296 |
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297 | #if 0
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298 | /*
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299 | * For debugging.
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300 | */
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301 | Bs3Printf("Memory-low: %u/%u chunks bmAllocated[]=", g_Bs3Mem4KLow.Core.cFreeChunks, g_Bs3Mem4KLow.Core.cChunks);
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302 | for (i = 0; i < 20; i++)
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303 | Bs3Printf("%02x ", g_Bs3Mem4KLow.Core.bmAllocated[i]);
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304 | Bs3Printf("\n");
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305 | Bs3Printf("Memory-upt: %u/%u chunks bmAllocated[]=", g_Bs3Mem4KUpperTiled.Core.cFreeChunks, g_Bs3Mem4KUpperTiled.Core.cChunks);
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306 | for (i = 0; i < 32; i++)
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307 | Bs3Printf("%02x ", g_Bs3Mem4KUpperTiled.Core.bmAllocated[i]);
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308 | Bs3Printf("...\n");
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309 | #endif
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310 | }
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311 |
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