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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-system-data.asm@ 60112

Last change on this file since 60112 was 60097, checked in by vboxsync, 9 years ago

bs3kit: Updates
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1; $Id: bs3-system-data.asm 60097 2016-03-18 13:14:40Z vboxsync $
2;; @file
3; BS3Kit - GDT
4;
5
6;
7; Copyright (C) 2007-2015 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17; The contents of this file may alternatively be used under the terms
18; of the Common Development and Distribution License Version 1.0
19; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20; VirtualBox OSE distribution, in which case the provisions of the
21; CDDL are applicable instead of those of the GPL.
22;
23; You may elect to license modified versions of this file under the
24; terms and conditions of either the GPL or the CDDL or both.
25;
26
27
28%include "bs3kit.mac"
29
30%define BS3_SYSTEM16_BASE_16_23 ((BS3_ADDR_BS3SYSTEM16 >> 16) & 0xff)
31%define BS3_SYSTEM16_BASE_LOW(a_DataSym) ((BS3_DATA_NM(a_DataSym) - StartSystem16) & 0xffff)
32
33;;
34; The GDT (X86DESCGENERIC).
35;
36BS3_BEGIN_SYSTEM16
37StartSystem16:
38 db 10, 13, 'eye-catcher: SYSTEM16.......', 10, 13 ; 32 bytes long
39BS3_GLOBAL_DATA Bs3Gdt, 3000
40
41;; Macro for checking GDT offsets as we go along.
42;; @param %1 The expected current offset.
43%macro BS3GdtAssertOffset 1
44 %ifndef KBUILD_GENERATING_MAKEFILE_DEPENDENCIES
45 %if ($ - BS3_DATA_NM(Bs3Gdt)) != %1
46 %assign offActual ($ - BS3_DATA_NM(Bs3Gdt))
47 %error "BS3GdtAssertOffset: Bad offset: " %+ offActual %+ ", expected " %+ %1
48 %endif
49 %endif
50%endmacro
51
52 dw 00000h, 00000h, 00000h, 00000h ; null selector
53BS3GdtAssertOffset 8
54
55 ;
56 ; 008h..0f8h - System selectors and other stuff
57 ;
58 dw 00000h, 00000h, 00000h, 00000h ; Entry 008h - currently unused
59
60BS3_GLOBAL_DATA Bs3Gdte_Ldt, 16 ; Entry 010h
61 dw BS3_DATA_NM(Bs3LdtEnd) - BS3_DATA_NM(Bs3Ldt)
62 dw BS3_SYSTEM16_BASE_LOW(Bs3Ldt)
63 db BS3_SYSTEM16_BASE_16_23
64 db X86_SEL_TYPE_SYS_LDT | 0x80
65 dw 00000h
66 dw 00000h, 00000h, 00000h, 00000h ; zero for 64-bit mode.
67
68BS3_GLOBAL_DATA Bs3Gdte_Tss16, 8 ; Entry 020h
69 dw 0002bh ; 16-bit TSS.
70 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16)
71 db BS3_SYSTEM16_BASE_16_23
72 db X86_SEL_TYPE_SYS_286_TSS_AVAIL | 0x80
73 dw 0
74
75BS3_GLOBAL_DATA Bs3Gdte_Tss16DoubleFault, 8 ; Entry 028h
76 dw 0002bh ; 16-bit TSS, double fault.
77 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16DoubleFault)
78 db BS3_SYSTEM16_BASE_16_23
79 db X86_SEL_TYPE_SYS_286_TSS_AVAIL | 0x80
80 dw 0
81
82BS3_GLOBAL_DATA Bs3Gdte_Tss16Spare0, 8 ; Entry 030h
83 dw 0002bh ; 16-bit TSS, spare 0.
84 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16Spare0)
85 db BS3_SYSTEM16_BASE_16_23
86 db X86_SEL_TYPE_SYS_286_TSS_AVAIL | 0x80
87 dw 0
88
89BS3_GLOBAL_DATA Bs3Gdte_Tss16Spare1, 8 ; Entry 038h
90 dw 0002bh ; 16-bit TSS, spare 0.
91 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16Spare1)
92 db BS3_SYSTEM16_BASE_16_23
93 db X86_SEL_TYPE_SYS_286_TSS_AVAIL | 0x80
94 dw 0
95
96BS3_GLOBAL_DATA Bs3Gdte_Tss32, 8 ; Entry 040h
97 dw 00067h ; 32-bit TSS.
98 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32)
99 db BS3_SYSTEM16_BASE_16_23
100 db X86_SEL_TYPE_SYS_386_TSS_AVAIL | 0x80
101 dw 0
102
103BS3_GLOBAL_DATA Bs3Gdte_Tss32DoubleFault, 8 ; Entry 048h
104 dw 00067h ; 32-bit TSS, double fault.
105 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32DoubleFault)
106 db BS3_SYSTEM16_BASE_16_23
107 db X86_SEL_TYPE_SYS_386_TSS_AVAIL | 0x80
108 dw 0
109
110BS3_GLOBAL_DATA Bs3Gdte_Tss32Spare0, 8 ; Entry 050h
111 dw 00067h ; 32-bit TSS, spare 0.
112 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32Spare0)
113 db BS3_SYSTEM16_BASE_16_23
114 db X86_SEL_TYPE_SYS_386_TSS_AVAIL | 0x80
115 dw 0
116
117BS3_GLOBAL_DATA Bs3Gdte_Tss32Spare1, 8 ; Entry 058h
118 dw 00067h ; 32-bit TSS, spare 1.
119 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32Spare1)
120 db BS3_SYSTEM16_BASE_16_23
121 db X86_SEL_TYPE_SYS_386_TSS_AVAIL | 0x80
122 dw 0
123
124BS3_GLOBAL_DATA Bs3Gdte_Tss32IobpIntRedirBm, 8 ; Entry 060h
125 ; 32-bit TSS, with I/O permission & interrupt redirection bitmaps.
126 dw BS3_DATA_NM(Bs3SharedIobpEnd) - BS3_DATA_NM(Bs3Tss32WithIopb) - 1
127 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32WithIopb)
128 db BS3_SYSTEM16_BASE_16_23
129 db X86_SEL_TYPE_SYS_386_TSS_AVAIL | 0x80
130 dw 0
131
132BS3_GLOBAL_DATA Bs3Gdte_Tss32IntRedirBm, 8 ; Entry 068h
133 ; 32-bit TSS, with interrupt redirection bitmap (IOBP stripped by limit).
134 dw BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb) - 1
135 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32WithIopb)
136 db BS3_SYSTEM16_BASE_16_23
137 db X86_SEL_TYPE_SYS_386_TSS_AVAIL | 0x80
138 dw 0
139
140BS3_GLOBAL_DATA Bs3Gdte_Tss64, 8 ; Entry 070h
141 dw 00067h ; 64-bit TSS.
142 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64)
143 db BS3_SYSTEM16_BASE_16_23
144 db AMD64_SEL_TYPE_SYS_TSS_AVAIL | 0x80
145 dw 0
146 dw 00000h, 00000h, 00000h, 00000h
147
148BS3_GLOBAL_DATA Bs3Gdte_Tss64Spare0, 8 ; Entry 080h
149 dw 00067h ; 64-bit TSS, spare 0.
150 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64Spare0)
151 db BS3_SYSTEM16_BASE_16_23
152 db AMD64_SEL_TYPE_SYS_TSS_AVAIL | 0x80
153 dw 0
154 dw 00000h, 00000h, 00000h, 00000h
155
156BS3_GLOBAL_DATA Bs3Gdte_Tss64Spare1, 8 ; Entry 090h
157 dw 00067h ; 64-bit TSS, spare 1.
158 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64Spare1)
159 db BS3_SYSTEM16_BASE_16_23
160 db AMD64_SEL_TYPE_SYS_TSS_AVAIL | 0x80
161 dw 0
162 dw 00000h, 00000h, 00000h, 00000h
163
164BS3_GLOBAL_DATA Bs3Gdte_Tss64Iobp, 8 ; Entry 0a0h
165 ; 64-bit TSS, with I/O permission bitmap
166 dw BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss64WithIopb) - 1
167 dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64WithIopb)
168 db BS3_SYSTEM16_BASE_16_23
169 db AMD64_SEL_TYPE_SYS_TSS_AVAIL | 0x80
170 dw 0
171 dw 00000h, 00000h, 00000h, 00000h
172
173BS3GdtAssertOffset 0b0h
174 dw 00000h, 00000h, 00000h, 00000h ; Entry 0b0h - currently unused
175 dw 00000h, 00000h, 00000h, 00000h ; Entry 0b8h - currently unused
176 dw 00000h, 00000h, 00000h, 00000h ; Entry 0c0h - currently unused
177 dw 00000h, 00000h, 00000h, 00000h ; Entry 0c8h - currently unused
178 dw 00000h, 00000h, 00000h, 00000h ; Entry 0d0h - currently unused
179 dw 00000h, 00000h, 00000h, 00000h ; Entry 0d8h - currently unused
180 dw 00000h, 00000h, 00000h, 00000h ; Entry 0e0h - currently unused
181 dw 00000h, 00000h, 00000h, 00000h ; Entry 0e8h - currently unused
182 dw 00000h, 00000h, 00000h, 00000h ; Entry 0f0h - currently unused
183
184 ; Misc selectors.
185BS3_GLOBAL_DATA Bs3Gdte_R0_MMIO16, 8 ; Entry 0f8h
186 dw 0ffffh, 00000h, 09310h, 00000h ; 16-bit VMMDev MMIO segment with base 0100000h.
187BS3GdtAssertOffset 0100h
188
189
190;;
191; Macro that defines the selectors for ring-%1.
192;
193%macro BS3_GDT_RING_X_SELECTORS 1
194BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _First, 80h
195BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16, 8 ; Entry 100h
196 dw 0ffffh, 00000h ; 16-bit code segment with base 010000h.
197 dw 09b01h | (%1 << 0dh), 00000h
198
199BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS16, 8 ; Entry 108h
200 dw 0ffffh, (0xffff & BS3_ADDR_BS3DATA16) ; 16-bit data segment with base 027000h.
201 dw 09300h | (%1 << 0dh) | (0xff & (BS3_ADDR_BS3DATA16 >> 16)), 00000h | (0xff00 & (BS3_ADDR_BS3DATA16 >> 16))
202
203BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _SS16, 8 ; Entry 110h
204 dw 0ffffh, 00000h ; 16-bit stack segment with base 0.
205 dw 09300h | (%1 << 0dh), 00000h
206
207BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32, 8 ; Entry 118h
208 dw 0ffffh, 00000h ; 32-bit flat code segment.
209 dw 09b00h | (%1 << 0dh), 000cfh
210
211BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS32, 8 ; Entry 120h
212 dw 0ffffh, 00000h ; 32-bit flat data segment.
213 dw 09300h | (%1 << 0dh), 000cfh
214
215BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _SS32, 8 ; Entry 128h
216 dw 0ffffh, 00000h ; 32-bit flat stack segment.
217 dw 09300h | (%1 << 0dh), 000cfh
218
219BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64, 8 ; Entry 130h
220 dw 0ffffh, 00000h ; 64-bit code segment.
221 dw 09a00h | (%1 << 0dh), 000afh
222
223BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS64, 8 ; Entry 138h (also SS64)
224 dw 0ffffh, 00000h ; 64-bit stack and data segment.
225 dw 09300h | (%1 << 0dh), 000afh
226
227BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_EO, 8 ; Entry 140h
228 dw 0fffeh, 00000h ; 16-bit code segment with base 0, not accessed, execute only, short limit.
229 dw 09800h | (%1 << 0dh), 00000h
230
231BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_CNF, 8 ; Entry 148h
232 dw 0fffeh, 00000h ; 16-bit conforming code segment with base 0, not accessed, execute only, short limit.
233 dw 09e00h | (%1 << 0dh), 00000h
234
235BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_CND_EO, 8 ; Entry 150h
236 dw 0fffeh, 00000h ; 16-bit conforming code segment with base 0, not accessed, execute only, short limit.
237 dw 09c00h | (%1 << 0dh), 000cfh
238
239BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_EO, 8 ; Entry 158h
240 dw 0ffffh, 00000h ; 32-bit flat code segment, not accessed, execute only.
241 dw 09800h | (%1 << 0dh), 000cfh
242
243BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_CNF, 8 ; Entry 160h
244 dw 0ffffh, 00000h ; 32-bit flat conforming code segment, not accessed.
245 dw 09e00h | (%1 << 0dh), 000cfh
246
247BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_CNF_EO, 8 ; Entry 168h
248 dw 0ffffh, 00000h ; 32-bit flat conforming code segment, not accessed, execute only.
249 dw 09c00h | (%1 << 0dh), 000cfh
250
251BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_EO, 8 ; Entry 170h
252 dw 0ffffh, 00000h ; 64-bit code segment, not accessed, execute only.
253 dw 09800h | (%1 << 0dh), 000afh
254
255BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_CNF, 8 ; Entry 178h
256 dw 0ffffh, 00000h ; 64-bit conforming code segment, not accessed.
257 dw 09e00h | (%1 << 0dh), 000afh
258
259BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_CNF_EO, 8 ; Entry 180h
260 dw 0ffffh, 00000h ; 64-bit conforming code segment, execute only, not accessed.
261 dw 09c00h | (%1 << 0dh), 000afh
262
263;; @todo expand down segments.
264 dw 00000h, 00000h, 00000h, 00000h ; Entry 188h - unused.
265 dw 00000h, 00000h, 00000h, 00000h ; Entry 190h - unused.
266 dw 00000h, 00000h, 00000h, 00000h ; Entry 198h - unused.
267 dw 00000h, 00000h, 00000h, 00000h ; Entry 1a0h - unused.
268 dw 00000h, 00000h, 00000h, 00000h ; Entry 1a8h - unused.
269 dw 00000h, 00000h, 00000h, 00000h ; Entry 1b0h - unused.
270 dw 00000h, 00000h, 00000h, 00000h ; Entry 1b8h - unused.
271 dw 00000h, 00000h, 00000h, 00000h ; Entry 1c0h - unused.
272 dw 00000h, 00000h, 00000h, 00000h ; Entry 1c8h - unused.
273 dw 00000h, 00000h, 00000h, 00000h ; Entry 1d0h - unused.
274 dw 00000h, 00000h, 00000h, 00000h ; Entry 1d8h - unused.
275 dw 00000h, 00000h, 00000h, 00000h ; Entry 1e0h - unused.
276 dw 00000h, 00000h, 00000h, 00000h ; Entry 1e8h - unused.
277 dw 00000h, 00000h, 00000h, 00000h ; Entry 1f0h - unused.
278 dw 00000h, 00000h, 00000h, 00000h ; Entry 1f8h - unused.
279%endmacro
280
281 ;
282 ; 100h..1f8h - Ring-0 selectors.
283 ;
284 BS3_GDT_RING_X_SELECTORS 0
285
286 ;
287 ; 200h..2f8h - Ring-1 selectors.
288 ;
289 BS3_GDT_RING_X_SELECTORS 1
290
291 ;
292 ; 300h..3f8h - Ring-2 selectors.
293 ;
294 BS3_GDT_RING_X_SELECTORS 2
295
296 ;
297 ; 400h..4f8h - Ring-3 selectors.
298 ;
299 BS3_GDT_RING_X_SELECTORS 3
300
301 ;
302 ; 500..5f8h - Named spare GDT entries.
303 ;
304BS3GdtAssertOffset 0500h
305BS3_GLOBAL_DATA Bs3GdteSpare00, 8 ; Entry 500h
306 dq 0
307BS3_GLOBAL_DATA Bs3GdteSpare01, 8 ; Entry 508h
308 dq 0
309BS3_GLOBAL_DATA Bs3GdteSpare02, 8 ; Entry 510h
310 dq 0
311BS3_GLOBAL_DATA Bs3GdteSpare03, 8 ; Entry 518h
312 dq 0
313BS3_GLOBAL_DATA Bs3GdteSpare04, 8 ; Entry 520h
314 dq 0
315BS3_GLOBAL_DATA Bs3GdteSpare05, 8 ; Entry 528h
316 dq 0
317BS3_GLOBAL_DATA Bs3GdteSpare06, 8 ; Entry 530h
318 dq 0
319BS3_GLOBAL_DATA Bs3GdteSpare07, 8 ; Entry 538h
320 dq 0
321BS3_GLOBAL_DATA Bs3GdteSpare08, 8 ; Entry 540h
322 dq 0
323BS3_GLOBAL_DATA Bs3GdteSpare09, 8 ; Entry 548h
324 dq 0
325BS3_GLOBAL_DATA Bs3GdteSpare0a, 8 ; Entry 550h
326 dq 0
327BS3_GLOBAL_DATA Bs3GdteSpare0b, 8 ; Entry 558h
328 dq 0
329BS3_GLOBAL_DATA Bs3GdteSpare0c, 8 ; Entry 560h
330 dq 0
331BS3_GLOBAL_DATA Bs3GdteSpare0d, 8 ; Entry 568h
332 dq 0
333BS3_GLOBAL_DATA Bs3GdteSpare0e, 8 ; Entry 570h
334 dq 0
335BS3_GLOBAL_DATA Bs3GdteSpare0f, 8 ; Entry 578h
336 dq 0
337BS3_GLOBAL_DATA Bs3GdteSpare10, 8 ; Entry 580h
338 dq 0
339BS3_GLOBAL_DATA Bs3GdteSpare11, 8 ; Entry 588h
340 dq 0
341BS3_GLOBAL_DATA Bs3GdteSpare12, 8 ; Entry 590h
342 dq 0
343BS3_GLOBAL_DATA Bs3GdteSpare13, 8 ; Entry 598h
344 dq 0
345BS3_GLOBAL_DATA Bs3GdteSpare14, 8 ; Entry 5a0h
346 dq 0
347BS3_GLOBAL_DATA Bs3GdteSpare15, 8 ; Entry 5a8h
348 dq 0
349BS3_GLOBAL_DATA Bs3GdteSpare16, 8 ; Entry 5b0h
350 dq 0
351BS3_GLOBAL_DATA Bs3GdteSpare17, 8 ; Entry 5b8h
352 dq 0
353BS3_GLOBAL_DATA Bs3GdteSpare18, 8 ; Entry 5c0h
354 dq 0
355BS3_GLOBAL_DATA Bs3GdteSpare19, 8 ; Entry 5c8h
356 dq 0
357BS3_GLOBAL_DATA Bs3GdteSpare1a, 8 ; Entry 5d0h
358 dq 0
359BS3_GLOBAL_DATA Bs3GdteSpare1b, 8 ; Entry 5d8h
360 dq 0
361BS3_GLOBAL_DATA Bs3GdteSpare1c, 8 ; Entry 5e0h
362 dq 0
363BS3_GLOBAL_DATA Bs3GdteSpare1d, 8 ; Entry 5e8h
364 dq 0
365BS3_GLOBAL_DATA Bs3GdteSpare1e, 8 ; Entry 5f0h
366 dq 0
367BS3_GLOBAL_DATA Bs3GdteSpare1f, 8 ; Entry 5f8h
368 dq 0
369
370 ;
371 ; 600..df8h - 16-bit DPL=3 data segments covering the first 16MB of memory.
372 ;
373BS3_GLOBAL_DATA Bs3GdteTiled, 8 ; Entry 600h
374%assign u8HighBase 0
375%rep 256
376 dw 0ffffh, 00000h, 0f300h | u8HighBase, 00000h
377%assign u8HighBase u8HighBase + 1
378%endrep
379 ;
380 ; e00..ff8h - Free GDTEs.
381 ;
382BS3GdtAssertOffset 0e00h
383BS3_GLOBAL_DATA Bs3GdteFreePart1, 200h
384 times 200h db 0
385
386 ;
387 ; 1000h - the real mode segment number for BS3TEXT16. DPL=0. BASE=0x10000h
388 ;
389BS3GdtAssertOffset 01000h
390BS3_GLOBAL_DATA Bs3Gdte_CODE16, 8h
391 dw 0ffffh, 00000h, 09b01h, 00000h
392
393 ;
394 ; 1008..17f8h - Free GDTEs.
395 ;
396BS3GdtAssertOffset 01008h
397BS3_GLOBAL_DATA Bs3GdteFreePart2, 07f8h
398 times 07f8h db 0
399
400 ;
401 ; 1800..1ff8h - 16-bit DPL=0 data/stack segments covering the first 16MB of memory.
402 ;
403BS3GdtAssertOffset 01800h
404BS3_GLOBAL_DATA Bs3GdteTiledR0, 8 ; Entry 1800h
405%assign u8HighBase 0
406%rep 256
407 dw 0ffffh, 00000h, 09300h | u8HighBase, 00000h
408%assign u8HighBase u8HighBase + 1
409%endrep
410
411 ;
412 ; 2000h - the real mode segment number for BS3SYSTEM. DPL=3. BASE=0x20000h
413 ;
414BS3GdtAssertOffset 02000h
415BS3_GLOBAL_DATA Bs3Gdte_SYSTEM16, 8h
416 dw 0ffffh, 00000h, 0f302h, 00000h
417
418 ;
419 ; 2008..26f8h - Free GDTEs.
420 ;
421BS3_GLOBAL_DATA Bs3GdteFreePart3, 06f8h
422 times 06f8h db 0
423
424 ;
425 ; 2700h - the real mode segment number for BS3DATA16. DPL=3. BASE=0x23000h
426 ;
427BS3GdtAssertOffset 02700h
428BS3_GLOBAL_DATA Bs3Gdte_DATA16, 8h
429 dw 0ffffh, 07000h, 0f302h, 00000h
430BS3_GLOBAL_DATA Bs3GdtEnd, 0
431 db 10, 13, 'GDTE', 10, 13 ; alignment padding (next address on 16 byte boundrary).
432
433
434;;
435; The 16-bit TSS.
436;
437BS3_GLOBAL_DATA Bs3Tss16, X86TSS16_size
438istruc X86TSS16
439 at X86TSS16.selPrev, dw 0
440 at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
441 at X86TSS16.ss0, dw BS3_SEL_R0_SS16
442 at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
443 at X86TSS16.ss1, dw BS3_SEL_R1_SS16
444 at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
445 at X86TSS16.ss2, dw BS3_SEL_R2_SS16
446 at X86TSS16.ip, dw 0
447 at X86TSS16.flags, dw 0
448 at X86TSS16.ax, dw 0
449 at X86TSS16.cx, dw 0
450 at X86TSS16.dx, dw 0
451 at X86TSS16.bx, dw 0
452 at X86TSS16.sp, dw 0
453 at X86TSS16.bp, dw 0
454 at X86TSS16.si, dw 0
455 at X86TSS16.di, dw 0
456 at X86TSS16.es, dw 0
457 at X86TSS16.cs, dw 0
458 at X86TSS16.ss, dw 0
459 at X86TSS16.ds, dw 0
460 at X86TSS16.selLdt, dw 0
461iend
462
463;;
464; 16-bit TSS for (trying to) handle double faults.
465BS3_GLOBAL_DATA Bs3Tss16DoubleFault, X86TSS16_size
466istruc X86TSS16
467 at X86TSS16.selPrev, dw 0
468 at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
469 at X86TSS16.ss0, dw BS3_SEL_R0_SS16
470 at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
471 at X86TSS16.ss1, dw BS3_SEL_R1_SS16
472 at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
473 at X86TSS16.ss2, dw BS3_SEL_R2_SS16
474 at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
475 at X86TSS16.flags, dw X86_EFL_1
476 at X86TSS16.ax, dw 0
477 at X86TSS16.cx, dw 0
478 at X86TSS16.dx, dw 0
479 at X86TSS16.bx, dw 0
480 at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST1
481 at X86TSS16.bp, dw 0
482 at X86TSS16.si, dw 0
483 at X86TSS16.di, dw 0
484 at X86TSS16.es, dw BS3_SEL_R0_DS16
485 at X86TSS16.cs, dw BS3_SEL_R0_CS16
486 at X86TSS16.ss, dw BS3_SEL_R0_SS16
487 at X86TSS16.ds, dw BS3_SEL_R0_DS16
488 at X86TSS16.selLdt, dw 0
489iend
490
491;;
492; A spare 16-bit TSS for testcases to play around with.
493BS3_GLOBAL_DATA Bs3Tss16Spare0, X86TSS16_size
494istruc X86TSS16
495 at X86TSS16.selPrev, dw 0
496 at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
497 at X86TSS16.ss0, dw BS3_SEL_R0_SS16
498 at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
499 at X86TSS16.ss1, dw BS3_SEL_R1_SS16
500 at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
501 at X86TSS16.ss2, dw BS3_SEL_R2_SS16
502 at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
503 at X86TSS16.flags, dw X86_EFL_1
504 at X86TSS16.ax, dw 0
505 at X86TSS16.cx, dw 0
506 at X86TSS16.dx, dw 0
507 at X86TSS16.bx, dw 0
508 at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST2
509 at X86TSS16.bp, dw 0
510 at X86TSS16.si, dw 0
511 at X86TSS16.di, dw 0
512 at X86TSS16.es, dw BS3_SEL_R0_DS16
513 at X86TSS16.cs, dw BS3_SEL_R0_CS16
514 at X86TSS16.ss, dw BS3_SEL_R0_SS16
515 at X86TSS16.ds, dw BS3_SEL_R0_DS16
516 at X86TSS16.selLdt, dw 0
517iend
518
519;;
520; A spare 16-bit TSS for testcases to play around with.
521BS3_GLOBAL_DATA Bs3Tss16Spare1, X86TSS16_size
522istruc X86TSS16
523 at X86TSS16.selPrev, dw 0
524 at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
525 at X86TSS16.ss0, dw BS3_SEL_R0_SS16
526 at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
527 at X86TSS16.ss1, dw BS3_SEL_R1_SS16
528 at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
529 at X86TSS16.ss2, dw BS3_SEL_R2_SS16
530 at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
531 at X86TSS16.flags, dw X86_EFL_1
532 at X86TSS16.ax, dw 0
533 at X86TSS16.cx, dw 0
534 at X86TSS16.dx, dw 0
535 at X86TSS16.bx, dw 0
536 at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST4
537 at X86TSS16.bp, dw 0
538 at X86TSS16.si, dw 0
539 at X86TSS16.di, dw 0
540 at X86TSS16.es, dw BS3_SEL_R0_DS16
541 at X86TSS16.cs, dw BS3_SEL_R0_CS16
542 at X86TSS16.ss, dw BS3_SEL_R0_SS16
543 at X86TSS16.ds, dw BS3_SEL_R0_DS16
544 at X86TSS16.selLdt, dw 0
545iend
546
547
548;;
549; The 32-bit TSS.
550;
551BS3_GLOBAL_DATA Bs3Tss32, X86TSS32_size
552istruc X86TSS32
553 at X86TSS32.selPrev, dw 0
554 at X86TSS32.padding1, dw 0
555 at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
556 at X86TSS32.ss0, dw BS3_SEL_R0_SS32
557 at X86TSS32.padding_ss0, dw 1
558 at X86TSS32.esp1, dd 1
559 at X86TSS32.ss1, dw BS3_SEL_R1_SS32
560 at X86TSS32.padding_ss1, dw 1
561 at X86TSS32.esp2, dd 1
562 at X86TSS32.ss2, dw BS3_SEL_R2_SS32
563 at X86TSS32.padding_ss2, dw 1
564 at X86TSS32.cr3, dd 0
565 at X86TSS32.eip, dd 0
566 at X86TSS32.eflags, dd X86_EFL_1
567 at X86TSS32.eax, dd 0
568 at X86TSS32.ecx, dd 0
569 at X86TSS32.edx, dd 0
570 at X86TSS32.ebx, dd 0
571 at X86TSS32.esp, dd 0
572 at X86TSS32.ebp, dd 0
573 at X86TSS32.esi, dd 0
574 at X86TSS32.edi, dd 0
575 at X86TSS32.es, dw 0
576 at X86TSS32.padding_es, dw 0
577 at X86TSS32.cs, dw 0
578 at X86TSS32.padding_cs, dw 0
579 at X86TSS32.ss, dw 0
580 at X86TSS32.padding_ss, dw 0
581 at X86TSS32.ds, dw 0
582 at X86TSS32.padding_ds, dw 0
583 at X86TSS32.fs, dw 0
584 at X86TSS32.padding_fs, dw 0
585 at X86TSS32.gs, dw 0
586 at X86TSS32.padding_gs, dw 0
587 at X86TSS32.selLdt, dw 0
588 at X86TSS32.padding_ldt, dw 0
589 at X86TSS32.fDebugTrap, dw 0
590 at X86TSS32.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb))
591iend
592
593;;
594; The 32-bit TSS for handling double faults.
595BS3_GLOBAL_DATA Bs3Tss32DoubleFault, X86TSS32_size
596istruc X86TSS32
597 at X86TSS32.selPrev, dw 0
598 at X86TSS32.padding1, dw 0
599 at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
600 at X86TSS32.ss0, dw BS3_SEL_R0_SS32
601 at X86TSS32.padding_ss0, dw 1
602 at X86TSS32.esp1, dd 1
603 at X86TSS32.ss1, dw BS3_SEL_R1_SS32
604 at X86TSS32.padding_ss1, dw 1
605 at X86TSS32.esp2, dd 1
606 at X86TSS32.ss2, dw BS3_SEL_R2_SS32
607 at X86TSS32.padding_ss2, dw 1
608 at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
609 at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
610 at X86TSS32.eflags, dd X86_EFL_1
611 at X86TSS32.eax, dd 0
612 at X86TSS32.ecx, dd 0
613 at X86TSS32.edx, dd 0
614 at X86TSS32.ebx, dd 0
615 at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST1
616 at X86TSS32.ebp, dd 0
617 at X86TSS32.esi, dd 0
618 at X86TSS32.edi, dd 0
619 at X86TSS32.es, dw BS3_SEL_R0_DS32
620 at X86TSS32.padding_es, dw 0
621 at X86TSS32.cs, dw BS3_SEL_R0_CS32
622 at X86TSS32.padding_cs, dw 0
623 at X86TSS32.ss, dw BS3_SEL_R0_SS32
624 at X86TSS32.padding_ss, dw 0
625 at X86TSS32.ds, dw BS3_SEL_R0_DS32
626 at X86TSS32.padding_ds, dw 0
627 at X86TSS32.fs, dw BS3_SEL_R0_DS32
628 at X86TSS32.padding_fs, dw 0
629 at X86TSS32.gs, dw BS3_SEL_R0_DS32
630 at X86TSS32.padding_gs, dw 0
631 at X86TSS32.selLdt, dw 0
632 at X86TSS32.padding_ldt, dw 0
633 at X86TSS32.fDebugTrap, dw 0
634 at X86TSS32.offIoBitmap, dw 0
635iend
636
637;;
638; A spare 32-bit TSS testcases to play around with.
639BS3_GLOBAL_DATA Bs3Tss32Spare0, X86TSS32_size
640istruc X86TSS32
641 at X86TSS32.selPrev, dw 0
642 at X86TSS32.padding1, dw 0
643 at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
644 at X86TSS32.ss0, dw BS3_SEL_R0_SS32
645 at X86TSS32.padding_ss0, dw 1
646 at X86TSS32.esp1, dd 1
647 at X86TSS32.ss1, dw BS3_SEL_R1_SS32
648 at X86TSS32.padding_ss1, dw 1
649 at X86TSS32.esp2, dd 1
650 at X86TSS32.ss2, dw BS3_SEL_R2_SS32
651 at X86TSS32.padding_ss2, dw 1
652 at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
653 at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
654 at X86TSS32.eflags, dd X86_EFL_1
655 at X86TSS32.eax, dd 0
656 at X86TSS32.ecx, dd 0
657 at X86TSS32.edx, dd 0
658 at X86TSS32.ebx, dd 0
659 at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST2
660 at X86TSS32.ebp, dd 0
661 at X86TSS32.esi, dd 0
662 at X86TSS32.edi, dd 0
663 at X86TSS32.es, dw BS3_SEL_R0_DS32
664 at X86TSS32.padding_es, dw 0
665 at X86TSS32.cs, dw BS3_SEL_R0_CS32
666 at X86TSS32.padding_cs, dw 0
667 at X86TSS32.ss, dw BS3_SEL_R0_SS32
668 at X86TSS32.padding_ss, dw 0
669 at X86TSS32.ds, dw BS3_SEL_R0_DS32
670 at X86TSS32.padding_ds, dw 0
671 at X86TSS32.fs, dw BS3_SEL_R0_DS32
672 at X86TSS32.padding_fs, dw 0
673 at X86TSS32.gs, dw BS3_SEL_R0_DS32
674 at X86TSS32.padding_gs, dw 0
675 at X86TSS32.selLdt, dw 0
676 at X86TSS32.padding_ldt, dw 0
677 at X86TSS32.fDebugTrap, dw 0
678 at X86TSS32.offIoBitmap, dw 0
679iend
680
681;;
682; A spare 32-bit TSS testcases to play around with.
683BS3_GLOBAL_DATA Bs3Tss32Spare1, X86TSS32_size
684istruc X86TSS32
685 at X86TSS32.selPrev, dw 0
686 at X86TSS32.padding1, dw 0
687 at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
688 at X86TSS32.ss0, dw BS3_SEL_R0_SS32
689 at X86TSS32.padding_ss0, dw 1
690 at X86TSS32.esp1, dd 1
691 at X86TSS32.ss1, dw BS3_SEL_R1_SS32
692 at X86TSS32.padding_ss1, dw 1
693 at X86TSS32.esp2, dd 1
694 at X86TSS32.ss2, dw BS3_SEL_R2_SS32
695 at X86TSS32.padding_ss2, dw 1
696 at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
697 at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
698 at X86TSS32.eflags, dd X86_EFL_1
699 at X86TSS32.eax, dd 0
700 at X86TSS32.ecx, dd 0
701 at X86TSS32.edx, dd 0
702 at X86TSS32.ebx, dd 0
703 at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST4
704 at X86TSS32.ebp, dd 0
705 at X86TSS32.esi, dd 0
706 at X86TSS32.edi, dd 0
707 at X86TSS32.es, dw BS3_SEL_R0_DS32
708 at X86TSS32.padding_es, dw 0
709 at X86TSS32.cs, dw BS3_SEL_R0_CS32
710 at X86TSS32.padding_cs, dw 0
711 at X86TSS32.ss, dw BS3_SEL_R0_SS32
712 at X86TSS32.padding_ss, dw 0
713 at X86TSS32.ds, dw BS3_SEL_R0_DS32
714 at X86TSS32.padding_ds, dw 0
715 at X86TSS32.fs, dw BS3_SEL_R0_DS32
716 at X86TSS32.padding_fs, dw 0
717 at X86TSS32.gs, dw BS3_SEL_R0_DS32
718 at X86TSS32.padding_gs, dw 0
719 at X86TSS32.selLdt, dw 0
720 at X86TSS32.padding_ldt, dw 0
721 at X86TSS32.fDebugTrap, dw 0
722 at X86TSS32.offIoBitmap, dw 0
723iend
724
725
726
727;;
728; 64-bit TSS
729BS3_GLOBAL_DATA Bs3Tss64, X86TSS64_size
730istruc X86TSS64
731 at X86TSS64.u32Reserved, dd 0
732 at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
733 at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
734 at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
735 at X86TSS64.u32Reserved2, dd 0
736 at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
737 at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
738 at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
739 at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
740 at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
741 at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
742 at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
743 at X86TSS64.u16Reserved, dw 0
744 at X86TSS64.offIoBitmap, dw 0
745iend
746
747;;
748; A spare TSS for testcases to play around with.
749BS3_GLOBAL_DATA Bs3Tss64Spare0, X86TSS64_size
750istruc X86TSS64
751 at X86TSS64.u32Reserved, dd 0
752 at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
753 at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
754 at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
755 at X86TSS64.u32Reserved2, dd 0
756 at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
757 at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
758 at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
759 at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
760 at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
761 at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
762 at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
763 at X86TSS64.u16Reserved, dw 0
764 at X86TSS64.offIoBitmap, dw 0
765iend
766
767;;
768; A spare TSS for testcases to play around with.
769BS3_GLOBAL_DATA Bs3Tss64Spare1, X86TSS64_size
770istruc X86TSS64
771 at X86TSS64.u32Reserved, dd 0
772 at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
773 at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
774 at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
775 at X86TSS64.u32Reserved2, dd 0
776 at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
777 at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
778 at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
779 at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
780 at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
781 at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
782 at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
783 at X86TSS64.u16Reserved, dw 0
784 at X86TSS64.offIoBitmap, dw 0
785iend
786
787
788
789;;
790; 64-bit TSS sharing an I/O permission bitmap (Bs3SharedIobp) with a 32-bit TSS.
791;
792BS3_GLOBAL_DATA Bs3Tss64WithIopb, X86TSS64_size
793istruc X86TSS64
794 at X86TSS64.u32Reserved, dd 0
795 at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
796 at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
797 at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
798 at X86TSS64.u32Reserved2, dd 0
799 at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
800 at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
801 at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
802 at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
803 at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
804 at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
805 at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
806 at X86TSS64.u16Reserved, dw 0
807 at X86TSS64.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss64WithIopb))
808iend
809
810;;
811; 32-bit TSS sharing an I/O permission bitmap (Bs3SharedIobp) with a 64-bit TSS,
812; and sporting an interrupt redirection bitmap (Bs3SharedIntRedirBm).
813BS3_GLOBAL_DATA Bs3Tss32WithIopb, X86TSS32_size
814istruc X86TSS32
815 at X86TSS32.selPrev, dw 0
816 at X86TSS32.padding1, dw 0
817 at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
818 at X86TSS32.ss0, dw BS3_SEL_R0_SS32
819 at X86TSS32.padding_ss0, dw 1
820 at X86TSS32.esp1, dd 1
821 at X86TSS32.ss1, dw BS3_SEL_R1_SS32
822 at X86TSS32.padding_ss1, dw 1
823 at X86TSS32.esp2, dd 1
824 at X86TSS32.ss2, dw BS3_SEL_R2_SS32
825 at X86TSS32.padding_ss2, dw 1
826 at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
827 at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
828 at X86TSS32.eflags, dd X86_EFL_1
829 at X86TSS32.eax, dd 0
830 at X86TSS32.ecx, dd 0
831 at X86TSS32.edx, dd 0
832 at X86TSS32.ebx, dd 0
833 at X86TSS32.esp, dd 0
834 at X86TSS32.ebp, dd 0
835 at X86TSS32.esi, dd 0
836 at X86TSS32.edi, dd 0
837 at X86TSS32.es, dw 0
838 at X86TSS32.padding_es, dw 0
839 at X86TSS32.cs, dw 0
840 at X86TSS32.padding_cs, dw 0
841 at X86TSS32.ss, dw 0
842 at X86TSS32.padding_ss, dw 0
843 at X86TSS32.ds, dw 0
844 at X86TSS32.padding_ds, dw 0
845 at X86TSS32.fs, dw 0
846 at X86TSS32.padding_fs, dw 0
847 at X86TSS32.gs, dw 0
848 at X86TSS32.padding_gs, dw 0
849 at X86TSS32.selLdt, dw 0
850 at X86TSS32.padding_ldt, dw 0
851 at X86TSS32.fDebugTrap, dw 0
852 at X86TSS32.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb))
853iend
854
855;
856; We insert 6 bytes before the interrupt redirection bitmap just to make sure
857; we've all got the same idea about where it starts (i.e. 32 bytes before IOBP).
858;
859 times 6 db 0ffh
860
861;;
862; Interrupt redirection bitmap (used by 32-bit TSS).
863BS3_GLOBAL_DATA Bs3SharedIntRedirBm, 32
864 times 32 db 00h
865
866;;
867; Shared I/O permission bitmap used both by Bs3Tss64WithIopb and Bs3Tss32WithIopb.
868BS3_GLOBAL_DATA Bs3SharedIobp, 8192+2
869 times 8192+2 db 0ffh
870BS3_GLOBAL_DATA Bs3SharedIobpEnd, 0
871
872
873align 128
874
875;;
876; 16-bit IDT.
877; This requires manual setup by code fielding traps, so we'll just reserve the
878; memory here.
879;
880BS3_GLOBAL_DATA Bs3Idt16, 256*8
881 times 256 dq 0
882
883;;
884; 32-bit IDT.
885; This requires manual setup by code fielding traps, so we'll just reserve the
886; memory here.
887;
888BS3_GLOBAL_DATA Bs3Idt32, 256*8
889 times 256 dq 0
890
891;;
892; 64-bit IDT.
893; This requires manual setup by code fielding traps, so we'll just reserve the
894; memory here.
895;
896BS3_GLOBAL_DATA Bs3Idt64, 256*16
897 times 256 dq 0, 0
898
899
900 times 6 db 0 ; Pad the first LIDT correctly.
901
902;;
903; LIDT structure for the 16-bit IDT (8-byte aligned on offset).
904BS3_GLOBAL_DATA Bs3Lidt_Idt16, 2+8
905 dw 256*8 - 1 ; limit
906 dw BS3_SYSTEM16_BASE_LOW(Bs3Idt16) ; low offset
907 dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
908 dd 0 ; top32 offset
909
910 times 4 db 0 ; padding the start of the next
911
912;;
913; LIDT structure for the 32-bit IDT (8-byte aligned on offset).
914BS3_GLOBAL_DATA Bs3Lidt_Idt32, 2+8
915 dw 256*8 - 1 ; limit
916 dw BS3_SYSTEM16_BASE_LOW(Bs3Idt32) ; low offset
917 dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
918 dd 0 ; top32 offset
919
920 times 4 db 0 ; padding the start of the next
921
922;;
923; LIDT structure for the 64-bit IDT (8-byte aligned on offset).
924BS3_GLOBAL_DATA Bs3Lidt_Idt64, 2+8
925 dw 256*16 - 1 ; limit
926 dw BS3_SYSTEM16_BASE_LOW(Bs3Idt64) ; low offset
927 dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
928 dd 0 ; top32 offset
929
930 times 4 db 0 ; padding the start of the next
931
932;;
933; LIDT structure for the real mode IVT at address 0x00000000 (8-byte aligned on offset).
934BS3_GLOBAL_DATA Bs3Lidt_Ivt, 2+8
935 dw 256*4 - 1 ; limit
936 dw 0 ; low offset
937 dw 0 ; high offset
938 dd 0 ; top32 offset
939
940 times 4 db 0 ; padding the start of the next
941
942;;
943; LGDT structure for the GDT (8-byte aligned on offset).
944BS3_GLOBAL_DATA Bs3Lgdt_Gdt, 2+8
945 dw BS3_DATA_NM(Bs3GdtEnd) - BS3_DATA_NM(Bs3Gdt) - 1 ; limit
946 dw BS3_SYSTEM16_BASE_LOW(Bs3Gdt) ; low offset
947 dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
948 dd 0 ; top32 offset
949
950
951
952align 16
953;;
954; LDT filling up the rest of the segment.
955;
956; Currently this starts at 0x6c50, which leaves us with 0x3b0 bytes. We'll use
957; the last 32 of those for an eye catcher.
958;
959BS3_GLOBAL_DATA Bs3Ldt, 03b0h
960 times (03b0h - 32) db 0
961BS3_GLOBAL_DATA Bs3LdtEnd, 0
962 db 10, 13, 'eye-catcher: SYSTEM16 END', 10, 13, 0, 0, 0 ; 32 bytes long
963
964;
965; Check the segment size.
966;
967%ifndef KBUILD_GENERATING_MAKEFILE_DEPENDENCIES
968 %if ($ - $$) != 07000h
969 %assign offActual ($ - $$)
970 %error "Bad BS3SYSTEM16 segment size: " %+ offActual %+ ", expected 0x7000 (28672)"
971 %endif
972%endif
973
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