bs3-system-data.asm@ 60439

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1	; $Id: bs3-system-data.asm 60439 2016-04-11 19:08:38Z vboxsync $
2	;; @file
3	; BS3Kit - GDT
4	;
5
6	;
7	; Copyright (C) 2007-2016 Oracle Corporation
8	;
9	; This file is part of VirtualBox Open Source Edition (OSE), as
10	; available from http://www.virtualbox.org. This file is free software;
11	; you can redistribute it and/or modify it under the terms of the GNU
12	; General Public License (GPL) as published by the Free Software
13	; Foundation, in version 2 as it comes in the "COPYING" file of the
14	; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	;
17	; The contents of this file may alternatively be used under the terms
18	; of the Common Development and Distribution License Version 1.0
19	; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20	; VirtualBox OSE distribution, in which case the provisions of the
21	; CDDL are applicable instead of those of the GPL.
22	;
23	; You may elect to license modified versions of this file under the
24	; terms and conditions of either the GPL or the CDDL or both.
25	;
26
27	%include "bs3kit.mac"
28
29	%define BS3_SYSTEM16_BASE_16_23 ((BS3_ADDR_BS3SYSTEM16 >> 16) & 0xff)
30	%define BS3_SYSTEM16_BASE_LOW(a_DataSym) ((BS3_DATA_NM(a_DataSym) - StartSystem16) & 0xffff)
31
32	;;
33	; The GDT (X86DESCGENERIC).
34	;
35	BS3_BEGIN_SYSTEM16
36	StartSystem16:
37	db 10, 13, 'eye-catcher: SYSTEM16.......', 10, 13 ; 32 bytes long
38	BS3_GLOBAL_DATA Bs3Gdt, 4000h - 20h
39
40	;; Macro for checking GDT offsets as we go along.
41	;; @param %1 The expected current offset.
42	%macro BS3GdtAssertOffset 1
43	%ifndef KBUILD_GENERATING_MAKEFILE_DEPENDENCIES
44	%if ($ - BS3_DATA_NM(Bs3Gdt)) != %1
45	%assign offActual ($ - BS3_DATA_NM(Bs3Gdt))
46	%error "BS3GdtAssertOffset: Bad offset: " %+ offActual %+ ", expected " %+ %1
47	%endif
48	%endif
49	%endmacro
50
51	dw 00000h, 00000h, 00000h, 00000h ; null selector
52	BS3GdtAssertOffset 8
53
54	;
55	; 008h..0f8h - System selectors and other stuff
56	;
57	dw 00000h, 00000h, 00000h, 00000h ; Entry 008h - currently unused
58
59	BS3_GLOBAL_DATA Bs3Gdte_Ldt, 16 ; Entry 010h
60	dw BS3_DATA_NM(Bs3LdtEnd) - BS3_DATA_NM(Bs3Ldt)
61	dw BS3_SYSTEM16_BASE_LOW(Bs3Ldt)
62	db BS3_SYSTEM16_BASE_16_23
63	db X86_SEL_TYPE_SYS_LDT \| 0x80
64	dw 00000h
65	dw 00000h, 00000h, 00000h, 00000h ; zero for 64-bit mode.
66
67	BS3_GLOBAL_DATA Bs3Gdte_Tss16, 8 ; Entry 020h
68	dw 0002bh ; 16-bit TSS.
69	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16)
70	db BS3_SYSTEM16_BASE_16_23
71	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
72	dw 0
73
74	BS3_GLOBAL_DATA Bs3Gdte_Tss16DoubleFault, 8 ; Entry 028h
75	dw 0002bh ; 16-bit TSS, double fault.
76	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16DoubleFault)
77	db BS3_SYSTEM16_BASE_16_23
78	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
79	dw 0
80
81	BS3_GLOBAL_DATA Bs3Gdte_Tss16Spare0, 8 ; Entry 030h
82	dw 0002bh ; 16-bit TSS, spare 0.
83	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16Spare0)
84	db BS3_SYSTEM16_BASE_16_23
85	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
86	dw 0
87
88	BS3_GLOBAL_DATA Bs3Gdte_Tss16Spare1, 8 ; Entry 038h
89	dw 0002bh ; 16-bit TSS, spare 0.
90	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16Spare1)
91	db BS3_SYSTEM16_BASE_16_23
92	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
93	dw 0
94
95	BS3_GLOBAL_DATA Bs3Gdte_Tss32, 8 ; Entry 040h
96	dw 00067h ; 32-bit TSS.
97	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32)
98	db BS3_SYSTEM16_BASE_16_23
99	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
100	dw 0
101
102	BS3_GLOBAL_DATA Bs3Gdte_Tss32DoubleFault, 8 ; Entry 048h
103	dw 00067h ; 32-bit TSS, double fault.
104	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32DoubleFault)
105	db BS3_SYSTEM16_BASE_16_23
106	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
107	dw 0
108
109	BS3_GLOBAL_DATA Bs3Gdte_Tss32Spare0, 8 ; Entry 050h
110	dw 00067h ; 32-bit TSS, spare 0.
111	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32Spare0)
112	db BS3_SYSTEM16_BASE_16_23
113	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
114	dw 0
115
116	BS3_GLOBAL_DATA Bs3Gdte_Tss32Spare1, 8 ; Entry 058h
117	dw 00067h ; 32-bit TSS, spare 1.
118	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32Spare1)
119	db BS3_SYSTEM16_BASE_16_23
120	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
121	dw 0
122
123	BS3_GLOBAL_DATA Bs3Gdte_Tss32IobpIntRedirBm, 8 ; Entry 060h
124	; 32-bit TSS, with I/O permission & interrupt redirection bitmaps.
125	dw BS3_DATA_NM(Bs3SharedIobpEnd) - BS3_DATA_NM(Bs3Tss32WithIopb) - 1
126	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32WithIopb)
127	db BS3_SYSTEM16_BASE_16_23
128	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
129	dw 0
130
131	BS3_GLOBAL_DATA Bs3Gdte_Tss32IntRedirBm, 8 ; Entry 068h
132	; 32-bit TSS, with interrupt redirection bitmap (IOBP stripped by limit).
133	dw BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb) - 1
134	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32WithIopb)
135	db BS3_SYSTEM16_BASE_16_23
136	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
137	dw 0
138
139	BS3_GLOBAL_DATA Bs3Gdte_Tss64, 8 ; Entry 070h
140	dw 00067h ; 64-bit TSS.
141	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64)
142	db BS3_SYSTEM16_BASE_16_23
143	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
144	dw 0
145	dw 00000h, 00000h, 00000h, 00000h
146
147	BS3_GLOBAL_DATA Bs3Gdte_Tss64Spare0, 8 ; Entry 080h
148	dw 00067h ; 64-bit TSS, spare 0.
149	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64Spare0)
150	db BS3_SYSTEM16_BASE_16_23
151	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
152	dw 0
153	dw 00000h, 00000h, 00000h, 00000h
154
155	BS3_GLOBAL_DATA Bs3Gdte_Tss64Spare1, 8 ; Entry 090h
156	dw 00067h ; 64-bit TSS, spare 1.
157	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64Spare1)
158	db BS3_SYSTEM16_BASE_16_23
159	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
160	dw 0
161	dw 00000h, 00000h, 00000h, 00000h
162
163	BS3_GLOBAL_DATA Bs3Gdte_Tss64Iobp, 8 ; Entry 0a0h
164	; 64-bit TSS, with I/O permission bitmap
165	dw BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss64WithIopb) - 1
166	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64WithIopb)
167	db BS3_SYSTEM16_BASE_16_23
168	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
169	dw 0
170	dw 00000h, 00000h, 00000h, 00000h
171
172	BS3GdtAssertOffset 0b0h
173	dw 00000h, 00000h, 00000h, 00000h ; Entry 0b0h - currently unused
174	dw 00000h, 00000h, 00000h, 00000h ; Entry 0b8h - currently unused
175	dw 00000h, 00000h, 00000h, 00000h ; Entry 0c0h - currently unused
176	dw 00000h, 00000h, 00000h, 00000h ; Entry 0c8h - currently unused
177	dw 00000h, 00000h, 00000h, 00000h ; Entry 0d0h - currently unused
178	dw 00000h, 00000h, 00000h, 00000h ; Entry 0d8h - currently unused
179	dw 00000h, 00000h, 00000h, 00000h ; Entry 0e0h - currently unused
180	dw 00000h, 00000h, 00000h, 00000h ; Entry 0e8h - currently unused
181	dw 00000h, 00000h, 00000h, 00000h ; Entry 0f0h - currently unused
182
183	; Misc selectors.
184	BS3_GLOBAL_DATA Bs3Gdte_R0_MMIO16, 8 ; Entry 0f8h
185	dw 0ffffh, 00000h, 09310h, 00000h ; 16-bit VMMDev MMIO segment with base 0100000h.
186	BS3GdtAssertOffset 0100h
187
188
189	;;
190	; Macro that defines the selectors for ring-%1.
191	;
192	%macro BS3_GDT_RING_X_SELECTORS 1
193	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _First, 80h
194	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16, 8 ; Entry 100h
195	dw 0ffffh, (0xffff & BS3_ADDR_BS3TEXT16) ; 16-bit code segment with base 010000h.
196	dw 09b01h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3TEXT16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3TEXT16 >> 16))
197
198	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS16, 8 ; Entry 108h
199	dw 0ffffh, (0xffff & BS3_ADDR_BS3DATA16) ; 16-bit data segment with base 029000h.
200	dw 09300h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3DATA16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3DATA16 >> 16))
201
202	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _SS16, 8 ; Entry 110h
203	dw 0ffffh, 00000h ; 16-bit stack segment with base 0.
204	dw 09300h \| (%1 << 0dh), 00000h
205
206	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32, 8 ; Entry 118h
207	dw 0ffffh, 00000h ; 32-bit flat code segment.
208	dw 09b00h \| (%1 << 0dh), 000cfh
209
210	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS32, 8 ; Entry 120h
211	dw 0ffffh, 00000h ; 32-bit flat data segment.
212	dw 09300h \| (%1 << 0dh), 000cfh
213
214	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _SS32, 8 ; Entry 128h
215	dw 0ffffh, 00000h ; 32-bit flat stack segment.
216	dw 09300h \| (%1 << 0dh), 000cfh
217
218	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64, 8 ; Entry 130h
219	dw 0ffffh, 00000h ; 64-bit code segment.
220	dw 09a00h \| (%1 << 0dh), 000afh
221
222	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS64, 8 ; Entry 138h (also SS64)
223	dw 0ffffh, 00000h ; 64-bit stack and data segment.
224	dw 09300h \| (%1 << 0dh), 000afh
225
226	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_EO, 8 ; Entry 140h
227	dw 0ffffh, (0xffff & BS3_ADDR_BS3TEXT16) ; 16-bit code segment with base 01000h, not accessed, execute only, short limit.
228	dw 09800h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3TEXT16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3TEXT16 >> 16))
229
230	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_CNF, 8 ; Entry 148h
231	dw 0ffffh, (0xffff & BS3_ADDR_BS3TEXT16) ; 16-bit code segment with base 01000h, not accessed, execute only, short limit.
232	dw 09e00h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3TEXT16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3TEXT16 >> 16))
233
234	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_CND_EO, 8 ; Entry 150h
235	dw 0fffeh, 00000h ; 16-bit conforming code segment with base 0, not accessed, execute only, short limit.
236	dw 09c00h \| (%1 << 0dh), 000cfh
237
238	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_EO, 8 ; Entry 158h
239	dw 0ffffh, 00000h ; 32-bit flat code segment, not accessed, execute only.
240	dw 09800h \| (%1 << 0dh), 000cfh
241
242	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_CNF, 8 ; Entry 160h
243	dw 0ffffh, 00000h ; 32-bit flat conforming code segment, not accessed.
244	dw 09e00h \| (%1 << 0dh), 000cfh
245
246	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_CNF_EO, 8 ; Entry 168h
247	dw 0ffffh, 00000h ; 32-bit flat conforming code segment, not accessed, execute only.
248	dw 09c00h \| (%1 << 0dh), 000cfh
249
250	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_EO, 8 ; Entry 170h
251	dw 0ffffh, 00000h ; 64-bit code segment, not accessed, execute only.
252	dw 09800h \| (%1 << 0dh), 000afh
253
254	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_CNF, 8 ; Entry 178h
255	dw 0ffffh, 00000h ; 64-bit conforming code segment, not accessed.
256	dw 09e00h \| (%1 << 0dh), 000afh
257
258	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_CNF_EO, 8 ; Entry 180h
259	dw 0ffffh, 00000h ; 64-bit conforming code segment, execute only, not accessed.
260	dw 09c00h \| (%1 << 0dh), 000afh
261
262	;; @todo expand down segments.
263	dw 00000h, 00000h, 00000h, 00000h ; Entry 188h - unused.
264	dw 00000h, 00000h, 00000h, 00000h ; Entry 190h - unused.
265	dw 00000h, 00000h, 00000h, 00000h ; Entry 198h - unused.
266	dw 00000h, 00000h, 00000h, 00000h ; Entry 1a0h - unused.
267	dw 00000h, 00000h, 00000h, 00000h ; Entry 1a8h - unused.
268	dw 00000h, 00000h, 00000h, 00000h ; Entry 1b0h - unused.
269	dw 00000h, 00000h, 00000h, 00000h ; Entry 1b8h - unused.
270	dw 00000h, 00000h, 00000h, 00000h ; Entry 1c0h - unused.
271	dw 00000h, 00000h, 00000h, 00000h ; Entry 1c8h - unused.
272	dw 00000h, 00000h, 00000h, 00000h ; Entry 1d0h - unused.
273	dw 00000h, 00000h, 00000h, 00000h ; Entry 1d8h - unused.
274	dw 00000h, 00000h, 00000h, 00000h ; Entry 1e0h - unused.
275	dw 00000h, 00000h, 00000h, 00000h ; Entry 1e8h - unused.
276	dw 00000h, 00000h, 00000h, 00000h ; Entry 1f0h - unused.
277	dw 00000h, 00000h, 00000h, 00000h ; Entry 1f8h - unused.
278	%endmacro
279
280	;
281	; 100h..1f8h - Ring-0 selectors.
282	;
283	BS3_GDT_RING_X_SELECTORS 0
284
285	;
286	; 200h..2f8h - Ring-1 selectors.
287	;
288	BS3_GDT_RING_X_SELECTORS 1
289
290	;
291	; 300h..3f8h - Ring-2 selectors.
292	;
293	BS3_GDT_RING_X_SELECTORS 2
294
295	;
296	; 400h..4f8h - Ring-3 selectors.
297	;
298	BS3_GDT_RING_X_SELECTORS 3
299
300	;
301	; 500..5f8h - Named spare GDT entries.
302	;
303	BS3GdtAssertOffset 0500h
304	BS3_GLOBAL_DATA Bs3GdteSpare00, 8 ; Entry 500h
305	dq 0
306	BS3_GLOBAL_DATA Bs3GdteSpare01, 8 ; Entry 508h
307	dq 0
308	BS3_GLOBAL_DATA Bs3GdteSpare02, 8 ; Entry 510h
309	dq 0
310	BS3_GLOBAL_DATA Bs3GdteSpare03, 8 ; Entry 518h
311	dq 0
312	BS3_GLOBAL_DATA Bs3GdteSpare04, 8 ; Entry 520h
313	dq 0
314	BS3_GLOBAL_DATA Bs3GdteSpare05, 8 ; Entry 528h
315	dq 0
316	BS3_GLOBAL_DATA Bs3GdteSpare06, 8 ; Entry 530h
317	dq 0
318	BS3_GLOBAL_DATA Bs3GdteSpare07, 8 ; Entry 538h
319	dq 0
320	BS3_GLOBAL_DATA Bs3GdteSpare08, 8 ; Entry 540h
321	dq 0
322	BS3_GLOBAL_DATA Bs3GdteSpare09, 8 ; Entry 548h
323	dq 0
324	BS3_GLOBAL_DATA Bs3GdteSpare0a, 8 ; Entry 550h
325	dq 0
326	BS3_GLOBAL_DATA Bs3GdteSpare0b, 8 ; Entry 558h
327	dq 0
328	BS3_GLOBAL_DATA Bs3GdteSpare0c, 8 ; Entry 560h
329	dq 0
330	BS3_GLOBAL_DATA Bs3GdteSpare0d, 8 ; Entry 568h
331	dq 0
332	BS3_GLOBAL_DATA Bs3GdteSpare0e, 8 ; Entry 570h
333	dq 0
334	BS3_GLOBAL_DATA Bs3GdteSpare0f, 8 ; Entry 578h
335	dq 0
336	BS3_GLOBAL_DATA Bs3GdteSpare10, 8 ; Entry 580h
337	dq 0
338	BS3_GLOBAL_DATA Bs3GdteSpare11, 8 ; Entry 588h
339	dq 0
340	BS3_GLOBAL_DATA Bs3GdteSpare12, 8 ; Entry 590h
341	dq 0
342	BS3_GLOBAL_DATA Bs3GdteSpare13, 8 ; Entry 598h
343	dq 0
344	BS3_GLOBAL_DATA Bs3GdteSpare14, 8 ; Entry 5a0h
345	dq 0
346	BS3_GLOBAL_DATA Bs3GdteSpare15, 8 ; Entry 5a8h
347	dq 0
348	BS3_GLOBAL_DATA Bs3GdteSpare16, 8 ; Entry 5b0h
349	dq 0
350	BS3_GLOBAL_DATA Bs3GdteSpare17, 8 ; Entry 5b8h
351	dq 0
352	BS3_GLOBAL_DATA Bs3GdteSpare18, 8 ; Entry 5c0h
353	dq 0
354	BS3_GLOBAL_DATA Bs3GdteSpare19, 8 ; Entry 5c8h
355	dq 0
356	BS3_GLOBAL_DATA Bs3GdteSpare1a, 8 ; Entry 5d0h
357	dq 0
358	BS3_GLOBAL_DATA Bs3GdteSpare1b, 8 ; Entry 5d8h
359	dq 0
360	BS3_GLOBAL_DATA Bs3GdteSpare1c, 8 ; Entry 5e0h
361	dq 0
362	BS3_GLOBAL_DATA Bs3GdteSpare1d, 8 ; Entry 5e8h
363	dq 0
364	BS3_GLOBAL_DATA Bs3GdteSpare1e, 8 ; Entry 5f0h
365	dq 0
366	BS3_GLOBAL_DATA Bs3GdteSpare1f, 8 ; Entry 5f8h
367	dq 0
368
369	;
370	; 600..df8h - 16-bit DPL=3 data segments covering the first 16MB of memory.
371	;
372	BS3_GLOBAL_DATA Bs3GdteTiled, 8 ; Entry 600h
373	%assign u8HighBase 0
374	%rep 256
375	dw 0ffffh, 00000h, 0f300h \| u8HighBase, 00000h
376	%assign u8HighBase u8HighBase + 1
377	%endrep
378	;
379	; e00..ff8h - Free GDTEs.
380	;
381	BS3GdtAssertOffset 0e00h
382	BS3_GLOBAL_DATA Bs3GdteFreePart1, 200h
383	times 200h db 0
384
385	;
386	; 1000h - the real mode segment number for BS3TEXT16. DPL=0. BASE=0x10000h
387	;
388	BS3GdtAssertOffset 01000h
389	BS3_GLOBAL_DATA Bs3Gdte_CODE16, 8h
390	dw 0ffffh, 00000h, 09b01h, 00000h
391
392	;
393	; 1008..17f8h - Free GDTEs.
394	;
395	BS3GdtAssertOffset 01008h
396	BS3_GLOBAL_DATA Bs3GdteFreePart2, 07f8h
397	times 07f8h db 0
398
399	;
400	; 1800..1ff8h - 16-bit DPL=0 data/stack segments covering the first 16MB of memory.
401	;
402	BS3GdtAssertOffset 01800h
403	BS3_GLOBAL_DATA Bs3GdteTiledR0, 8 ; Entry 1800h
404	%assign u8HighBase 0
405	%rep 256
406	dw 0ffffh, 00000h, 09300h \| u8HighBase, 00000h
407	%assign u8HighBase u8HighBase + 1
408	%endrep
409
410	;
411	; 2000h - the real mode segment number for BS3SYSTEM. DPL=3. BASE=0x20000h
412	;
413	BS3GdtAssertOffset 02000h
414	BS3_GLOBAL_DATA Bs3Gdte_SYSTEM16, 8h
415	dw 0ffffh, 00000h, 0f302h, 00000h
416
417	;
418	; 2008..28f8h - Free GDTEs.
419	;
420	BS3_GLOBAL_DATA Bs3GdteFreePart3, 08f8h
421	times 08f8h db 0
422
423	;
424	; 2900h - the real mode segment number for BS3KIT_GRPNM_DATA16. DPL=3. BASE=0x29000h
425	;
426	BS3GdtAssertOffset 02900h
427	BS3_GLOBAL_DATA Bs3Gdte_DATA16, 8h
428	dw 0ffffh, 09000h, 0f302h, 00000h
429
430	;
431	; 2908..2f98h - Free GDTEs.
432	;
433	BS3GdtAssertOffset 02908h
434	BS3_GLOBAL_DATA Bs3GdteFreePart4, 698h
435	times 698h db 0
436
437	;
438	; 2be0..2fe0h - 8 spare entries preceeding the test page which we're free
439	; to mess with page table protection.
440	;
441	BS3GdtAssertOffset 02fa0h
442	BS3_GLOBAL_DATA Bs3GdtePreTestPage08, 8
443	dq 0
444	BS3_GLOBAL_DATA Bs3GdtePreTestPage07, 8
445	dq 0
446	BS3_GLOBAL_DATA Bs3GdtePreTestPage06, 8
447	dq 0
448	BS3_GLOBAL_DATA Bs3GdtePreTestPage05, 8
449	dq 0
450	BS3_GLOBAL_DATA Bs3GdtePreTestPage04, 8
451	dq 0
452	BS3_GLOBAL_DATA Bs3GdtePreTestPage03, 8
453	dq 0
454	BS3_GLOBAL_DATA Bs3GdtePreTestPage02, 8
455	dq 0
456	BS3_GLOBAL_DATA Bs3GdtePreTestPage01, 8
457	dq 0
458
459	;
460	; 2fe0..3fd8h - 16 Test entries at the start of the page where we're free
461	; to mess with page table protection.
462	;
463	BS3GdtAssertOffset 02fe0h
464	AssertCompile(($ - $$) == 0x3000)
465	BS3_GLOBAL_DATA Bs3GdteTestPage, 0
466	BS3_GLOBAL_DATA Bs3GdteTestPage00, 8
467	dq 0
468	BS3_GLOBAL_DATA Bs3GdteTestPage01, 8
469	dq 0
470	BS3_GLOBAL_DATA Bs3GdteTestPage02, 8
471	dq 0
472	BS3_GLOBAL_DATA Bs3GdteTestPage03, 8
473	dq 0
474	BS3_GLOBAL_DATA Bs3GdteTestPage04, 8
475	dq 0
476	BS3_GLOBAL_DATA Bs3GdteTestPage05, 8
477	dq 0
478	BS3_GLOBAL_DATA Bs3GdteTestPage06, 8
479	dq 0
480	BS3_GLOBAL_DATA Bs3GdteTestPage07, 8
481	dq 0
482	BS3GdtAssertOffset 3020h
483	times 0fb8h db 0
484	BS3GdtAssertOffset 3fd8h
485	BS3_GLOBAL_DATA Bs3GdtEnd, 0
486	db 10, 13, 'GDTE', 10, 13 ; alignment padding (next address on 16 byte boundrary).
487	BS3GdtAssertOffset 4000h - 20h ; We're at a page boundrary here! Only GDT and eyecatchers on page starting at 3000h!
488	AssertCompile(($ - $$) == 0x4000)
489
490
491
492	;;
493	; The 16-bit TSS.
494	;
495	BS3_GLOBAL_DATA Bs3Tss16, X86TSS16_size
496	istruc X86TSS16
497	at X86TSS16.selPrev, dw 0
498	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
499	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
500	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
501	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
502	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
503	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
504	at X86TSS16.ip, dw 0
505	at X86TSS16.flags, dw 0
506	at X86TSS16.ax, dw 0
507	at X86TSS16.cx, dw 0
508	at X86TSS16.dx, dw 0
509	at X86TSS16.bx, dw 0
510	at X86TSS16.sp, dw 0
511	at X86TSS16.bp, dw 0
512	at X86TSS16.si, dw 0
513	at X86TSS16.di, dw 0
514	at X86TSS16.es, dw 0
515	at X86TSS16.cs, dw 0
516	at X86TSS16.ss, dw 0
517	at X86TSS16.ds, dw 0
518	at X86TSS16.selLdt, dw 0
519	iend
520
521	;;
522	; 16-bit TSS for (trying to) handle double faults.
523	BS3_GLOBAL_DATA Bs3Tss16DoubleFault, X86TSS16_size
524	istruc X86TSS16
525	at X86TSS16.selPrev, dw 0
526	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
527	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
528	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
529	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
530	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
531	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
532	at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
533	at X86TSS16.flags, dw X86_EFL_1
534	at X86TSS16.ax, dw 0
535	at X86TSS16.cx, dw 0
536	at X86TSS16.dx, dw 0
537	at X86TSS16.bx, dw 0
538	at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST1
539	at X86TSS16.bp, dw 0
540	at X86TSS16.si, dw 0
541	at X86TSS16.di, dw 0
542	at X86TSS16.es, dw BS3_SEL_R0_DS16
543	at X86TSS16.cs, dw BS3_SEL_R0_CS16
544	at X86TSS16.ss, dw BS3_SEL_R0_SS16
545	at X86TSS16.ds, dw BS3_SEL_R0_DS16
546	at X86TSS16.selLdt, dw 0
547	iend
548
549	;;
550	; A spare 16-bit TSS for testcases to play around with.
551	BS3_GLOBAL_DATA Bs3Tss16Spare0, X86TSS16_size
552	istruc X86TSS16
553	at X86TSS16.selPrev, dw 0
554	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
555	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
556	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
557	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
558	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
559	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
560	at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
561	at X86TSS16.flags, dw X86_EFL_1
562	at X86TSS16.ax, dw 0
563	at X86TSS16.cx, dw 0
564	at X86TSS16.dx, dw 0
565	at X86TSS16.bx, dw 0
566	at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST2
567	at X86TSS16.bp, dw 0
568	at X86TSS16.si, dw 0
569	at X86TSS16.di, dw 0
570	at X86TSS16.es, dw BS3_SEL_R0_DS16
571	at X86TSS16.cs, dw BS3_SEL_R0_CS16
572	at X86TSS16.ss, dw BS3_SEL_R0_SS16
573	at X86TSS16.ds, dw BS3_SEL_R0_DS16
574	at X86TSS16.selLdt, dw 0
575	iend
576
577	;;
578	; A spare 16-bit TSS for testcases to play around with.
579	BS3_GLOBAL_DATA Bs3Tss16Spare1, X86TSS16_size
580	istruc X86TSS16
581	at X86TSS16.selPrev, dw 0
582	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
583	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
584	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
585	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
586	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
587	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
588	at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
589	at X86TSS16.flags, dw X86_EFL_1
590	at X86TSS16.ax, dw 0
591	at X86TSS16.cx, dw 0
592	at X86TSS16.dx, dw 0
593	at X86TSS16.bx, dw 0
594	at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST4
595	at X86TSS16.bp, dw 0
596	at X86TSS16.si, dw 0
597	at X86TSS16.di, dw 0
598	at X86TSS16.es, dw BS3_SEL_R0_DS16
599	at X86TSS16.cs, dw BS3_SEL_R0_CS16
600	at X86TSS16.ss, dw BS3_SEL_R0_SS16
601	at X86TSS16.ds, dw BS3_SEL_R0_DS16
602	at X86TSS16.selLdt, dw 0
603	iend
604
605
606	;;
607	; The 32-bit TSS.
608	;
609	BS3_GLOBAL_DATA Bs3Tss32, X86TSS32_size
610	istruc X86TSS32
611	at X86TSS32.selPrev, dw 0
612	at X86TSS32.padding1, dw 0
613	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
614	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
615	at X86TSS32.padding_ss0, dw 1
616	at X86TSS32.esp1, dd 1
617	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
618	at X86TSS32.padding_ss1, dw 1
619	at X86TSS32.esp2, dd 1
620	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
621	at X86TSS32.padding_ss2, dw 1
622	at X86TSS32.cr3, dd 0
623	at X86TSS32.eip, dd 0
624	at X86TSS32.eflags, dd X86_EFL_1
625	at X86TSS32.eax, dd 0
626	at X86TSS32.ecx, dd 0
627	at X86TSS32.edx, dd 0
628	at X86TSS32.ebx, dd 0
629	at X86TSS32.esp, dd 0
630	at X86TSS32.ebp, dd 0
631	at X86TSS32.esi, dd 0
632	at X86TSS32.edi, dd 0
633	at X86TSS32.es, dw 0
634	at X86TSS32.padding_es, dw 0
635	at X86TSS32.cs, dw 0
636	at X86TSS32.padding_cs, dw 0
637	at X86TSS32.ss, dw 0
638	at X86TSS32.padding_ss, dw 0
639	at X86TSS32.ds, dw 0
640	at X86TSS32.padding_ds, dw 0
641	at X86TSS32.fs, dw 0
642	at X86TSS32.padding_fs, dw 0
643	at X86TSS32.gs, dw 0
644	at X86TSS32.padding_gs, dw 0
645	at X86TSS32.selLdt, dw 0
646	at X86TSS32.padding_ldt, dw 0
647	at X86TSS32.fDebugTrap, dw 0
648	at X86TSS32.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb))
649	iend
650
651	;;
652	; The 32-bit TSS for handling double faults.
653	BS3_GLOBAL_DATA Bs3Tss32DoubleFault, X86TSS32_size
654	istruc X86TSS32
655	at X86TSS32.selPrev, dw 0
656	at X86TSS32.padding1, dw 0
657	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
658	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
659	at X86TSS32.padding_ss0, dw 1
660	at X86TSS32.esp1, dd 1
661	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
662	at X86TSS32.padding_ss1, dw 1
663	at X86TSS32.esp2, dd 1
664	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
665	at X86TSS32.padding_ss2, dw 1
666	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
667	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
668	at X86TSS32.eflags, dd X86_EFL_1
669	at X86TSS32.eax, dd 0
670	at X86TSS32.ecx, dd 0
671	at X86TSS32.edx, dd 0
672	at X86TSS32.ebx, dd 0
673	at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST1
674	at X86TSS32.ebp, dd 0
675	at X86TSS32.esi, dd 0
676	at X86TSS32.edi, dd 0
677	at X86TSS32.es, dw BS3_SEL_R0_DS32
678	at X86TSS32.padding_es, dw 0
679	at X86TSS32.cs, dw BS3_SEL_R0_CS32
680	at X86TSS32.padding_cs, dw 0
681	at X86TSS32.ss, dw BS3_SEL_R0_SS32
682	at X86TSS32.padding_ss, dw 0
683	at X86TSS32.ds, dw BS3_SEL_R0_DS32
684	at X86TSS32.padding_ds, dw 0
685	at X86TSS32.fs, dw BS3_SEL_R0_DS32
686	at X86TSS32.padding_fs, dw 0
687	at X86TSS32.gs, dw BS3_SEL_R0_DS32
688	at X86TSS32.padding_gs, dw 0
689	at X86TSS32.selLdt, dw 0
690	at X86TSS32.padding_ldt, dw 0
691	at X86TSS32.fDebugTrap, dw 0
692	at X86TSS32.offIoBitmap, dw 0
693	iend
694
695	;;
696	; A spare 32-bit TSS testcases to play around with.
697	BS3_GLOBAL_DATA Bs3Tss32Spare0, X86TSS32_size
698	istruc X86TSS32
699	at X86TSS32.selPrev, dw 0
700	at X86TSS32.padding1, dw 0
701	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
702	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
703	at X86TSS32.padding_ss0, dw 1
704	at X86TSS32.esp1, dd 1
705	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
706	at X86TSS32.padding_ss1, dw 1
707	at X86TSS32.esp2, dd 1
708	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
709	at X86TSS32.padding_ss2, dw 1
710	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
711	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
712	at X86TSS32.eflags, dd X86_EFL_1
713	at X86TSS32.eax, dd 0
714	at X86TSS32.ecx, dd 0
715	at X86TSS32.edx, dd 0
716	at X86TSS32.ebx, dd 0
717	at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST2
718	at X86TSS32.ebp, dd 0
719	at X86TSS32.esi, dd 0
720	at X86TSS32.edi, dd 0
721	at X86TSS32.es, dw BS3_SEL_R0_DS32
722	at X86TSS32.padding_es, dw 0
723	at X86TSS32.cs, dw BS3_SEL_R0_CS32
724	at X86TSS32.padding_cs, dw 0
725	at X86TSS32.ss, dw BS3_SEL_R0_SS32
726	at X86TSS32.padding_ss, dw 0
727	at X86TSS32.ds, dw BS3_SEL_R0_DS32
728	at X86TSS32.padding_ds, dw 0
729	at X86TSS32.fs, dw BS3_SEL_R0_DS32
730	at X86TSS32.padding_fs, dw 0
731	at X86TSS32.gs, dw BS3_SEL_R0_DS32
732	at X86TSS32.padding_gs, dw 0
733	at X86TSS32.selLdt, dw 0
734	at X86TSS32.padding_ldt, dw 0
735	at X86TSS32.fDebugTrap, dw 0
736	at X86TSS32.offIoBitmap, dw 0
737	iend
738
739	;;
740	; A spare 32-bit TSS testcases to play around with.
741	BS3_GLOBAL_DATA Bs3Tss32Spare1, X86TSS32_size
742	istruc X86TSS32
743	at X86TSS32.selPrev, dw 0
744	at X86TSS32.padding1, dw 0
745	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
746	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
747	at X86TSS32.padding_ss0, dw 1
748	at X86TSS32.esp1, dd 1
749	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
750	at X86TSS32.padding_ss1, dw 1
751	at X86TSS32.esp2, dd 1
752	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
753	at X86TSS32.padding_ss2, dw 1
754	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
755	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
756	at X86TSS32.eflags, dd X86_EFL_1
757	at X86TSS32.eax, dd 0
758	at X86TSS32.ecx, dd 0
759	at X86TSS32.edx, dd 0
760	at X86TSS32.ebx, dd 0
761	at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST4
762	at X86TSS32.ebp, dd 0
763	at X86TSS32.esi, dd 0
764	at X86TSS32.edi, dd 0
765	at X86TSS32.es, dw BS3_SEL_R0_DS32
766	at X86TSS32.padding_es, dw 0
767	at X86TSS32.cs, dw BS3_SEL_R0_CS32
768	at X86TSS32.padding_cs, dw 0
769	at X86TSS32.ss, dw BS3_SEL_R0_SS32
770	at X86TSS32.padding_ss, dw 0
771	at X86TSS32.ds, dw BS3_SEL_R0_DS32
772	at X86TSS32.padding_ds, dw 0
773	at X86TSS32.fs, dw BS3_SEL_R0_DS32
774	at X86TSS32.padding_fs, dw 0
775	at X86TSS32.gs, dw BS3_SEL_R0_DS32
776	at X86TSS32.padding_gs, dw 0
777	at X86TSS32.selLdt, dw 0
778	at X86TSS32.padding_ldt, dw 0
779	at X86TSS32.fDebugTrap, dw 0
780	at X86TSS32.offIoBitmap, dw 0
781	iend
782
783
784
785	;;
786	; 64-bit TSS
787	BS3_GLOBAL_DATA Bs3Tss64, X86TSS64_size
788	istruc X86TSS64
789	at X86TSS64.u32Reserved, dd 0
790	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
791	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
792	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
793	at X86TSS64.u32Reserved2, dd 0
794	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
795	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
796	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
797	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
798	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
799	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
800	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
801	at X86TSS64.u16Reserved, dw 0
802	at X86TSS64.offIoBitmap, dw 0
803	iend
804
805	;;
806	; A spare TSS for testcases to play around with.
807	BS3_GLOBAL_DATA Bs3Tss64Spare0, X86TSS64_size
808	istruc X86TSS64
809	at X86TSS64.u32Reserved, dd 0
810	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
811	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
812	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
813	at X86TSS64.u32Reserved2, dd 0
814	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
815	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
816	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
817	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
818	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
819	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
820	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
821	at X86TSS64.u16Reserved, dw 0
822	at X86TSS64.offIoBitmap, dw 0
823	iend
824
825	;;
826	; A spare TSS for testcases to play around with.
827	BS3_GLOBAL_DATA Bs3Tss64Spare1, X86TSS64_size
828	istruc X86TSS64
829	at X86TSS64.u32Reserved, dd 0
830	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
831	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
832	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
833	at X86TSS64.u32Reserved2, dd 0
834	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
835	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
836	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
837	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
838	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
839	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
840	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
841	at X86TSS64.u16Reserved, dw 0
842	at X86TSS64.offIoBitmap, dw 0
843	iend
844
845
846
847	;;
848	; 64-bit TSS sharing an I/O permission bitmap (Bs3SharedIobp) with a 32-bit TSS.
849	;
850	BS3_GLOBAL_DATA Bs3Tss64WithIopb, X86TSS64_size
851	istruc X86TSS64
852	at X86TSS64.u32Reserved, dd 0
853	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
854	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
855	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
856	at X86TSS64.u32Reserved2, dd 0
857	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
858	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
859	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
860	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
861	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
862	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
863	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
864	at X86TSS64.u16Reserved, dw 0
865	at X86TSS64.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss64WithIopb))
866	iend
867
868	;;
869	; 32-bit TSS sharing an I/O permission bitmap (Bs3SharedIobp) with a 64-bit TSS,
870	; and sporting an interrupt redirection bitmap (Bs3SharedIntRedirBm).
871	BS3_GLOBAL_DATA Bs3Tss32WithIopb, X86TSS32_size
872	istruc X86TSS32
873	at X86TSS32.selPrev, dw 0
874	at X86TSS32.padding1, dw 0
875	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
876	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
877	at X86TSS32.padding_ss0, dw 1
878	at X86TSS32.esp1, dd 1
879	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
880	at X86TSS32.padding_ss1, dw 1
881	at X86TSS32.esp2, dd 1
882	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
883	at X86TSS32.padding_ss2, dw 1
884	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
885	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
886	at X86TSS32.eflags, dd X86_EFL_1
887	at X86TSS32.eax, dd 0
888	at X86TSS32.ecx, dd 0
889	at X86TSS32.edx, dd 0
890	at X86TSS32.ebx, dd 0
891	at X86TSS32.esp, dd 0
892	at X86TSS32.ebp, dd 0
893	at X86TSS32.esi, dd 0
894	at X86TSS32.edi, dd 0
895	at X86TSS32.es, dw 0
896	at X86TSS32.padding_es, dw 0
897	at X86TSS32.cs, dw 0
898	at X86TSS32.padding_cs, dw 0
899	at X86TSS32.ss, dw 0
900	at X86TSS32.padding_ss, dw 0
901	at X86TSS32.ds, dw 0
902	at X86TSS32.padding_ds, dw 0
903	at X86TSS32.fs, dw 0
904	at X86TSS32.padding_fs, dw 0
905	at X86TSS32.gs, dw 0
906	at X86TSS32.padding_gs, dw 0
907	at X86TSS32.selLdt, dw 0
908	at X86TSS32.padding_ldt, dw 0
909	at X86TSS32.fDebugTrap, dw 0
910	at X86TSS32.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb))
911	iend
912
913	;
914	; We insert 6 bytes before the interrupt redirection bitmap just to make sure
915	; we've all got the same idea about where it starts (i.e. 32 bytes before IOBP).
916	;
917	times 6 db 0ffh
918
919	;;
920	; Interrupt redirection bitmap (used by 32-bit TSS).
921	BS3_GLOBAL_DATA Bs3SharedIntRedirBm, 32
922	times 32 db 00h
923
924	;;
925	; Shared I/O permission bitmap used both by Bs3Tss64WithIopb and Bs3Tss32WithIopb.
926	BS3_GLOBAL_DATA Bs3SharedIobp, 8192+2
927	times 8192+2 db 0ffh
928	BS3_GLOBAL_DATA Bs3SharedIobpEnd, 0
929
930
931	align 128
932
933	;;
934	; 16-bit IDT.
935	; This requires manual setup by code fielding traps, so we'll just reserve the
936	; memory here.
937	;
938	BS3_GLOBAL_DATA Bs3Idt16, 256*8
939	times 256 dq 0
940
941	;;
942	; 32-bit IDT.
943	; This requires manual setup by code fielding traps, so we'll just reserve the
944	; memory here.
945	;
946	BS3_GLOBAL_DATA Bs3Idt32, 256*8
947	times 256 dq 0
948
949	;;
950	; 64-bit IDT.
951	; This requires manual setup by code fielding traps, so we'll just reserve the
952	; memory here.
953	;
954	BS3_GLOBAL_DATA Bs3Idt64, 256*16
955	times 256 dq 0, 0
956
957
958	times 6 db 0 ; Pad the first LIDT correctly.
959
960	;;
961	; LIDT structure for the 16-bit IDT (8-byte aligned on offset).
962	BS3_GLOBAL_DATA Bs3Lidt_Idt16, 2+8
963	dw 256*8 - 1 ; limit
964	dw BS3_SYSTEM16_BASE_LOW(Bs3Idt16) ; low offset
965	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
966	dd 0 ; top32 offset
967
968	times 4 db 0 ; padding the start of the next
969
970	;;
971	; LIDT structure for the 32-bit IDT (8-byte aligned on offset).
972	BS3_GLOBAL_DATA Bs3Lidt_Idt32, 2+8
973	dw 256*8 - 1 ; limit
974	dw BS3_SYSTEM16_BASE_LOW(Bs3Idt32) ; low offset
975	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
976	dd 0 ; top32 offset
977
978	times 4 db 0 ; padding the start of the next
979
980	;;
981	; LIDT structure for the 64-bit IDT (8-byte aligned on offset).
982	BS3_GLOBAL_DATA Bs3Lidt_Idt64, 2+8
983	dw 256*16 - 1 ; limit
984	dw BS3_SYSTEM16_BASE_LOW(Bs3Idt64) ; low offset
985	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
986	dd 0 ; top32 offset
987
988	times 4 db 0 ; padding the start of the next
989
990	;;
991	; LIDT structure for the real mode IVT at address 0x00000000 (8-byte aligned on offset).
992	BS3_GLOBAL_DATA Bs3Lidt_Ivt, 2+8
993	dw 256*4 - 1 ; limit
994	dw 0 ; low offset
995	dw 0 ; high offset
996	dd 0 ; top32 offset
997
998	times 4 db 0 ; padding the start of the next
999
1000	;;
1001	; LGDT structure for the GDT (8-byte aligned on offset).
1002	BS3_GLOBAL_DATA Bs3Lgdt_Gdt, 2+8
1003	dw BS3_DATA_NM(Bs3GdtEnd) - BS3_DATA_NM(Bs3Gdt) - 1 ; limit
1004	dw BS3_SYSTEM16_BASE_LOW(Bs3Gdt) ; low offset
1005	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
1006	dd 0 ; top32 offset
1007
1008
1009
1010	align 16
1011	;;
1012	; LDT filling up the rest of the segment.
1013	;
1014	; Currently this starts at 0x84d0, which leaves us with 0xb30 bytes. We'll use
1015	; the last 32 of those for an eye catcher.
1016	;
1017	BS3_GLOBAL_DATA Bs3Ldt, 0b30h - 32
1018	times (0b30h - 32) db 0
1019	BS3_GLOBAL_DATA Bs3LdtEnd, 0
1020	db 10, 13, 'eye-catcher: SYSTEM16 END', 10, 13, 0, 0, 0 ; 32 bytes long
1021
1022	;
1023	; Check the segment size.
1024	;
1025	%ifndef KBUILD_GENERATING_MAKEFILE_DEPENDENCIES
1026	%if ($ - $$) != 09000h
1027	%assign offActual ($ - $$)
1028	%error "Bad BS3SYSTEM16 segment size: " %+ offActual %+ ", expected 0x9000 (36864)"
1029	%endif
1030	%endif
1031

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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-system-data.asm@ 60439

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