bs3-system-data.asm@ 92580

Last change on this file since 92580 was 92523, checked in by vboxsync, 3 years ago
VMMDev,ValKit/Bootsectors: Moved the VMMDevTesting MMIO page from 0x101000 to 0xdf000 so it doesn't cause trouble for KVM memory registrations (too simple at this point). This also simplifies access from real-mode a bit. bugref:9044
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 40.8 KB

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1	; $Id: bs3-system-data.asm 92523 2021-11-20 23:35:37Z vboxsync $
2	;; @file
3	; BS3Kit - GDT
4	;
5
6	;
7	; Copyright (C) 2007-2020 Oracle Corporation
8	;
9	; This file is part of VirtualBox Open Source Edition (OSE), as
10	; available from http://www.virtualbox.org. This file is free software;
11	; you can redistribute it and/or modify it under the terms of the GNU
12	; General Public License (GPL) as published by the Free Software
13	; Foundation, in version 2 as it comes in the "COPYING" file of the
14	; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	;
17	; The contents of this file may alternatively be used under the terms
18	; of the Common Development and Distribution License Version 1.0
19	; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20	; VirtualBox OSE distribution, in which case the provisions of the
21	; CDDL are applicable instead of those of the GPL.
22	;
23	; You may elect to license modified versions of this file under the
24	; terms and conditions of either the GPL or the CDDL or both.
25	;
26
27	%include "bs3kit.mac"
28
29	%define BS3_SYSTEM16_BASE_16_23 ((BS3_ADDR_BS3SYSTEM16 >> 16) & 0xff)
30	%define BS3_SYSTEM16_BASE_LOW(a_DataSym) ((BS3_DATA_NM(a_DataSym) - StartSystem16) & 0xffff)
31
32	;;
33	; The GDT (X86DESCGENERIC).
34	;
35	BS3_BEGIN_SYSTEM16
36	StartSystem16:
37	db 10, 13, 'eye-catcher: SYSTEM16.......', 10, 13 ; 32 bytes long
38	BS3_GLOBAL_DATA Bs3Gdt, 4000h - 20h
39
40	;; Macro for checking GDT offsets as we go along.
41	;; @param %1 The expected current offset.
42	%macro BS3GdtAssertOffset 1
43	%ifndef KBUILD_GENERATING_MAKEFILE_DEPENDENCIES
44	%if ($ - BS3_DATA_NM(Bs3Gdt)) != %1
45	%assign offActual ($ - BS3_DATA_NM(Bs3Gdt))
46	%error "BS3GdtAssertOffset: Bad offset: " %+ offActual %+ ", expected " %+ %1
47	%endif
48	%endif
49	%endmacro
50
51	dw 00000h, 00000h, 00000h, 00000h ; null selector
52	BS3GdtAssertOffset 8
53
54	;
55	; 008h..0f8h - System selectors and other stuff
56	;
57	dw 00000h, 00000h, 00000h, 00000h ; Entry 008h - currently unused
58
59	BS3_GLOBAL_DATA Bs3Gdte_Ldt, 16 ; Entry 010h
60	dw BS3_DATA_NM(Bs3LdtEnd) - BS3_DATA_NM(Bs3Ldt) - 1
61	dw BS3_SYSTEM16_BASE_LOW(Bs3Ldt)
62	db BS3_SYSTEM16_BASE_16_23
63	db X86_SEL_TYPE_SYS_LDT \| 0x80
64	dw 00000h
65	dw 00000h, 00000h, 00000h, 00000h ; zero for 64-bit mode.
66
67	BS3_GLOBAL_DATA Bs3Gdte_Tss16, 8 ; Entry 020h
68	dw 0002bh ; 16-bit TSS.
69	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16)
70	db BS3_SYSTEM16_BASE_16_23
71	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
72	dw 0
73
74	BS3_GLOBAL_DATA Bs3Gdte_Tss16DoubleFault, 8 ; Entry 028h
75	dw 0002bh ; 16-bit TSS, double fault.
76	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16DoubleFault)
77	db BS3_SYSTEM16_BASE_16_23
78	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
79	dw 0
80
81	BS3_GLOBAL_DATA Bs3Gdte_Tss16Spare0, 8 ; Entry 030h
82	dw 0002bh ; 16-bit TSS, spare 0.
83	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16Spare0)
84	db BS3_SYSTEM16_BASE_16_23
85	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
86	dw 0
87
88	BS3_GLOBAL_DATA Bs3Gdte_Tss16Spare1, 8 ; Entry 038h
89	dw 0002bh ; 16-bit TSS, spare 0.
90	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss16Spare1)
91	db BS3_SYSTEM16_BASE_16_23
92	db X86_SEL_TYPE_SYS_286_TSS_AVAIL \| 0x80
93	dw 0
94
95	BS3_GLOBAL_DATA Bs3Gdte_Tss32, 8 ; Entry 040h
96	dw 00067h ; 32-bit TSS.
97	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32)
98	db BS3_SYSTEM16_BASE_16_23
99	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
100	dw 0
101
102	BS3_GLOBAL_DATA Bs3Gdte_Tss32DoubleFault, 8 ; Entry 048h
103	dw 00067h ; 32-bit TSS, double fault.
104	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32DoubleFault)
105	db BS3_SYSTEM16_BASE_16_23
106	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
107	dw 0
108
109	BS3_GLOBAL_DATA Bs3Gdte_Tss32Spare0, 8 ; Entry 050h
110	dw 00067h ; 32-bit TSS, spare 0.
111	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32Spare0)
112	db BS3_SYSTEM16_BASE_16_23
113	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
114	dw 0
115
116	BS3_GLOBAL_DATA Bs3Gdte_Tss32Spare1, 8 ; Entry 058h
117	dw 00067h ; 32-bit TSS, spare 1.
118	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32Spare1)
119	db BS3_SYSTEM16_BASE_16_23
120	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
121	dw 0
122
123	BS3_GLOBAL_DATA Bs3Gdte_Tss32IobpIntRedirBm, 8 ; Entry 060h
124	; 32-bit TSS, with I/O permission & interrupt redirection bitmaps.
125	dw BS3_DATA_NM(Bs3SharedIobpEnd) - BS3_DATA_NM(Bs3Tss32WithIopb) - 1
126	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32WithIopb)
127	db BS3_SYSTEM16_BASE_16_23
128	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
129	dw 0
130
131	BS3_GLOBAL_DATA Bs3Gdte_Tss32IntRedirBm, 8 ; Entry 068h
132	; 32-bit TSS, with interrupt redirection bitmap (IOBP stripped by limit).
133	dw BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb) - 1
134	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss32WithIopb)
135	db BS3_SYSTEM16_BASE_16_23
136	db X86_SEL_TYPE_SYS_386_TSS_AVAIL \| 0x80
137	dw 0
138
139	BS3_GLOBAL_DATA Bs3Gdte_Tss64, 8 ; Entry 070h
140	dw 00067h ; 64-bit TSS.
141	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64)
142	db BS3_SYSTEM16_BASE_16_23
143	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
144	dw 0
145	dw 00000h, 00000h, 00000h, 00000h
146
147	BS3_GLOBAL_DATA Bs3Gdte_Tss64Spare0, 8 ; Entry 080h
148	dw 00067h ; 64-bit TSS, spare 0.
149	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64Spare0)
150	db BS3_SYSTEM16_BASE_16_23
151	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
152	dw 0
153	dw 00000h, 00000h, 00000h, 00000h
154
155	BS3_GLOBAL_DATA Bs3Gdte_Tss64Spare1, 8 ; Entry 090h
156	dw 00067h ; 64-bit TSS, spare 1.
157	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64Spare1)
158	db BS3_SYSTEM16_BASE_16_23
159	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
160	dw 0
161	dw 00000h, 00000h, 00000h, 00000h
162
163	BS3_GLOBAL_DATA Bs3Gdte_Tss64Iobp, 8 ; Entry 0a0h
164	; 64-bit TSS, with I/O permission bitmap
165	dw BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss64WithIopb) - 1
166	dw BS3_SYSTEM16_BASE_LOW(Bs3Tss64WithIopb)
167	db BS3_SYSTEM16_BASE_16_23
168	db AMD64_SEL_TYPE_SYS_TSS_AVAIL \| 0x80
169	dw 0
170	dw 00000h, 00000h, 00000h, 00000h
171
172	BS3GdtAssertOffset 0b0h
173	dw 00000h, 00000h, 00000h, 00000h ; Entry 0b0h - currently unused
174	dw 00000h, 00000h, 00000h, 00000h ; Entry 0b8h - currently unused
175	dw 00000h, 00000h, 00000h, 00000h ; Entry 0c0h - currently unused
176	dw 00000h, 00000h, 00000h, 00000h ; Entry 0c8h - currently unused
177	dw 00000h, 00000h, 00000h, 00000h ; Entry 0d0h - currently unused
178	dw 00000h, 00000h, 00000h, 00000h ; Entry 0d8h - currently unused
179
180	; Misc selectors.
181	BS3_GLOBAL_DATA Bs3Gdte_RMTEXT16_CS, 8 ; Entry 0e0h
182	dw 0fffeh, 00000h ; 16-bit conforming code (read+exec) segment, accessed. Will be finalized at startup.
183	dw 09f00h, 00000h
184	BS3_GLOBAL_DATA Bs3Gdte_X0TEXT16_CS, 8 ; Entry 0e8h
185	dw 0fffeh, 00000h ; 16-bit conforming code (read+exec) segment, accessed. Will be finalized at startup.
186	dw 09f00h, 00000h
187	BS3_GLOBAL_DATA Bs3Gdte_X1TEXT16_CS, 8 ; Entry 0f0h
188	dw 0fffeh, 00000h ; 16-bit conforming code (read+exec) segment, accessed. Will be finalized at startup.
189	dw 09f00h, 00000h
190	BS3_GLOBAL_DATA Bs3Gdte_R0_MMIO16, 8 ; Entry 0f8h
191	dw 0ffffh, 0f000h, 0930dh, 00000h ; 16-bit VMMDev MMIO segment with base 0100000h.
192	BS3GdtAssertOffset 0100h
193
194
195	;;
196	; Macro that defines the selectors for ring-%1.
197	;
198	%macro BS3_GDT_RING_X_SELECTORS 1
199	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _First, 80h
200	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16, 8 ; Entry 100h
201	dw 0ffffh, (0xffff & BS3_ADDR_BS3TEXT16) ; 16-bit code segment with base 010000h.
202	dw 09b01h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3TEXT16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3TEXT16 >> 16))
203
204	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS16, 8 ; Entry 108h
205	dw 0ffffh, (0xffff & BS3_ADDR_BS3DATA16) ; 16-bit data segment with base 029000h.
206	dw 09300h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3DATA16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3DATA16 >> 16))
207
208	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _SS16, 8 ; Entry 110h
209	dw 0ffffh, 00000h ; 16-bit stack segment with base 0.
210	dw 09300h \| (%1 << 0dh), 00000h
211
212	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32, 8 ; Entry 118h
213	dw 0ffffh, 00000h ; 32-bit flat code segment.
214	dw 09b00h \| (%1 << 0dh), 000cfh
215
216	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS32, 8 ; Entry 120h
217	dw 0ffffh, 00000h ; 32-bit flat data segment.
218	dw 09300h \| (%1 << 0dh), 000cfh
219
220	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _SS32, 8 ; Entry 128h
221	dw 0ffffh, 00000h ; 32-bit flat stack segment.
222	dw 09300h \| (%1 << 0dh), 000cfh
223
224	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64, 8 ; Entry 130h
225	dw 0ffffh, 00000h ; 64-bit code segment.
226	dw 09a00h \| (%1 << 0dh), 000afh
227
228	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _DS64, 8 ; Entry 138h (also SS64)
229	dw 0ffffh, 00000h ; 64-bit stack and data segment.
230	dw 09300h \| (%1 << 0dh), 000afh
231
232	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_EO, 8 ; Entry 140h
233	dw 0ffffh, (0xffff & BS3_ADDR_BS3TEXT16) ; 16-bit code segment with base 01000h, not accessed, execute only, short limit.
234	dw 09800h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3TEXT16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3TEXT16 >> 16))
235
236	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_CNF, 8 ; Entry 148h
237	dw 0ffffh, (0xffff & BS3_ADDR_BS3TEXT16) ; 16-bit code segment with base 01000h, not accessed, execute only, short limit.
238	dw 09e00h \| (%1 << 0dh) \| (0xff & (BS3_ADDR_BS3TEXT16 >> 16)), 00000h \| (0xff00 & (BS3_ADDR_BS3TEXT16 >> 16))
239
240	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS16_CND_EO, 8 ; Entry 150h
241	dw 0fffeh, 00000h ; 16-bit conforming code segment with base 0, not accessed, execute only, short limit.
242	dw 09c00h \| (%1 << 0dh), 000cfh
243
244	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_EO, 8 ; Entry 158h
245	dw 0ffffh, 00000h ; 32-bit flat code segment, not accessed, execute only.
246	dw 09800h \| (%1 << 0dh), 000cfh
247
248	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_CNF, 8 ; Entry 160h
249	dw 0ffffh, 00000h ; 32-bit flat conforming code segment, not accessed.
250	dw 09e00h \| (%1 << 0dh), 000cfh
251
252	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS32_CNF_EO, 8 ; Entry 168h
253	dw 0ffffh, 00000h ; 32-bit flat conforming code segment, not accessed, execute only.
254	dw 09c00h \| (%1 << 0dh), 000cfh
255
256	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_EO, 8 ; Entry 170h
257	dw 0ffffh, 00000h ; 64-bit code segment, not accessed, execute only.
258	dw 09800h \| (%1 << 0dh), 000afh
259
260	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_CNF, 8 ; Entry 178h
261	dw 0ffffh, 00000h ; 64-bit conforming code segment, not accessed.
262	dw 09e00h \| (%1 << 0dh), 000afh
263
264	BS3_GLOBAL_DATA Bs3Gdte_R %+ %1 %+ _CS64_CNF_EO, 8 ; Entry 180h
265	dw 0ffffh, 00000h ; 64-bit conforming code segment, execute only, not accessed.
266	dw 09c00h \| (%1 << 0dh), 000afh
267
268	;; @todo expand down segments.
269	dw 00000h, 00000h, 00000h, 00000h ; Entry 188h - unused.
270	dw 00000h, 00000h, 00000h, 00000h ; Entry 190h - unused.
271	dw 00000h, 00000h, 00000h, 00000h ; Entry 198h - unused.
272	dw 00000h, 00000h, 00000h, 00000h ; Entry 1a0h - unused.
273	dw 00000h, 00000h, 00000h, 00000h ; Entry 1a8h - unused.
274	dw 00000h, 00000h, 00000h, 00000h ; Entry 1b0h - unused.
275	dw 00000h, 00000h, 00000h, 00000h ; Entry 1b8h - unused.
276	dw 00000h, 00000h, 00000h, 00000h ; Entry 1c0h - unused.
277	dw 00000h, 00000h, 00000h, 00000h ; Entry 1c8h - unused.
278	dw 00000h, 00000h, 00000h, 00000h ; Entry 1d0h - unused.
279	dw 00000h, 00000h, 00000h, 00000h ; Entry 1d8h - unused.
280	dw 00000h, 00000h, 00000h, 00000h ; Entry 1e0h - unused.
281	dw 00000h, 00000h, 00000h, 00000h ; Entry 1e8h - unused.
282	dw 00000h, 00000h, 00000h, 00000h ; Entry 1f0h - unused.
283	dw 00000h, 00000h, 00000h, 00000h ; Entry 1f8h - unused.
284	%endmacro
285
286	;
287	; 100h..1f8h - Ring-0 selectors.
288	;
289	BS3_GDT_RING_X_SELECTORS 0
290
291	;
292	; 200h..2f8h - Ring-1 selectors.
293	;
294	BS3_GDT_RING_X_SELECTORS 1
295
296	;
297	; 300h..3f8h - Ring-2 selectors.
298	;
299	BS3_GDT_RING_X_SELECTORS 2
300
301	;
302	; 400h..4f8h - Ring-3 selectors.
303	;
304	BS3_GDT_RING_X_SELECTORS 3
305
306	;
307	; 500..5f8h - Named spare GDT entries.
308	;
309	BS3GdtAssertOffset 0500h
310	BS3_GLOBAL_DATA Bs3GdteSpare00, 8 ; Entry 500h
311	dq 0
312	BS3_GLOBAL_DATA Bs3GdteSpare01, 8 ; Entry 508h
313	dq 0
314	BS3_GLOBAL_DATA Bs3GdteSpare02, 8 ; Entry 510h
315	dq 0
316	BS3_GLOBAL_DATA Bs3GdteSpare03, 8 ; Entry 518h
317	dq 0
318	BS3_GLOBAL_DATA Bs3GdteSpare04, 8 ; Entry 520h
319	dq 0
320	BS3_GLOBAL_DATA Bs3GdteSpare05, 8 ; Entry 528h
321	dq 0
322	BS3_GLOBAL_DATA Bs3GdteSpare06, 8 ; Entry 530h
323	dq 0
324	BS3_GLOBAL_DATA Bs3GdteSpare07, 8 ; Entry 538h
325	dq 0
326	BS3_GLOBAL_DATA Bs3GdteSpare08, 8 ; Entry 540h
327	dq 0
328	BS3_GLOBAL_DATA Bs3GdteSpare09, 8 ; Entry 548h
329	dq 0
330	BS3_GLOBAL_DATA Bs3GdteSpare0a, 8 ; Entry 550h
331	dq 0
332	BS3_GLOBAL_DATA Bs3GdteSpare0b, 8 ; Entry 558h
333	dq 0
334	BS3_GLOBAL_DATA Bs3GdteSpare0c, 8 ; Entry 560h
335	dq 0
336	BS3_GLOBAL_DATA Bs3GdteSpare0d, 8 ; Entry 568h
337	dq 0
338	BS3_GLOBAL_DATA Bs3GdteSpare0e, 8 ; Entry 570h
339	dq 0
340	BS3_GLOBAL_DATA Bs3GdteSpare0f, 8 ; Entry 578h
341	dq 0
342	BS3_GLOBAL_DATA Bs3GdteSpare10, 8 ; Entry 580h
343	dq 0
344	BS3_GLOBAL_DATA Bs3GdteSpare11, 8 ; Entry 588h
345	dq 0
346	BS3_GLOBAL_DATA Bs3GdteSpare12, 8 ; Entry 590h
347	dq 0
348	BS3_GLOBAL_DATA Bs3GdteSpare13, 8 ; Entry 598h
349	dq 0
350	BS3_GLOBAL_DATA Bs3GdteSpare14, 8 ; Entry 5a0h
351	dq 0
352	BS3_GLOBAL_DATA Bs3GdteSpare15, 8 ; Entry 5a8h
353	dq 0
354	BS3_GLOBAL_DATA Bs3GdteSpare16, 8 ; Entry 5b0h
355	dq 0
356	BS3_GLOBAL_DATA Bs3GdteSpare17, 8 ; Entry 5b8h
357	dq 0
358	BS3_GLOBAL_DATA Bs3GdteSpare18, 8 ; Entry 5c0h
359	dq 0
360	BS3_GLOBAL_DATA Bs3GdteSpare19, 8 ; Entry 5c8h
361	dq 0
362	BS3_GLOBAL_DATA Bs3GdteSpare1a, 8 ; Entry 5d0h
363	dq 0
364	BS3_GLOBAL_DATA Bs3GdteSpare1b, 8 ; Entry 5d8h
365	dq 0
366	BS3_GLOBAL_DATA Bs3GdteSpare1c, 8 ; Entry 5e0h
367	dq 0
368	BS3_GLOBAL_DATA Bs3GdteSpare1d, 8 ; Entry 5e8h
369	dq 0
370	BS3_GLOBAL_DATA Bs3GdteSpare1e, 8 ; Entry 5f0h
371	dq 0
372	BS3_GLOBAL_DATA Bs3GdteSpare1f, 8 ; Entry 5f8h
373	dq 0
374
375	;
376	; 600..df8h - 16-bit DPL=3 data segments covering the first 16MB of memory.
377	;
378	BS3_GLOBAL_DATA Bs3GdteTiled, 8 ; Entry 600h
379	%assign u8HighBase 0
380	%rep 256
381	dw 0ffffh, 00000h, 0f300h \| u8HighBase, 00000h
382	%assign u8HighBase u8HighBase + 1
383	%endrep
384	;
385	; e00..ff8h - Free GDTEs.
386	;
387	BS3GdtAssertOffset 0e00h
388	BS3_GLOBAL_DATA Bs3GdteFreePart1, 200h
389	times 200h db 0
390
391	;
392	; 1000h - the real mode segment number for BS3TEXT16. DPL=0, BASE=0x10000h, conforming, exec, read.
393	;
394	BS3GdtAssertOffset 01000h
395	BS3_GLOBAL_DATA Bs3Gdte_CODE16, 8h
396	dw 0ffffh, 00000h, 09f01h, 00000h
397
398	;
399	; 1008..17f8h - Free GDTEs.
400	;
401	BS3GdtAssertOffset 01008h
402	BS3_GLOBAL_DATA Bs3GdteFreePart2, 07f8h
403	times 07f8h db 0
404
405	;
406	; 1800..1ff8h - 16-bit DPL=0 data/stack segments covering the first 16MB of memory.
407	;
408	BS3GdtAssertOffset 01800h
409	BS3_GLOBAL_DATA Bs3GdteTiledR0, 8 ; Entry 1800h
410	%assign u8HighBase 0
411	%rep 256
412	dw 0ffffh, 00000h, 09300h \| u8HighBase, 00000h
413	%assign u8HighBase u8HighBase + 1
414	%endrep
415
416	;
417	; 2000h - the real mode segment number for BS3SYSTEM. DPL=3. BASE=0x20000h
418	;
419	BS3GdtAssertOffset 02000h
420	BS3_GLOBAL_DATA Bs3Gdte_SYSTEM16, 8h
421	dw 0ffffh, 00000h, 0f302h, 00000h
422
423	;
424	; 2008..28f8h - Free GDTEs.
425	;
426	BS3_GLOBAL_DATA Bs3GdteFreePart3, 08f8h
427	times 08f8h db 0
428
429	;
430	; 2900h - the real mode segment number for BS3KIT_GRPNM_DATA16. DPL=3. BASE=0x29000h
431	;
432	BS3GdtAssertOffset 02900h
433	BS3_GLOBAL_DATA Bs3Gdte_DATA16, 8h
434	dw 0ffffh, 09000h, 0f302h, 00000h
435
436	;
437	; 2908..2f98h - Free GDTEs.
438	;
439	BS3GdtAssertOffset 02908h
440	BS3_GLOBAL_DATA Bs3GdteFreePart4, 698h
441	times 698h db 0
442
443	;
444	; 2be0..2fe0h - 8 spare entries preceeding the test page which we're free
445	; to mess with page table protection.
446	;
447	BS3GdtAssertOffset 02fa0h
448	BS3_GLOBAL_DATA Bs3GdtePreTestPage08, 8
449	dq 0
450	BS3_GLOBAL_DATA Bs3GdtePreTestPage07, 8
451	dq 0
452	BS3_GLOBAL_DATA Bs3GdtePreTestPage06, 8
453	dq 0
454	BS3_GLOBAL_DATA Bs3GdtePreTestPage05, 8
455	dq 0
456	BS3_GLOBAL_DATA Bs3GdtePreTestPage04, 8
457	dq 0
458	BS3_GLOBAL_DATA Bs3GdtePreTestPage03, 8
459	dq 0
460	BS3_GLOBAL_DATA Bs3GdtePreTestPage02, 8
461	dq 0
462	BS3_GLOBAL_DATA Bs3GdtePreTestPage01, 8
463	dq 0
464
465	;
466	; 2fe0..3fd8h - 16 Test entries at the start of the page where we're free
467	; to mess with page table protection.
468	;
469	BS3GdtAssertOffset 02fe0h
470	AssertCompile(($ - $$) == 0x3000)
471	BS3_GLOBAL_DATA Bs3GdteTestPage, 0
472	BS3_GLOBAL_DATA Bs3GdteTestPage00, 8
473	dq 0
474	BS3_GLOBAL_DATA Bs3GdteTestPage01, 8
475	dq 0
476	BS3_GLOBAL_DATA Bs3GdteTestPage02, 8
477	dq 0
478	BS3_GLOBAL_DATA Bs3GdteTestPage03, 8
479	dq 0
480	BS3_GLOBAL_DATA Bs3GdteTestPage04, 8
481	dq 0
482	BS3_GLOBAL_DATA Bs3GdteTestPage05, 8
483	dq 0
484	BS3_GLOBAL_DATA Bs3GdteTestPage06, 8
485	dq 0
486	BS3_GLOBAL_DATA Bs3GdteTestPage07, 8
487	dq 0
488	BS3GdtAssertOffset 3020h
489	times 0fb8h db 0
490	BS3GdtAssertOffset 3fd8h
491	BS3_GLOBAL_DATA Bs3GdtEnd, 0
492	db 10, 13, 'GDTE', 10, 13 ; alignment padding (next address on 16 byte boundrary).
493	BS3GdtAssertOffset 4000h - 20h ; We're at a page boundrary here! Only GDT and eyecatchers on page starting at 3000h!
494	AssertCompile(($ - $$) == 0x4000)
495
496
497
498	;;
499	; The 16-bit TSS.
500	;
501	BS3_GLOBAL_DATA Bs3Tss16, X86TSS16_size
502	istruc X86TSS16
503	at X86TSS16.selPrev, dw 0
504	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
505	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
506	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
507	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
508	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
509	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
510	at X86TSS16.ip, dw 0
511	at X86TSS16.flags, dw 0
512	at X86TSS16.ax, dw 0
513	at X86TSS16.cx, dw 0
514	at X86TSS16.dx, dw 0
515	at X86TSS16.bx, dw 0
516	at X86TSS16.sp, dw 0
517	at X86TSS16.bp, dw 0
518	at X86TSS16.si, dw 0
519	at X86TSS16.di, dw 0
520	at X86TSS16.es, dw 0
521	at X86TSS16.cs, dw 0
522	at X86TSS16.ss, dw 0
523	at X86TSS16.ds, dw 0
524	at X86TSS16.selLdt, dw 0
525	iend
526
527	;;
528	; 16-bit TSS for (trying to) handle double faults.
529	BS3_GLOBAL_DATA Bs3Tss16DoubleFault, X86TSS16_size
530	istruc X86TSS16
531	at X86TSS16.selPrev, dw 0
532	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
533	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
534	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
535	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
536	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
537	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
538	at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
539	at X86TSS16.flags, dw X86_EFL_1
540	at X86TSS16.ax, dw 0
541	at X86TSS16.cx, dw 0
542	at X86TSS16.dx, dw 0
543	at X86TSS16.bx, dw 0
544	at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST1
545	at X86TSS16.bp, dw 0
546	at X86TSS16.si, dw 0
547	at X86TSS16.di, dw 0
548	at X86TSS16.es, dw BS3_SEL_R0_DS16
549	at X86TSS16.cs, dw BS3_SEL_R0_CS16
550	at X86TSS16.ss, dw BS3_SEL_R0_SS16
551	at X86TSS16.ds, dw BS3_SEL_R0_DS16
552	at X86TSS16.selLdt, dw 0
553	iend
554
555	;;
556	; A spare 16-bit TSS for testcases to play around with.
557	BS3_GLOBAL_DATA Bs3Tss16Spare0, X86TSS16_size
558	istruc X86TSS16
559	at X86TSS16.selPrev, dw 0
560	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
561	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
562	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
563	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
564	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
565	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
566	at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
567	at X86TSS16.flags, dw X86_EFL_1
568	at X86TSS16.ax, dw 0
569	at X86TSS16.cx, dw 0
570	at X86TSS16.dx, dw 0
571	at X86TSS16.bx, dw 0
572	at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST2
573	at X86TSS16.bp, dw 0
574	at X86TSS16.si, dw 0
575	at X86TSS16.di, dw 0
576	at X86TSS16.es, dw BS3_SEL_R0_DS16
577	at X86TSS16.cs, dw BS3_SEL_R0_CS16
578	at X86TSS16.ss, dw BS3_SEL_R0_SS16
579	at X86TSS16.ds, dw BS3_SEL_R0_DS16
580	at X86TSS16.selLdt, dw 0
581	iend
582
583	;;
584	; A spare 16-bit TSS for testcases to play around with.
585	BS3_GLOBAL_DATA Bs3Tss16Spare1, X86TSS16_size
586	istruc X86TSS16
587	at X86TSS16.selPrev, dw 0
588	at X86TSS16.sp0, dw BS3_ADDR_STACK_R0
589	at X86TSS16.ss0, dw BS3_SEL_R0_SS16
590	at X86TSS16.sp1, dw BS3_ADDR_STACK_R1
591	at X86TSS16.ss1, dw BS3_SEL_R1_SS16
592	at X86TSS16.sp2, dw BS3_ADDR_STACK_R2
593	at X86TSS16.ss2, dw BS3_SEL_R2_SS16
594	at X86TSS16.ip, dw 0 ; Will be filled in by routine setting up 16-bit mode w/ traps++.
595	at X86TSS16.flags, dw X86_EFL_1
596	at X86TSS16.ax, dw 0
597	at X86TSS16.cx, dw 0
598	at X86TSS16.dx, dw 0
599	at X86TSS16.bx, dw 0
600	at X86TSS16.sp, dw BS3_ADDR_STACK_R0_IST4
601	at X86TSS16.bp, dw 0
602	at X86TSS16.si, dw 0
603	at X86TSS16.di, dw 0
604	at X86TSS16.es, dw BS3_SEL_R0_DS16
605	at X86TSS16.cs, dw BS3_SEL_R0_CS16
606	at X86TSS16.ss, dw BS3_SEL_R0_SS16
607	at X86TSS16.ds, dw BS3_SEL_R0_DS16
608	at X86TSS16.selLdt, dw 0
609	iend
610
611
612	;;
613	; The 32-bit TSS.
614	;
615	BS3_GLOBAL_DATA Bs3Tss32, X86TSS32_size
616	istruc X86TSS32
617	at X86TSS32.selPrev, dw 0
618	at X86TSS32.padding1, dw 0
619	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
620	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
621	at X86TSS32.padding_ss0, dw 1
622	at X86TSS32.esp1, dd 1
623	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
624	at X86TSS32.padding_ss1, dw 1
625	at X86TSS32.esp2, dd 1
626	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
627	at X86TSS32.padding_ss2, dw 1
628	at X86TSS32.cr3, dd 0
629	at X86TSS32.eip, dd 0
630	at X86TSS32.eflags, dd X86_EFL_1
631	at X86TSS32.eax, dd 0
632	at X86TSS32.ecx, dd 0
633	at X86TSS32.edx, dd 0
634	at X86TSS32.ebx, dd 0
635	at X86TSS32.esp, dd 0
636	at X86TSS32.ebp, dd 0
637	at X86TSS32.esi, dd 0
638	at X86TSS32.edi, dd 0
639	at X86TSS32.es, dw 0
640	at X86TSS32.padding_es, dw 0
641	at X86TSS32.cs, dw 0
642	at X86TSS32.padding_cs, dw 0
643	at X86TSS32.ss, dw 0
644	at X86TSS32.padding_ss, dw 0
645	at X86TSS32.ds, dw 0
646	at X86TSS32.padding_ds, dw 0
647	at X86TSS32.fs, dw 0
648	at X86TSS32.padding_fs, dw 0
649	at X86TSS32.gs, dw 0
650	at X86TSS32.padding_gs, dw 0
651	at X86TSS32.selLdt, dw 0
652	at X86TSS32.padding_ldt, dw 0
653	at X86TSS32.fDebugTrap, dw 0
654	at X86TSS32.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb))
655	iend
656
657	;;
658	; The 32-bit TSS for handling double faults.
659	BS3_GLOBAL_DATA Bs3Tss32DoubleFault, X86TSS32_size
660	istruc X86TSS32
661	at X86TSS32.selPrev, dw 0
662	at X86TSS32.padding1, dw 0
663	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
664	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
665	at X86TSS32.padding_ss0, dw 1
666	at X86TSS32.esp1, dd 1
667	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
668	at X86TSS32.padding_ss1, dw 1
669	at X86TSS32.esp2, dd 1
670	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
671	at X86TSS32.padding_ss2, dw 1
672	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
673	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
674	at X86TSS32.eflags, dd X86_EFL_1
675	at X86TSS32.eax, dd 0
676	at X86TSS32.ecx, dd 0
677	at X86TSS32.edx, dd 0
678	at X86TSS32.ebx, dd 0
679	at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST1
680	at X86TSS32.ebp, dd 0
681	at X86TSS32.esi, dd 0
682	at X86TSS32.edi, dd 0
683	at X86TSS32.es, dw BS3_SEL_R0_DS32
684	at X86TSS32.padding_es, dw 0
685	at X86TSS32.cs, dw BS3_SEL_R0_CS32
686	at X86TSS32.padding_cs, dw 0
687	at X86TSS32.ss, dw BS3_SEL_R0_SS32
688	at X86TSS32.padding_ss, dw 0
689	at X86TSS32.ds, dw BS3_SEL_R0_DS32
690	at X86TSS32.padding_ds, dw 0
691	at X86TSS32.fs, dw BS3_SEL_R0_DS32
692	at X86TSS32.padding_fs, dw 0
693	at X86TSS32.gs, dw BS3_SEL_R0_DS32
694	at X86TSS32.padding_gs, dw 0
695	at X86TSS32.selLdt, dw 0
696	at X86TSS32.padding_ldt, dw 0
697	at X86TSS32.fDebugTrap, dw 0
698	at X86TSS32.offIoBitmap, dw 0
699	iend
700
701	;;
702	; A spare 32-bit TSS testcases to play around with.
703	BS3_GLOBAL_DATA Bs3Tss32Spare0, X86TSS32_size
704	istruc X86TSS32
705	at X86TSS32.selPrev, dw 0
706	at X86TSS32.padding1, dw 0
707	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
708	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
709	at X86TSS32.padding_ss0, dw 1
710	at X86TSS32.esp1, dd 1
711	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
712	at X86TSS32.padding_ss1, dw 1
713	at X86TSS32.esp2, dd 1
714	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
715	at X86TSS32.padding_ss2, dw 1
716	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
717	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
718	at X86TSS32.eflags, dd X86_EFL_1
719	at X86TSS32.eax, dd 0
720	at X86TSS32.ecx, dd 0
721	at X86TSS32.edx, dd 0
722	at X86TSS32.ebx, dd 0
723	at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST2
724	at X86TSS32.ebp, dd 0
725	at X86TSS32.esi, dd 0
726	at X86TSS32.edi, dd 0
727	at X86TSS32.es, dw BS3_SEL_R0_DS32
728	at X86TSS32.padding_es, dw 0
729	at X86TSS32.cs, dw BS3_SEL_R0_CS32
730	at X86TSS32.padding_cs, dw 0
731	at X86TSS32.ss, dw BS3_SEL_R0_SS32
732	at X86TSS32.padding_ss, dw 0
733	at X86TSS32.ds, dw BS3_SEL_R0_DS32
734	at X86TSS32.padding_ds, dw 0
735	at X86TSS32.fs, dw BS3_SEL_R0_DS32
736	at X86TSS32.padding_fs, dw 0
737	at X86TSS32.gs, dw BS3_SEL_R0_DS32
738	at X86TSS32.padding_gs, dw 0
739	at X86TSS32.selLdt, dw 0
740	at X86TSS32.padding_ldt, dw 0
741	at X86TSS32.fDebugTrap, dw 0
742	at X86TSS32.offIoBitmap, dw 0
743	iend
744
745	;;
746	; A spare 32-bit TSS testcases to play around with.
747	BS3_GLOBAL_DATA Bs3Tss32Spare1, X86TSS32_size
748	istruc X86TSS32
749	at X86TSS32.selPrev, dw 0
750	at X86TSS32.padding1, dw 0
751	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
752	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
753	at X86TSS32.padding_ss0, dw 1
754	at X86TSS32.esp1, dd 1
755	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
756	at X86TSS32.padding_ss1, dw 1
757	at X86TSS32.esp2, dd 1
758	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
759	at X86TSS32.padding_ss2, dw 1
760	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
761	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
762	at X86TSS32.eflags, dd X86_EFL_1
763	at X86TSS32.eax, dd 0
764	at X86TSS32.ecx, dd 0
765	at X86TSS32.edx, dd 0
766	at X86TSS32.ebx, dd 0
767	at X86TSS32.esp, dd BS3_ADDR_STACK_R0_IST4
768	at X86TSS32.ebp, dd 0
769	at X86TSS32.esi, dd 0
770	at X86TSS32.edi, dd 0
771	at X86TSS32.es, dw BS3_SEL_R0_DS32
772	at X86TSS32.padding_es, dw 0
773	at X86TSS32.cs, dw BS3_SEL_R0_CS32
774	at X86TSS32.padding_cs, dw 0
775	at X86TSS32.ss, dw BS3_SEL_R0_SS32
776	at X86TSS32.padding_ss, dw 0
777	at X86TSS32.ds, dw BS3_SEL_R0_DS32
778	at X86TSS32.padding_ds, dw 0
779	at X86TSS32.fs, dw BS3_SEL_R0_DS32
780	at X86TSS32.padding_fs, dw 0
781	at X86TSS32.gs, dw BS3_SEL_R0_DS32
782	at X86TSS32.padding_gs, dw 0
783	at X86TSS32.selLdt, dw 0
784	at X86TSS32.padding_ldt, dw 0
785	at X86TSS32.fDebugTrap, dw 0
786	at X86TSS32.offIoBitmap, dw 0
787	iend
788
789
790
791	;;
792	; 64-bit TSS
793	BS3_GLOBAL_DATA Bs3Tss64, X86TSS64_size
794	istruc X86TSS64
795	at X86TSS64.u32Reserved, dd 0
796	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
797	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
798	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
799	at X86TSS64.u32Reserved2, dd 0
800	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
801	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
802	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
803	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
804	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
805	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
806	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
807	at X86TSS64.u16Reserved, dw 0
808	at X86TSS64.offIoBitmap, dw 0
809	iend
810
811	;;
812	; A spare TSS for testcases to play around with.
813	BS3_GLOBAL_DATA Bs3Tss64Spare0, X86TSS64_size
814	istruc X86TSS64
815	at X86TSS64.u32Reserved, dd 0
816	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
817	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
818	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
819	at X86TSS64.u32Reserved2, dd 0
820	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
821	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
822	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
823	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
824	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
825	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
826	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
827	at X86TSS64.u16Reserved, dw 0
828	at X86TSS64.offIoBitmap, dw 0
829	iend
830
831	;;
832	; A spare TSS for testcases to play around with.
833	BS3_GLOBAL_DATA Bs3Tss64Spare1, X86TSS64_size
834	istruc X86TSS64
835	at X86TSS64.u32Reserved, dd 0
836	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
837	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
838	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
839	at X86TSS64.u32Reserved2, dd 0
840	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
841	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
842	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
843	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
844	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
845	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
846	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
847	at X86TSS64.u16Reserved, dw 0
848	at X86TSS64.offIoBitmap, dw 0
849	iend
850
851
852
853	;;
854	; 64-bit TSS sharing an I/O permission bitmap (Bs3SharedIobp) with a 32-bit TSS.
855	;
856	BS3_GLOBAL_DATA Bs3Tss64WithIopb, X86TSS64_size
857	istruc X86TSS64
858	at X86TSS64.u32Reserved, dd 0
859	at X86TSS64.rsp0, dq BS3_ADDR_STACK_R0
860	at X86TSS64.rsp1, dq BS3_ADDR_STACK_R1
861	at X86TSS64.rsp2, dq BS3_ADDR_STACK_R2
862	at X86TSS64.u32Reserved2, dd 0
863	at X86TSS64.ist1, dq BS3_ADDR_STACK_R0_IST1
864	at X86TSS64.ist2, dq BS3_ADDR_STACK_R0_IST2
865	at X86TSS64.ist3, dq BS3_ADDR_STACK_R0_IST3
866	at X86TSS64.ist4, dq BS3_ADDR_STACK_R0_IST4
867	at X86TSS64.ist5, dq BS3_ADDR_STACK_R0_IST5
868	at X86TSS64.ist6, dq BS3_ADDR_STACK_R0_IST6
869	at X86TSS64.ist7, dq BS3_ADDR_STACK_R0_IST7
870	at X86TSS64.u16Reserved, dw 0
871	at X86TSS64.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss64WithIopb))
872	iend
873
874	;;
875	; 32-bit TSS sharing an I/O permission bitmap (Bs3SharedIobp) with a 64-bit TSS,
876	; and sporting an interrupt redirection bitmap (Bs3SharedIntRedirBm).
877	BS3_GLOBAL_DATA Bs3Tss32WithIopb, X86TSS32_size
878	istruc X86TSS32
879	at X86TSS32.selPrev, dw 0
880	at X86TSS32.padding1, dw 0
881	at X86TSS32.esp0, dd BS3_ADDR_STACK_R0
882	at X86TSS32.ss0, dw BS3_SEL_R0_SS32
883	at X86TSS32.padding_ss0, dw 1
884	at X86TSS32.esp1, dd 1
885	at X86TSS32.ss1, dw BS3_SEL_R1_SS32
886	at X86TSS32.padding_ss1, dw 1
887	at X86TSS32.esp2, dd 1
888	at X86TSS32.ss2, dw BS3_SEL_R2_SS32
889	at X86TSS32.padding_ss2, dw 1
890	at X86TSS32.cr3, dd 0 ; Will be filled in by routine setting up paged 32-bit mode w/ traps++.
891	at X86TSS32.eip, dd 0 ; Will be filled in by routine setting up 32-bit mode w/ traps++.
892	at X86TSS32.eflags, dd X86_EFL_1
893	at X86TSS32.eax, dd 0
894	at X86TSS32.ecx, dd 0
895	at X86TSS32.edx, dd 0
896	at X86TSS32.ebx, dd 0
897	at X86TSS32.esp, dd 0
898	at X86TSS32.ebp, dd 0
899	at X86TSS32.esi, dd 0
900	at X86TSS32.edi, dd 0
901	at X86TSS32.es, dw 0
902	at X86TSS32.padding_es, dw 0
903	at X86TSS32.cs, dw 0
904	at X86TSS32.padding_cs, dw 0
905	at X86TSS32.ss, dw 0
906	at X86TSS32.padding_ss, dw 0
907	at X86TSS32.ds, dw 0
908	at X86TSS32.padding_ds, dw 0
909	at X86TSS32.fs, dw 0
910	at X86TSS32.padding_fs, dw 0
911	at X86TSS32.gs, dw 0
912	at X86TSS32.padding_gs, dw 0
913	at X86TSS32.selLdt, dw 0
914	at X86TSS32.padding_ldt, dw 0
915	at X86TSS32.fDebugTrap, dw 0
916	at X86TSS32.offIoBitmap, dw (BS3_DATA_NM(Bs3SharedIobp) - BS3_DATA_NM(Bs3Tss32WithIopb))
917	iend
918
919	;
920	; We insert 6 bytes before the interrupt redirection bitmap just to make sure
921	; we've all got the same idea about where it starts (i.e. 32 bytes before IOBP).
922	;
923	times 6 db 0ffh
924
925	;;
926	; Interrupt redirection bitmap (used by 32-bit TSS).
927	BS3_GLOBAL_DATA Bs3SharedIntRedirBm, 32
928	times 32 db 00h
929
930	;;
931	; Shared I/O permission bitmap used both by Bs3Tss64WithIopb and Bs3Tss32WithIopb.
932	BS3_GLOBAL_DATA Bs3SharedIobp, 8192+2
933	times 8192+2 db 0ffh
934	BS3_GLOBAL_DATA Bs3SharedIobpEnd, 0
935
936
937	align 128
938
939	;;
940	; 16-bit IDT.
941	; This requires manual setup by code fielding traps, so we'll just reserve the
942	; memory here.
943	;
944	BS3_GLOBAL_DATA Bs3Idt16, 256*8
945	times 256 dq 0
946
947	;;
948	; 32-bit IDT.
949	; This requires manual setup by code fielding traps, so we'll just reserve the
950	; memory here.
951	;
952	BS3_GLOBAL_DATA Bs3Idt32, 256*8
953	times 256 dq 0
954
955	;;
956	; 64-bit IDT.
957	; This requires manual setup by code fielding traps, so we'll just reserve the
958	; memory here.
959	;
960	BS3_GLOBAL_DATA Bs3Idt64, 256*16
961	times 256 dq 0, 0
962
963
964	times 6 db 0 ; Pad the first LIDT correctly.
965
966	;;
967	; LIDT structure for the 16-bit IDT (8-byte aligned on offset).
968	BS3_GLOBAL_DATA Bs3Lidt_Idt16, 2+8
969	dw 256*8 - 1 ; limit
970	dw BS3_SYSTEM16_BASE_LOW(Bs3Idt16) ; low offset
971	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
972	dd 0 ; top32 offset
973
974	times 4 db 0 ; padding the start of the next
975
976	;;
977	; LIDT structure for the 32-bit IDT (8-byte aligned on offset).
978	BS3_GLOBAL_DATA Bs3Lidt_Idt32, 2+8
979	dw 256*8 - 1 ; limit
980	dw BS3_SYSTEM16_BASE_LOW(Bs3Idt32) ; low offset
981	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
982	dd 0 ; top32 offset
983
984	times 4 db 0 ; padding the start of the next
985
986	;;
987	; LIDT structure for the 64-bit IDT (8-byte aligned on offset).
988	BS3_GLOBAL_DATA Bs3Lidt_Idt64, 2+8
989	dw 256*16 - 1 ; limit
990	dw BS3_SYSTEM16_BASE_LOW(Bs3Idt64) ; low offset
991	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
992	dd 0 ; top32 offset
993
994	times 4 db 0 ; padding the start of the next
995
996	;;
997	; LIDT structure for the real mode IVT at address 0x00000000 (8-byte aligned on offset).
998	BS3_GLOBAL_DATA Bs3Lidt_Ivt, 2+8
999	dw 0ffffh ; limit
1000	dw 0 ; low offset
1001	dw 0 ; high offset
1002	dd 0 ; top32 offset
1003
1004	times 4 db 0 ; padding the start of the next
1005
1006	;;
1007	; LGDT structure for the current GDT (8-byte aligned on offset).
1008	BS3_GLOBAL_DATA Bs3Lgdt_Gdt, 2+8
1009	dw BS3_DATA_NM(Bs3GdtEnd) - BS3_DATA_NM(Bs3Gdt) - 1 ; limit
1010	dw BS3_SYSTEM16_BASE_LOW(Bs3Gdt) ; low offset
1011	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
1012	dd 0 ; top32 offset
1013
1014	;;
1015	; LGDT structure for the default GDT (8-byte aligned on offset).
1016	; This must not be modified, whereas Bs3Lgdt_Gdt can be modified by the user.
1017	BS3_GLOBAL_DATA Bs3LgdtDef_Gdt, 2+8
1018	dw BS3_DATA_NM(Bs3GdtEnd) - BS3_DATA_NM(Bs3Gdt) - 1 ; limit
1019	dw BS3_SYSTEM16_BASE_LOW(Bs3Gdt) ; low offset
1020	dw (BS3_ADDR_BS3SYSTEM16 >> 16) ; high offset
1021	dd 0 ; top32 offset
1022
1023
1024
1025	align 16
1026	;;
1027	; LDT filling up the rest of the segment.
1028	;
1029	; Currently this starts at 0x84e0, which leaves us with 0xb20 bytes. We'll use
1030	; the last 32 of those for an eye catcher.
1031	;
1032	BS3_GLOBAL_DATA Bs3Ldt, 0b20h - 32
1033	times (0b20h - 32) db 0
1034	BS3_GLOBAL_DATA Bs3LdtEnd, 0
1035	db 10, 13, 'eye-catcher: SYSTEM16 END', 10, 13, 0, 0, 0 ; 32 bytes long
1036
1037	;
1038	; Check the segment size.
1039	;
1040	%ifndef KBUILD_GENERATING_MAKEFILE_DEPENDENCIES
1041	%if ($ - $$) != 09000h
1042	%assign offActual ($ - $$)
1043	%error "Bad BS3SYSTEM16 segment size: " %+ offActual %+ ", expected 0x9000 (36864)"
1044	%endif
1045	%endif
1046

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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-system-data.asm@ 92580

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