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1; $Id: bs3kit.mac 59863 2016-02-26 20:59:52Z vboxsync $
2;; @file
3; BS3Kit - structures, symbols, macros and stuff.
4;
5
6;
7; Copyright (C) 2007-2015 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17; The contents of this file may alternatively be used under the terms
18; of the Common Development and Distribution License Version 1.0
19; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20; VirtualBox OSE distribution, in which case the provisions of the
21; CDDL are applicable instead of those of the GPL.
22;
23; You may elect to license modified versions of this file under the
24; terms and conditions of either the GPL or the CDDL or both.
25;
26
27%ifndef ___bs3kit_mac___
28%define ___bs3kit_mac___
29
30;
31; Before we can include anything, we need to override NAME and switch section.
32; If we don't do the latter we end up with an unused 'text' section.
33;
34
35; Drop the asmdefs-first.mac header for native bs3kit files.
36%undef RT_ASMDEFS_INC_FIRST_FILE
37
38;;
39; Macro for setting register aliases according to the bit count given by %1.
40;
41%macro BS3_SET_REG_ALIASES 1
42 ;
43 ; Register aliases.
44 ;
45 %if %1 == 64
46 %define xCB 8
47 %define xDEF dq
48 %define xRES resq
49 %define xPRE qword
50 %define xSP rsp
51 %define xBP rbp
52 %define xAX rax
53 %define xBX rbx
54 %define xCX rcx
55 %define xDX rdx
56 %define xDI rdi
57 %define xSI rsi
58 %define xWrtRIP wrt rip
59 %define xPUSHF pushfq
60 %define xPOPF popfq
61 %define xRETF o64 retf
62 %elif %1 == 32
63 %define xCB 4
64 %define xDEF dd
65 %define xRES resd
66 %define xPRE dword
67 %define xSP esp
68 %define xBP ebp
69 %define xAX eax
70 %define xBX ebx
71 %define xCX ecx
72 %define xDX edx
73 %define xDI edi
74 %define xSI esi
75 %define xWrtRIP
76 %define xPUSHF pushfd
77 %define xPOPF popfd
78 %define xRETF retf
79 %elif %1 == 16
80 %define xCB 2
81 %define xDEF dw
82 %define xRES resw
83 %define xPRE word
84 %define xSP sp
85 %define xBP bp
86 %define xAX ax
87 %define xBX bx
88 %define xCX cx
89 %define xDX dx
90 %define xDI di
91 %define xSI si
92 %define xWrtRIP
93 %define xPUSHF pushf
94 %define xPOPF popf
95 %define xRETF retf
96 %else
97 %error "Invalid BS3_SET_REG_ALIASES argument:" %1
98 %endif
99
100
101 ;
102 ; Register names corresponding to the max size for pop/push <reg>.
103 ;
104 ; 16-bit can push both 32-bit and 16-bit registers. This 's' prefixed variant
105 ; is used when 16-bit should use the 32-bit register.
106 ;
107 %if %1 == 64
108 %define sCB 8
109 %define sDEF dq
110 %define sRES resq
111 %define sPRE qword
112 %define sSP rsp
113 %define sBP rbp
114 %define sAX rax
115 %define sBX rbx
116 %define sCX rcx
117 %define sDX rdx
118 %define sDI rdi
119 %define sSI rsi
120 %define sPUSHF pushfq
121 %define sPOPF popfq
122 %else
123 %define sCB 4
124 %define sDEF dd
125 %define sRES resd
126 %define sPRE dword
127 %define sSP esp
128 %define sBP ebp
129 %define sAX eax
130 %define sBX ebx
131 %define sCX ecx
132 %define sDX edx
133 %define sDI edi
134 %define sSI esi
135 %define sPUSHF pushfd
136 %define sPOPF popfd
137 %endif
138%endmacro
139
140; Default to register aliases for ARCH_BITS.
141BS3_SET_REG_ALIASES ARCH_BITS
142
143
144;; Wrapper around BITS.
145; Updates __BITS__ (built-in variable in nasm, we work it for yasm) as well
146; a number of convenient macros and register aliases.
147;
148; @param %1 The CPU bit count: 16, 32 or 64
149; @remarks ARCH_BITS is not modified and will remain what it was on the
150; assembler command line.
151%macro BS3_SET_BITS 1
152 BITS %1
153
154 %ifdef __YASM__
155 %undef __BITS__
156 %define __BITS__ %1
157 %endif
158
159 %undef BS3_NAME_UNDERSCORE
160 %if %1 == 64
161 %define BS3_NAME_UNDERSCORE
162 %else
163 %define BS3_NAME_UNDERSCORE _
164 %endif
165
166 %undef BS3_ONLY_16BIT
167 %if %1 == 16
168 %define BS3_ONLY_16BIT(a_Expr) a_Expr
169 %else
170 %define BS3_ONLY_16BIT(a_Expr)
171 %endif
172
173 %undef BS3_ONLY_64BIT
174 %if %1 == 64
175 %define BS3_ONLY_64BIT(a_Expr) a_Expr
176 %else
177 %define BS3_ONLY_64BIT(a_Expr)
178 %endif
179
180 %undef BS3_IF_16_32_64BIT
181 %if %1 == 16
182 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_16BitExpr
183 %elif %1 == 32
184 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_32BitExpr
185 %else
186 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_64BitExpr
187 %endif
188
189 %undef BS3_WRT_RIP
190 %if %1 == 64
191 %ifdef __YASM__
192 %define BS3_WRT_RIP(a_Sym) a_Sym wrt rip
193 %else
194 %define BS3_WRT_RIP(a_Sym) rel a_Sym ; Baka! Why couldn't they do 'wrt rip' like yasm?
195 %endif
196 %else
197 %define BS3_WRT_RIP(a_Sym) a_Sym
198 %endif
199
200 %undef BS3_IF_16BIT_OTHERWISE
201 %if %1 == 16
202 %define BS3_IF_16BIT_OTHERWISE(a_16BitExpr, a_OtherwiseExpr) a_16BitExpr
203 %else
204 %define BS3_IF_16BIT_OTHERWISE(a_16BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
205 %endif
206
207 %undef BS3_IF_32BIT_OTHERWISE
208 %if %1 == 32
209 %define BS3_IF_32BIT_OTHERWISE(a_32BitExpr, a_OtherwiseExpr) a_32BitExpr
210 %else
211 %define BS3_IF_32BIT_OTHERWISE(a_32BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
212 %endif
213
214 %undef BS3_IF_64BIT_OTHERWISE
215 %if %1 == 32
216 %define BS3_IF_64BIT_OTHERWISE(a_64BitExpr, a_OtherwiseExpr) a_32BitExpr
217 %else
218 %define BS3_IF_64BIT_OTHERWISE(a_64BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
219 %endif
220
221 BS3_SET_REG_ALIASES %1
222%endmacro
223
224
225;; Emulate the __BITS__ macro in NASM 2.0+. Follows BS3_SET_BITS.
226%ifdef __YASM__
227 %define __BITS__ ARCH_BITS
228%endif
229
230;; Mostly internal macro. Follows BS3_SET_BITS.
231%if ARCH_BITS == 64
232 %define BS3_NAME_UNDERSCORE
233%else
234 %define BS3_NAME_UNDERSCORE _
235%endif
236
237;; For RIP relative addressing in 64-bit mode and absolute addressing in
238; other modes. Follows BS3_SET_BITS.
239%if ARCH_BITS == 64
240 %ifdef __YASM__
241 %define BS3_WRT_RIP(a_Sym) a_Sym wrt rip
242 %else
243 %define BS3_WRT_RIP(a_Sym) rel a_Sym ; Baka! Why couldn't they do 'wrt rip' like yasm?
244 %endif
245%else
246 %define BS3_WRT_RIP(a_Sym) a_Sym
247%endif
248
249;; For segment overrides and stuff. Follows BS3_SET_BITS.
250%if ARCH_BITS == 16
251 %define BS3_ONLY_16BIT(a_Expr) a_Expr
252%else
253 %define BS3_ONLY_16BIT(a_Expr)
254%endif
255
256;; For odd 64-bit stuff. Follows BS3_SET_BITS.
257%if ARCH_BITS == 64
258 %define BS3_ONLY_64BIT(a_Expr) a_Expr
259%else
260 %define BS3_ONLY_64BIT(a_Expr)
261%endif
262
263;; For stack cleanups and similar where each bit mode is different. Follows BS3_SET_BITS.
264%if ARCH_BITS == 16
265 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_16BitExpr
266%elif ARCH_BITS == 32
267 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_32BitExpr
268%else
269 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_64BitExpr
270%endif
271
272
273;;
274; For instruction that should only be emitted in 16-bit mode. Follows BS3_SET_BITS.
275%macro BS3_ONLY_16BIT_STMT 1+
276 %if __BITS__ == 16
277 %1
278 %endif
279%endmacro
280
281;;
282; For instruction that should only be emitted in 32-bit mode. Follows BS3_SET_BITS.
283%macro BS3_ONLY_32BIT_STMT 1+
284 %if __BITS__ == 32
285 %1
286 %endif
287%endmacro
288
289;;
290; For instruction that should only be emitted in 64-bit mode. Follows BS3_SET_BITS.
291%macro BS3_ONLY_64BIT_STMT 1+
292 %if __BITS__ == 64
293 %1
294 %endif
295%endmacro
296
297
298
299;; @name Segment definitions.
300;; @{
301
302%ifdef ASM_FORMAT_OMF
303; !!HACK ALERT!!
304;
305; To make FLAT actually be flat, i.e. have a base of 0 rather than the same as
306; the target (?) segment, we tweak it a little bit here. We associate a segment
307; with it so that we can get at it in the class/segment ordering directives
308; we pass to the linker. The segment does not contain any data or anything, it
309; is just an empty one which we assign the address of zero.
310;
311; Look for 'clname BS3FLAT segaddr=0x0000' and 'segment BS3FLAT segaddr=0x0000'
312; in the makefile.
313;
314; !!HACK ALERT!!
315segment BS3FLAT use32 class=BS3FLAT
316GROUP FLAT BS3FLAT
317%endif
318
319%macro BS3_BEGIN_TEXT16 0
320 %ifndef BS3_BEGIN_TEXT16_NOT_FIRST
321 %define BS3_BEGIN_TEXT16_NOT_FIRST
322 %ifdef ASM_FORMAT_ELF
323 section BS3TEXT16 align=2 progbits alloc exec nowrite
324 %else
325 section BS3TEXT16 align=2 CLASS=BS3CODE16 PUBLIC USE16
326 %endif
327 %else
328 section BS3TEXT16
329 %endif
330 BS3_SET_BITS 16
331%endmacro
332
333%macro BS3_BEGIN_DATA16 0
334 %ifndef BS3_BEGIN_DATA16_NOT_FIRST
335 %define BS3_BEGIN_DATA16_NOT_FIRST
336 %ifdef ASM_FORMAT_ELF
337 section BS3DATA16 align=2 progbits alloc noexec write
338 %else
339 section BS3DATA16 align=2 CLASS=FAR_DATA PUBLIC USE16
340 %endif
341 %else
342 section BS3DATA16
343 %endif
344 BS3_SET_BITS 16
345%endmacro
346
347%macro BS3_BEGIN_TEXT32 0
348 %ifndef BS3_BEGIN_TEXT32_NOT_FIRST
349 %define BS3_BEGIN_TEXT32_NOT_FIRST
350 %ifdef ASM_FORMAT_ELF
351 section BS3TEXT32 align=1 progbits alloc exec nowrite
352 %else
353 section BS3TEXT32 align=1 CLASS=BS3CODE32 PUBLIC USE32 FLAT
354 %endif
355 %else
356 section BS3TEXT32
357 %endif
358 BS3_SET_BITS 32
359%endmacro
360
361%macro BS3_BEGIN_DATA32 0
362 %ifndef BS3_BEGIN_DATA32_NOT_FIRST
363 %define BS3_BEGIN_DATA32_NOT_FIRST
364 %ifdef ASM_FORMAT_ELF
365 section BS3DATA32 align=16 progbits alloc noexec write
366 %else
367 section BS3DATA32 align=16 CLASS=FAR_DATA PUBLIC USE32 ;FLAT - compiler doesn't make data flat.
368 %endif
369 %else
370 section BS3DATA32
371 %endif
372 BS3_SET_BITS 32
373%endmacro
374
375%macro BS3_BEGIN_TEXT64 0
376 %ifndef BS3_BEGIN_TEXT64_NOT_FIRST
377 %define BS3_BEGIN_TEXT64_NOT_FIRST
378 %ifdef ASM_FORMAT_ELF
379 section BS3TEXT64 align=1 progbits alloc exec nowrite
380 %else
381 section BS3TEXT64 align=1 CLASS=CODE PUBLIC USE32 FLAT ; class=CODE here because of 64-bit cl and/or wlink.exe
382 %endif
383 %else
384 section BS3TEXT64
385 %endif
386 BS3_SET_BITS 64
387%endmacro
388
389%macro BS3_BEGIN_DATA64 0
390 %ifndef BS3_BEGIN_DATA64_NOT_FIRST
391 %define BS3_BEGIN_DATA64_NOT_FIRST
392 %ifdef ASM_FORMAT_ELF
393 section BS3DATA64 align=16 progbits alloc noexec write
394 %else
395 section BS3DATA64 align=16 CLASS=DATA PUBLIC USE32 ;FLAT (see DATA32) ; class=DATA here because of 64-bit cl and/or wlink.exe
396 %endif
397 %else
398 section BS3DATA64
399 %endif
400 BS3_SET_BITS 64
401%endmacro
402
403;; The system data segment containing the GDT, TSSes and IDTs.
404%macro BS3_BEGIN_SYSTEM16 0
405 %ifndef BS3_BEGIN_SYSTEM16_NOT_FIRST
406 %define BS3_BEGIN_SYSTEM16_NOT_FIRST
407 %ifdef ASM_FORMAT_ELF
408 section BS3SYSTEM16 align=16 progbits alloc noexec write
409 %else
410 section BS3SYSTEM16 align=16 CLASS=BS3SYSTEM16 PUBLIC USE16
411 %endif
412 %else
413 section BS3SYSTEM16
414 %endif
415 BS3_SET_BITS 16
416%endmacro
417
418;; Default text section.
419%macro BS3_BEGIN_DEFAULT_TEXT 0
420 %if ARCH_BITS == 16
421 BS3_BEGIN_TEXT16
422 %elif ARCH_BITS == 32
423 BS3_BEGIN_TEXT32
424 %elif ARCH_BITS == 64
425 BS3_BEGIN_TEXT64
426 %else
427 %error "ARCH_BITS must be defined as either 16, 32, or 64!"
428 INVALID_ARCH_BITS
429 %endif
430%endmacro
431
432;; @}
433
434
435;
436; Now, ditch the default 'text' section and define our own NAME macro.
437;
438%ifndef ASM_FORMAT_BIN
439 BS3_BEGIN_DEFAULT_TEXT
440 BS3_BEGIN_DEFAULT_TEXT ; stupid nasm automagically repeats the segment attributes.
441%endif
442
443;; When using watcom + OMF, we're using __cdecl by default, which
444; get an underscore added in front.
445%ifdef ASM_FORMAT_OMF
446 %define NAME(name) _ %+ NAME_OVERLOAD(name)
447%endif
448
449
450;
451; Include the standard headers from iprt.
452;
453
454
455%include "iprt/asmdefs.mac"
456%include "iprt/x86.mac"
457
458
459;;
460; Extern macro which mangles the name using NAME().
461%macro EXTERN 1
462 extern NAME(%1)
463%endmacro
464
465;;
466; Mangles a common name according to the current cpu bit count.
467; @remarks Requires the use of the BS3_SET_BITS macro instead of the BITS directive.
468%define BS3_CMN_NM(a_Name) BS3_NAME_UNDERSCORE %+ a_Name %+ _c %+ __BITS__
469
470;;
471; Extern macro which mangles the common name correctly, redefining the unmangled
472; name to the mangled one for ease of use.
473;
474; @param %1 The unmangled common name.
475;
476; @remarks Must enter the segment in which this name is defined.
477;
478%macro BS3_EXTERN_CMN 1
479 extern BS3_CMN_NM(%1)
480 %undef %1
481 %define %1 BS3_CMN_NM(%1)
482%endmacro
483
484;; @def BS3_EXTERN_TMPL
485; Mangles the given name into a template specific one. For ease of use, the
486; name is redefined to the mangled one, just like BS3_EXTERN_CMN does.
487; @note Segment does not change.
488%macro BS3_EXTERN_TMPL 1
489 extern TMPL_NM(%1)
490 %undef %1
491 %define %1 TMPL_NM(%1)
492%endmacro
493
494
495;;
496; Mangles a 16-bit and 32-bit accessible data name.
497; @remarks Requires the use of the BS3_SET_BITS macro instead of the BITS directive.
498%define BS3_DATA_NM(a_Name) _ %+ a_Name
499
500;;
501; Extern macro which mangles a DATA16 symbol correctly, redefining the
502; unmangled name to the mangled one for ease of use.
503;
504; @param %1 The unmangled common name.
505;
506; @remarks Will change to the DATA16 segment, use must switch back afterwards!
507;
508%macro BS3_EXTERN_DATA16 1
509 BS3_BEGIN_DATA16
510 extern _ %+ %1
511 %undef %1
512 %define %1 _ %+ %1
513%endmacro
514
515;;
516; Extern macro which mangles a BS3SYSTEM16 symbol correctly, redefining the
517; unmangled name to the mangled one for ease of use.
518;
519; @param %1 The unmangled common name.
520;
521; @remarks Will change to the SYSTEM16 segment, use must switch back afterwards!
522;
523%macro BS3_EXTERN_SYSTEM16 1
524 BS3_BEGIN_SYSTEM16
525 extern _ %+ %1
526 %undef %1
527 %define %1 _ %+ %1
528%endmacro
529
530
531;;
532; Global name with ELF attributes and size.
533;
534; This differs from GLOBALNAME_EX in that it expects a mangled symbol name,
535; and allows for nasm style symbol size expressions.
536;
537; @param %1 The mangled name.
538; @param %2 Symbol attributes.
539; @param %3 The size expression.
540;
541%macro BS3_GLOBAL_NAME_EX 3
542%ifdef ASM_FORMAT_ELF
543 %ifdef __NASM__
544global %1:%2 %3
545 %else
546global %1:%2
547 %endif
548%else
549global %1
550%endif
551%1:
552%endmacro
553
554;;
555; Global data unmangled label.
556;
557; @param %1 The unmangled name.
558; @param %2 The size (0 is fine).
559;
560%macro BS3_GLOBAL_DATA 2
561BS3_GLOBAL_NAME_EX BS3_DATA_NM(%1), , %2
562%endmacro
563
564;;
565; Starts a procedure.
566;
567; This differs from BEGINPROC in that it expects a mangled symbol name and
568; does the NASM symbol size stuff.
569;
570; @param %1 The mangled name.
571;
572%macro BS3_PROC_BEGIN 1
573BS3_GLOBAL_NAME_EX %1, function, (%1 %+ _EndProc - %1)
574%endmacro
575
576;;
577; Ends a procedure.
578;
579; Counter part to BS3_PROC_BEGIN.
580;
581; @param %1 The mangled name.
582;
583%macro BS3_PROC_END 1
584BS3_GLOBAL_NAME_EX %1 %+ _EndProc, function hidden, (%1 %+ _EndProc - %1)
585 %ifdef ASM_FORMAT_ELF
586 %ifdef __YASM__
587size %1 %1 %+ _EndProc - %1
588size %1 %+ _EndProc 0
589 %endif
590 %endif
591 int3 ; handy and avoids overlapping labels.
592%endmacro
593
594
595;; Convenience macro for defining common procedures.
596%macro BS3_PROC_BEGIN_CMN 1
597 BS3_PROC_BEGIN BS3_CMN_NM(%1)
598%endmacro
599
600;; Convenience macro for defining common procedures.
601%macro BS3_PROC_END_CMN 1
602 BS3_PROC_END BS3_CMN_NM(%1)
603%endmacro
604
605
606;; Convenience macro for defining mode specific procedures.
607%macro BS3_PROC_BEGIN_MODE 1
608 BS3_PROC_BEGIN TMPL_NM(%1)
609%endmacro
610
611;; Convenience macro for defining mode specific procedures.
612%macro BS3_PROC_END_MODE 1
613 BS3_PROC_END TMPL_NM(%1)
614%endmacro
615
616
617;;
618; Prologue hacks for 64-bit code.
619;
620; This saves the four register parameters onto the stack so we can pretend
621; the calling convention is stack based. The 64-bit calling convension is
622; the microsoft one, so this is straight forward.
623;
624; Pairs with BS3_CALL_CONV_EPILOG.
625;
626; @param %1 The number of parameters.
627;
628; @remarks Must be invoked before any stack changing instructions are emitted.
629;
630%macro BS3_CALL_CONV_PROLOG 1
631 %undef BS3_CALL_CONV_PROLOG_PARAMS
632 %define BS3_CALL_CONV_PROLOG_PARAMS %1
633 %if __BITS__ == 64
634 %if %1 >= 1
635 mov [rsp + 008h], rcx
636 %elifdef BS3_STRICT
637 and qword [rsp + 008h], 1
638 %endif
639 %if %1 >= 2
640 mov [rsp + 010h], rdx
641 %elifdef BS3_STRICT
642 and qword [rsp + 010h], 2
643 %endif
644 %if %1 >= 3
645 mov [rsp + 018h], r8
646 %elifdef BS3_STRICT
647 and qword [rsp + 018h], 3
648 %endif
649 %if %1 >= 4
650 mov [rsp + 020h], r9
651 %elifdef BS3_STRICT
652 and qword [rsp + 020h], 4
653 %endif
654 %endif
655%endmacro
656
657;;
658; Epilogue hacks for 64-bit code.
659;
660; Counter part to BS3_CALL_CONV_PROLOG.
661;
662; @param %1 The number of parameters.
663;
664; @remarks Must be invoked right before the return instruction as it uses RSP.
665;
666%macro BS3_CALL_CONV_EPILOG 1
667 %if BS3_CALL_CONV_PROLOG_PARAMS != %1
668 %error "BS3_CALL_CONV_EPILOG argument differs from BS3_CALL_CONV_PROLOG."
669 %endif
670 %if __BITS__ == 64
671 %ifdef BS3_STRICT
672 mov dword [rsp + 008h], 31h
673 mov dword [rsp + 010h], 32h
674 mov dword [rsp + 018h], 33h
675 mov dword [rsp + 020h], 34h
676 %endif
677 %endif
678%endmacro
679
680;;
681; Wrapper for the call instruction that hides calling convension differences.
682;
683; This always calls %1.
684; In 64-bit code, it will load up to 4 parameters into register.
685;
686; @param %1 The function to call (mangled).
687; @param %2 The number of parameters.
688;
689%macro BS3_CALL 2
690 %if __BITS__ == 64
691 %if %2 >= 1
692 mov rcx, [rsp]
693 %ifdef BS3_STRICT
694 and qword [rsp], 11h
695 %endif
696 %endif
697 %if %2 >= 2
698 mov rdx, [rsp + 008h]
699 %ifdef BS3_STRICT
700 and qword [rsp + 008h], 12h
701 %endif
702 %endif
703 %if %2 >= 3
704 mov r8, [rsp + 010h]
705 %ifdef BS3_STRICT
706 and qword [rsp + 010h], 13h
707 %endif
708 %endif
709 %if %2 >= 4
710 mov r9, [rsp + 018h]
711 %ifdef BS3_STRICT
712 and qword [rsp + 018h], 14h
713 %endif
714 %endif
715 %endif
716 call %1
717%endmacro
718
719
720;; @name Execution Modes
721; @{
722%define BS3_MODE_INVALID 000h
723%define BS3_MODE_RM 001h ;;< real mode.
724%define BS3_MODE_PE16 011h ;;< 16-bit protected mode kernel+tss, running 16-bit code, unpaged.
725%define BS3_MODE_PE16_32 012h ;;< 16-bit protected mode kernel+tss, running 32-bit code, unpaged.
726%define BS3_MODE_PE16_V86 013h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode code, unpaged.
727%define BS3_MODE_PE32 022h ;;< 32-bit protected mode kernel+tss, running 32-bit code, unpaged.
728%define BS3_MODE_PE32_16 021h ;;< 32-bit protected mode kernel+tss, running 16-bit code, unpaged.
729%define BS3_MODE_PEV86 023h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode code, unpaged.
730%define BS3_MODE_PP16 031h ;;< 16-bit protected mode kernel+tss, running 16-bit code, paged.
731%define BS3_MODE_PP16_32 032h ;;< 16-bit protected mode kernel+tss, running 32-bit code, paged.
732%define BS3_MODE_PP16_V86 033h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode code, paged.
733%define BS3_MODE_PP32 042h ;;< 32-bit protected mode kernel+tss, running 32-bit code, paged.
734%define BS3_MODE_PP32_16 041h ;;< 32-bit protected mode kernel+tss, running 16-bit code, paged.
735%define BS3_MODE_PPV86 043h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode code, paged.
736%define BS3_MODE_PAE16 051h ;;< 16-bit protected mode kernel+tss, running 16-bit code, PAE paging.
737%define BS3_MODE_PAE16_32 052h ;;< 16-bit protected mode kernel+tss, running 32-bit code, PAE paging.
738%define BS3_MODE_PAE16_V86 053h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode, PAE paging.
739%define BS3_MODE_PAE32 062h ;;< 32-bit protected mode kernel+tss, running 32-bit code, PAE paging.
740%define BS3_MODE_PAE32_16 061h ;;< 32-bit protected mode kernel+tss, running 16-bit code, PAE paging.
741%define BS3_MODE_PAEV86 063h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode, PAE paging.
742%define BS3_MODE_LM16 071h ;;< 16-bit long mode (paged), kernel+tss always 64-bit.
743%define BS3_MODE_LM32 072h ;;< 32-bit long mode (paged), kernel+tss always 64-bit.
744%define BS3_MODE_LM64 074h ;;< 64-bit long mode (paged), kernel+tss always 64-bit.
745
746%define BS3_MODE_CODE_MASK 00fh ;;< Running code mask.
747%define BS3_MODE_CODE_16 001h ;;< Running 16-bit code.
748%define BS3_MODE_CODE_32 002h ;;< Running 32-bit code.
749%define BS3_MODE_CODE_V86 003h ;;< Running 16-bit virtual 8086 code.
750%define BS3_MODE_CODE_64 004h ;;< Running 64-bit code.
751
752%define BS3_MODE_SYS_MASK 0f0h ;;< kernel+tss mask.
753%define BS3_MODE_SYS_RM 000h ;;< Real mode kernel+tss.
754%define BS3_MODE_SYS_PE16 010h ;;< 16-bit protected mode kernel+tss.
755%define BS3_MODE_SYS_PE32 020h ;;< 32-bit protected mode kernel+tss.
756%define BS3_MODE_SYS_PP16 030h ;;< 16-bit paged protected mode kernel+tss.
757%define BS3_MODE_SYS_PP32 040h ;;< 32-bit paged protected mode kernel+tss.
758%define BS3_MODE_SYS_PAE16 050h ;;< 16-bit PAE paged protected mode kernel+tss.
759%define BS3_MODE_SYS_PAE32 060h ;;< 32-bit PAE paged protected mode kernel+tss.
760%define BS3_MODE_SYS_LM 070h ;;< 64-bit (paged) long mode protected mode kernel+tss.
761
762;; Whether the mode has paging enabled.
763%define BS3_MODE_IS_PAGED(a_fMode) ((a_fMode) >= BS3_MODE_PP16)
764
765;; Whether the mode is running v8086 code.
766%define BS3_MODE_IS_V86(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_V86)
767;; Whether the we're executing in real mode or v8086 mode.
768%define BS3_MODE_IS_RM_OR_V86(a_fMode) ((a_fMode) == BS3_MODE_RM || BS3_MODE_IS_V86(a_fMode))
769;; Whether the mode is running 16-bit code, except v8086.
770%define BS3_MODE_IS_16BIT_CODE_NO_V86(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_16)
771;; Whether the mode is running 16-bit code (includes v8086).
772%define BS3_MODE_IS_16BIT_CODE(a_fMode) (BS3_MODE_IS_16BIT_CODE_NO_V86(a_fMode) || BS3_MODE_IS_V86(a_fMode))
773;; Whether the mode is running 32-bit code.
774%define BS3_MODE_IS_32BIT_CODE(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_32)
775;; Whether the mode is running 64-bit code.
776%define BS3_MODE_IS_64BIT_CODE(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_64)
777
778;; Whether the system is in real mode.
779%define BS3_MODE_IS_RM_SYS(a_fMode) (((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_RM)
780;; Whether the system is some 16-bit mode that isn't real mode.
781%define BS3_MODE_IS_16BIT_SYS_NO_RM(a_fMode) ( ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PE16 \
782 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PP16 \
783 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PAE16)
784;; Whether the system is some 16-bit mode (includes real mode).
785%define BS3_MODE_IS_16BIT_SYS(a_fMode) (BS3_MODE_IS_16BIT_SYS_NO_RM(a_fMode) || BS3_MODE_IS_RM_SYS(a_fMode))
786;; Whether the system is some 32-bit mode.
787%define BS3_MODE_IS_32BIT_SYS(a_fMode) ( ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PE32 \
788 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PP32 \
789 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PAE32)
790;; Whether the system is long mode.
791%define BS3_MODE_IS_64BIT_SYS(a_fMode) (((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_LM)
792
793;; @}
794
795;;
796; Includes the file %1 with TMPL_MODE set to all possible value.
797; @param 1 Double quoted include file name.
798%macro BS3_INSTANTIATE_TEMPLATE_WITH_WEIRD_ONES 1
799 %define TMPL_MODE BS3_MODE_RM
800 %include %1
801
802 %define TMPL_MODE BS3_MODE_PE16
803 %include %1
804 %define TMPL_MODE BS3_MODE_PE16_32
805 %include %1
806 %define TMPL_MODE BS3_MODE_PE16_V86
807 %include %1
808
809 %define TMPL_MODE BS3_MODE_PE32
810 %include %1
811 %define TMPL_MODE BS3_MODE_PE32_16
812 %include %1
813 %define TMPL_MODE BS3_MODE_PEV86
814 %include %1
815
816 %define TMPL_MODE BS3_MODE_PP16
817 %include %1
818 %define TMPL_MODE BS3_MODE_PP16_32
819 %include %1
820 %define TMPL_MODE BS3_MODE_PP16_V86
821 %include %1
822
823 %define TMPL_MODE BS3_MODE_PP32
824 %include %1
825 %define TMPL_MODE BS3_MODE_PP32_16
826 %include %1
827 %define TMPL_MODE BS3_MODE_PPV86
828 %include %1
829
830 %define TMPL_MODE BS3_MODE_PAE16
831 %include %1
832 %define TMPL_MODE BS3_MODE_PAE16_32
833 %include %1
834 %define TMPL_MODE BS3_MODE_PAE16_V86
835 %include %1
836
837 %define TMPL_MODE BS3_MODE_PAE32
838 %include %1
839 %define TMPL_MODE BS3_MODE_PAE32_16
840 %include %1
841 %define TMPL_MODE BS3_MODE_PAEV86
842 %include %1
843
844 %define TMPL_MODE BS3_MODE_LM16
845 %include %1
846 %define TMPL_MODE BS3_MODE_LM32
847 %include %1
848 %define TMPL_MODE BS3_MODE_LM64
849 %include %1
850%endmacro
851
852
853;;
854; Includes the file %1 with TMPL_MODE set to all but the "weird" value.
855; @param 1 Double quoted include file name.
856%macro BS3_INSTANTIATE_TEMPLATE_ESSENTIALS 1
857 %define TMPL_MODE BS3_MODE_RM
858 %include %1
859
860 %define TMPL_MODE BS3_MODE_PE16
861 %include %1
862
863 %define TMPL_MODE BS3_MODE_PE32
864 %include %1
865 %define TMPL_MODE BS3_MODE_PEV86
866 %include %1
867
868 %define TMPL_MODE BS3_MODE_PP16
869 %include %1
870
871 %define TMPL_MODE BS3_MODE_PP32
872 %include %1
873 %define TMPL_MODE BS3_MODE_PPV86
874 %include %1
875
876 %define TMPL_MODE BS3_MODE_PAE16
877 %include %1
878
879 %define TMPL_MODE BS3_MODE_PAE32
880 %include %1
881 %define TMPL_MODE BS3_MODE_PAEV86
882 %include %1
883
884 %define TMPL_MODE BS3_MODE_LM16
885 %include %1
886 %define TMPL_MODE BS3_MODE_LM32
887 %include %1
888 %define TMPL_MODE BS3_MODE_LM64
889 %include %1
890%endmacro
891
892;;
893; Includes the file %1 with TMPL_MODE set to a 16-bit, a 32-bit and a 64-bit value.
894; @param 1 Double quoted include file name.
895%macro BS3_INSTANTIATE_COMMON_TEMPLATE 1
896 %define TMPL_MODE BS3_MODE_RM
897 %include %1
898 %define TMPL_MODE BS3_MODE_PE32
899 %include %1
900 %define TMPL_MODE BS3_MODE_LM64
901 %include %1
902%endmacro
903
904
905;; @name Static Memory Allocation
906; @{
907;; The flat load address for the code after the bootsector.
908%define BS3_ADDR_LOAD 010000h
909;; Where we save the boot registers during init.
910; Located right before the code.
911%define BS3_ADDR_REG_SAVE (BS3_ADDR_LOAD - BS3REGS_size - 8)
912;; Where the stack starts (initial RSP value).
913; Located 16 bytes (assumed by boot sector) before the saved registers. SS.BASE=0.
914%define BS3_ADDR_STACK (BS3_ADDR_REG_SAVE - 16)
915;; The ring-0 stack (8KB) for ring transitions.
916%define BS3_ADDR_STACK_R0 006000h
917;; The ring-1 stack (8KB) for ring transitions.
918%define BS3_ADDR_STACK_R1 004000h
919;; The ring-2 stack (8KB) for ring transitions.
920%define BS3_ADDR_STACK_R2 002000h
921;; IST1 ring-0 stack for long mode (4KB), used for double faults elsewhere.
922%define BS3_ADDR_STACK_R0_IST1 009000h
923;; IST2 ring-0 stack for long mode (3KB), used for spare 0 stack elsewhere.
924%define BS3_ADDR_STACK_R0_IST2 008000h
925;; IST3 ring-0 stack for long mode (1KB).
926%define BS3_ADDR_STACK_R0_IST3 007400h
927;; IST4 ring-0 stack for long mode (1KB), used for spare 1 stack elsewhere.
928%define BS3_ADDR_STACK_R0_IST4 007000h
929;; IST5 ring-0 stack for long mode (1KB).
930%define BS3_ADDR_STACK_R0_IST5 006c00h
931;; IST6 ring-0 stack for long mode (1KB).
932%define BS3_ADDR_STACK_R0_IST6 006800h
933;; IST7 ring-0 stack for long mode (1KB).
934%define BS3_ADDR_STACK_R0_IST7 006400h
935
936;; The base address of the BS3TEXT16 segment (same as BS3_LOAD_ADDR).
937;; @sa BS3_SEL_TEXT16
938%define BS3_ADDR_BS3TEXT16 010000h
939;; The base address of the BS3SYSTEM16 segment.
940;; @sa BS3_SEL_SYSTEM16
941%define BS3_ADDR_BS3SYSTEM16 020000h
942;; The base address of the BS3DATA16 segment.
943;; @sa BS3_SEL_DATA16
944%define BS3_ADDR_BS3DATA16 027000h
945;; @}
946
947
948;;
949; Registers. Used by traps and such.
950;
951struc BS3REGS
952 .rax resq 1
953 .rbx resq 1
954 .rcx resq 1
955 .rdx resq 1
956 .rdi resq 1
957 .rsi resq 1
958 .rbp resq 1
959 .rsp resq 1
960 .rip resq 1
961 .r8 resq 1
962 .r9 resq 1
963 .r10 resq 1
964 .r11 resq 1
965 .r12 resq 1
966 .r13 resq 1
967 .r14 resq 1
968 .r15 resq 1
969 .rflags resq 1
970 .cs resw 1
971 .ds resw 1
972 .es resw 1
973 .fs resw 1
974 .gs resw 1
975 .ss resw 1
976 .cBits resb 1
977 .pad resb 3
978 .cr0 resq 1
979 .cr2 resq 1
980 .cr3 resq 1
981 .cr4 resq 1
982 .cr8 resq 1
983 ;; @todo Add floating point registers when they are active.
984endstruc
985
986
987
988;;
989; Trap record.
990;
991struc BS3TRAPREC
992 ;; The trap location relative to the base address given at
993 ; registration time.
994 .offWhere resd 1
995 ;; What to add to .offWhere to calculate the resume address.
996 .offResumeAddend resb 1
997 ;; The trap number.
998 .u8TrapNo resb 1
999 ;; The error code if the trap takes one.
1000 .u16ErrCd resw 1
1001endstruc
1002
1003;; The size shift.
1004%define BS3TRAPREC_SIZE_SHIFT 3
1005
1006
1007;; The system call vector.
1008%define BS3_TRAP_SYSCALL 20h
1009
1010;; @name System call numbers (ax)
1011;; @{
1012;; Print char (cl).
1013%define BS3_SYSCALL_PRINT_CHR 0001h
1014;; Print string (pointer in ds:[e]si, length in cx).
1015%define BS3_SYSCALL_PRINT_STR 0002h
1016;; Switch to ring-0.
1017%define BS3_SYSCALL_TO_RING0 0003h
1018;; Switch to ring-1.
1019%define BS3_SYSCALL_TO_RING1 0004h
1020;; Switch to ring-2.
1021%define BS3_SYSCALL_TO_RING2 0005h
1022;; Switch to ring-3.
1023%define BS3_SYSCALL_TO_RING3 0006h
1024;; The last system call value.
1025%define BS3_SYSCALL_LAST BS3_SYSCALL_TO_RING3
1026;; @}
1027
1028
1029
1030;; @name BS3_SEL_XXX - GDT selectors
1031;; @{
1032
1033%define BS3_SEL_LDT 0010h ;;< The LDT selector (requires setting up).
1034%define BS3_SEL_TSS16 0020h ;;< The 16-bit TSS selector.
1035%define BS3_SEL_TSS16_DF 0028h ;;< The 16-bit TSS selector for double faults.
1036%define BS3_SEL_TSS16_SPARE0 0030h ;;< The 16-bit TSS selector for testing.
1037%define BS3_SEL_TSS16_SPARE1 0038h ;;< The 16-bit TSS selector for testing.
1038%define BS3_SEL_TSS32 0040h ;;< The 32-bit TSS selector.
1039%define BS3_SEL_TSS32_DF 0048h ;;< The 32-bit TSS selector for double faults.
1040%define BS3_SEL_TSS32_SPARE0 0050h ;;< The 32-bit TSS selector for testing.
1041%define BS3_SEL_TSS32_SPARE1 0058h ;;< The 32-bit TSS selector for testing.
1042%define BS3_SEL_TSS32_IOBP_IRB 0060h ;;< The 32-bit TSS selector with I/O permission and interrupt redirection bitmaps.
1043%define BS3_SEL_TSS32_IRB 0068h ;;< The 32-bit TSS selector with only interrupt redirection bitmap (IOPB stripped by limit).
1044%define BS3_SEL_TSS64 0070h ;;< The 64-bit TSS selector.
1045%define BS3_SEL_TSS64_SPARE0 0080h ;;< The 64-bit TSS selector.
1046%define BS3_SEL_TSS64_SPARE1 0090h ;;< The 64-bit TSS selector.
1047%define BS3_SEL_TSS64_IOBP 00a0h ;;< The 64-bit TSS selector.
1048
1049%define BS3_SEL_VMMDEV_MMIO16 00f8h ;;< Selector for accessing the VMMDev MMIO segment at 0100000h from 16-bit code.
1050
1051%define BS3_SEL_RING_SHIFT 8 ;;< For the formula: BS3_SEL_R0_XXX + ((cs & 3) << BS3_SEL_RING_SHIFT)
1052
1053%define BS3_SEL_R0_FIRST 0100h ;;< The first selector in the ring-0 block.
1054%define BS3_SEL_R0_CS16 0100h ;;< ring-0: 16-bit code selector, base 0x10000.
1055%define BS3_SEL_R0_DS16 0108h ;;< ring-0: 16-bit data selector, base 0x23000.
1056%define BS3_SEL_R0_SS16 0110h ;;< ring-0: 16-bit stack selector, base 0x00000.
1057%define BS3_SEL_R0_CS32 0118h ;;< ring-0: 32-bit flat code selector.
1058%define BS3_SEL_R0_DS32 0120h ;;< ring-0: 32-bit flat data selector.
1059%define BS3_SEL_R0_SS32 0128h ;;< ring-0: 32-bit flat stack selector.
1060%define BS3_SEL_R0_CS64 0130h ;;< ring-0: 64-bit flat code selector.
1061%define BS3_SEL_R0_DS64 0138h ;;< ring-0: 64-bit flat data & stack selector.
1062%define BS3_SEL_R0_CS16_EO 0140h ;;< ring-0: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1063%define BS3_SEL_R0_CS16_CNF 0148h ;;< ring-0: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1064%define BS3_SEL_R0_CS16_CNF_EO 0150h ;;< ring-0: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1065%define BS3_SEL_R0_CS32_EO 0158h ;;< ring-0: 32-bit execute-only code selector, not accessed, flat.
1066%define BS3_SEL_R0_CS32_CNF 0160h ;;< ring-0: 32-bit conforming code selector, not accessed, flat.
1067%define BS3_SEL_R0_CS32_CNF_EO 0168h ;;< ring-0: 32-bit execute-only conforming code selector, not accessed, flat.
1068%define BS3_SEL_R0_CS64_EO 0170h ;;< ring-0: 64-bit execute-only code selector, not accessed, flat.
1069%define BS3_SEL_R0_CS64_CNF 0178h ;;< ring-0: 64-bit conforming code selector, not accessed, flat.
1070%define BS3_SEL_R0_CS64_CNF_EO 0180h ;;< ring-0: 64-bit execute-only conforming code selector, not accessed, flat.
1071
1072%define BS3_SEL_R1_FIRST 0200h ;;< The first selector in the ring-1 block.
1073%define BS3_SEL_R1_CS16 0200h ;;< ring-1: 16-bit code selector, base 0x10000.
1074%define BS3_SEL_R1_DS16 0208h ;;< ring-1: 16-bit data selector, base 0x23000.
1075%define BS3_SEL_R1_SS16 0210h ;;< ring-1: 16-bit stack selector, base 0x00000.
1076%define BS3_SEL_R1_CS32 0218h ;;< ring-1: 32-bit flat code selector.
1077%define BS3_SEL_R1_DS32 0220h ;;< ring-1: 32-bit flat data selector.
1078%define BS3_SEL_R1_SS32 0228h ;;< ring-1: 32-bit flat stack selector.
1079%define BS3_SEL_R1_CS64 0230h ;;< ring-1: 64-bit flat code selector.
1080%define BS3_SEL_R1_DS64 0238h ;;< ring-1: 64-bit flat data & stack selector.
1081%define BS3_SEL_R1_CS16_EO 0240h ;;< ring-1: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1082%define BS3_SEL_R1_CS16_CNF 0248h ;;< ring-1: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1083%define BS3_SEL_R1_CS16_CNF_EO 0250h ;;< ring-1: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1084%define BS3_SEL_R1_CS32_EO 0258h ;;< ring-1: 32-bit execute-only code selector, not accessed, flat.
1085%define BS3_SEL_R1_CS32_CNF 0260h ;;< ring-1: 32-bit conforming code selector, not accessed, flat.
1086%define BS3_SEL_R1_CS32_CNF_EO 0268h ;;< ring-1: 32-bit execute-only conforming code selector, not accessed, flat.
1087%define BS3_SEL_R1_CS64_EO 0270h ;;< ring-1: 64-bit execute-only code selector, not accessed, flat.
1088%define BS3_SEL_R1_CS64_CNF 0278h ;;< ring-1: 64-bit conforming code selector, not accessed, flat.
1089%define BS3_SEL_R1_CS64_CNF_EO 0280h ;;< ring-1: 64-bit execute-only conforming code selector, not accessed, flat.
1090
1091%define BS3_SEL_R2_FIRST 0300h ;;< The first selector in the ring-2 block.
1092%define BS3_SEL_R2_CS16 0300h ;;< ring-2: 16-bit code selector, base 0x10000.
1093%define BS3_SEL_R2_DS16 0308h ;;< ring-2: 16-bit data selector, base 0x23000.
1094%define BS3_SEL_R2_SS16 0310h ;;< ring-2: 16-bit stack selector, base 0x00000.
1095%define BS3_SEL_R2_CS32 0318h ;;< ring-2: 32-bit flat code selector.
1096%define BS3_SEL_R2_DS32 0320h ;;< ring-2: 32-bit flat data selector.
1097%define BS3_SEL_R2_SS32 0328h ;;< ring-2: 32-bit flat stack selector.
1098%define BS3_SEL_R2_CS64 0330h ;;< ring-2: 64-bit flat code selector.
1099%define BS3_SEL_R2_DS64 0338h ;;< ring-2: 64-bit flat data & stack selector.
1100%define BS3_SEL_R2_CS16_EO 0340h ;;< ring-2: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1101%define BS3_SEL_R2_CS16_CNF 0348h ;;< ring-2: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1102%define BS3_SEL_R2_CS16_CNF_EO 0350h ;;< ring-2: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1103%define BS3_SEL_R2_CS32_EO 0358h ;;< ring-2: 32-bit execute-only code selector, not accessed, flat.
1104%define BS3_SEL_R2_CS32_CNF 0360h ;;< ring-2: 32-bit conforming code selector, not accessed, flat.
1105%define BS3_SEL_R2_CS32_CNF_EO 0368h ;;< ring-2: 32-bit execute-only conforming code selector, not accessed, flat.
1106%define BS3_SEL_R2_CS64_EO 0370h ;;< ring-2: 64-bit execute-only code selector, not accessed, flat.
1107%define BS3_SEL_R2_CS64_CNF 0378h ;;< ring-2: 64-bit conforming code selector, not accessed, flat.
1108%define BS3_SEL_R2_CS64_CNF_EO 0380h ;;< ring-2: 64-bit execute-only conforming code selector, not accessed, flat.
1109
1110%define BS3_SEL_R3_FIRST 0400h ;;< The first selector in the ring-3 block.
1111%define BS3_SEL_R3_CS16 0400h ;;< ring-3: 16-bit code selector, base 0x10000.
1112%define BS3_SEL_R3_DS16 0408h ;;< ring-3: 16-bit data selector, base 0x23000.
1113%define BS3_SEL_R3_SS16 0410h ;;< ring-3: 16-bit stack selector, base 0x00000.
1114%define BS3_SEL_R3_CS32 0418h ;;< ring-3: 32-bit flat code selector.
1115%define BS3_SEL_R3_DS32 0420h ;;< ring-3: 32-bit flat data selector.
1116%define BS3_SEL_R3_SS32 0428h ;;< ring-3: 32-bit flat stack selector.
1117%define BS3_SEL_R3_CS64 0430h ;;< ring-3: 64-bit flat code selector.
1118%define BS3_SEL_R3_DS64 0438h ;;< ring-3: 64-bit flat data & stack selector.
1119%define BS3_SEL_R3_CS16_EO 0440h ;;< ring-3: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1120%define BS3_SEL_R3_CS16_CNF 0448h ;;< ring-3: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1121%define BS3_SEL_R3_CS16_CNF_EO 0450h ;;< ring-3: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1122%define BS3_SEL_R3_CS32_EO 0458h ;;< ring-3: 32-bit execute-only code selector, not accessed, flat.
1123%define BS3_SEL_R3_CS32_CNF 0460h ;;< ring-3: 32-bit conforming code selector, not accessed, flat.
1124%define BS3_SEL_R3_CS32_CNF_EO 0468h ;;< ring-3: 32-bit execute-only conforming code selector, not accessed, flat.
1125%define BS3_SEL_R3_CS64_EO 0470h ;;< ring-3: 64-bit execute-only code selector, not accessed, flat.
1126%define BS3_SEL_R3_CS64_CNF 0478h ;;< ring-3: 64-bit conforming code selector, not accessed, flat.
1127%define BS3_SEL_R3_CS64_CNF_EO 0480h ;;< ring-3: 64-bit execute-only conforming code selector, not accessed, flat.
1128
1129%define BS3_SEL_SPARE_FIRST 0500h ;;< The first selector in the spare block
1130%define BS3_SEL_SPARE_00 0500h ;;< Spare selector number 00h.
1131%define BS3_SEL_SPARE_01 0508h ;;< Spare selector number 01h.
1132%define BS3_SEL_SPARE_02 0510h ;;< Spare selector number 02h.
1133%define BS3_SEL_SPARE_03 0518h ;;< Spare selector number 03h.
1134%define BS3_SEL_SPARE_04 0520h ;;< Spare selector number 04h.
1135%define BS3_SEL_SPARE_05 0528h ;;< Spare selector number 05h.
1136%define BS3_SEL_SPARE_06 0530h ;;< Spare selector number 06h.
1137%define BS3_SEL_SPARE_07 0538h ;;< Spare selector number 07h.
1138%define BS3_SEL_SPARE_08 0540h ;;< Spare selector number 08h.
1139%define BS3_SEL_SPARE_09 0548h ;;< Spare selector number 09h.
1140%define BS3_SEL_SPARE_0a 0550h ;;< Spare selector number 0ah.
1141%define BS3_SEL_SPARE_0b 0558h ;;< Spare selector number 0bh.
1142%define BS3_SEL_SPARE_0c 0560h ;;< Spare selector number 0ch.
1143%define BS3_SEL_SPARE_0d 0568h ;;< Spare selector number 0dh.
1144%define BS3_SEL_SPARE_0e 0570h ;;< Spare selector number 0eh.
1145%define BS3_SEL_SPARE_0f 0578h ;;< Spare selector number 0fh.
1146%define BS3_SEL_SPARE_10 0580h ;;< Spare selector number 10h.
1147%define BS3_SEL_SPARE_11 0588h ;;< Spare selector number 11h.
1148%define BS3_SEL_SPARE_12 0590h ;;< Spare selector number 12h.
1149%define BS3_SEL_SPARE_13 0598h ;;< Spare selector number 13h.
1150%define BS3_SEL_SPARE_14 05a0h ;;< Spare selector number 14h.
1151%define BS3_SEL_SPARE_15 05a8h ;;< Spare selector number 15h.
1152%define BS3_SEL_SPARE_16 05b0h ;;< Spare selector number 16h.
1153%define BS3_SEL_SPARE_17 05b8h ;;< Spare selector number 17h.
1154%define BS3_SEL_SPARE_18 05c0h ;;< Spare selector number 18h.
1155%define BS3_SEL_SPARE_19 05c8h ;;< Spare selector number 19h.
1156%define BS3_SEL_SPARE_1a 05d0h ;;< Spare selector number 1ah.
1157%define BS3_SEL_SPARE_1b 05d8h ;;< Spare selector number 1bh.
1158%define BS3_SEL_SPARE_1c 05e0h ;;< Spare selector number 1ch.
1159%define BS3_SEL_SPARE_1d 05e8h ;;< Spare selector number 1dh.
1160%define BS3_SEL_SPARE_1e 05f0h ;;< Spare selector number 1eh.
1161%define BS3_SEL_SPARE_1f 05f8h ;;< Spare selector number 1fh.
1162
1163%define BS3_SEL_TILED 0600h ;;< 16-bit data tiling: First - base=0x00000000, limit=64KB.
1164%define BS3_SEL_TILED_LAST 0df8h ;;< 16-bit data tiling: Last - base=0x00ff0000, limit=64KB.
1165%define BS3_SEL_TILED_AREA_SIZE 001000000h ;;< 16-bit data tiling: Size of addressable area, in bytes. (16 MB)
1166
1167%define BS3_SEL_FREE_PART1 0e00h ;;< Free selector space - part \%1.
1168%define BS3_SEL_FREE_PART1_LAST 0ff8h ;;< Free selector space - part \%1, last entry.
1169
1170%define BS3_SEL_TEXT16 1000h ;;< The BS3TEXT16 selector.
1171
1172%define BS3_SEL_FREE_PART2 1008h ;;< Free selector space - part \%2.
1173%define BS3_SEL_FREE_PART2_LAST 1ff8h ;;< Free selector space - part \%2, last entry.
1174
1175%define BS3_SEL_SYSTEM16 2000h ;;< The BS3SYSTEM16 selector.
1176
1177%define BS3_SEL_FREE_PART3 2008h ;;< Free selector space - part \%3.
1178%define BS3_SEL_FREE_PART3_LAST 26f8h ;;< Free selector space - part \%3, last entry.
1179
1180%define BS3_SEL_DATA16 2700h ;;< The BS3DATA16 selector.
1181
1182%define BS3_SEL_GDT_LIMIT 2707h ;;< The GDT limit.
1183
1184;; @}
1185
1186
1187;
1188; Sanity checks.
1189;
1190%if BS3_ADDR_BS3TEXT16 != BS3_ADDR_LOAD
1191 %error "BS3_ADDR_BS3TEXT16 and BS3_ADDR_LOAD are out of sync"
1192%endif
1193%if (BS3_ADDR_BS3TEXT16 / 16) != BS3_SEL_TEXT16
1194 %error "BS3_ADDR_BS3TEXT16 and BS3_SEL_TEXT16 are out of sync"
1195%endif
1196%if (BS3_ADDR_BS3DATA16 / 16) != BS3_SEL_DATA16
1197 %error "BS3_ADDR_BS3DATA16 and BS3_SEL_DATA16 are out of sync"
1198%endif
1199%if (BS3_ADDR_BS3SYSTEM16 / 16) != BS3_SEL_SYSTEM16
1200 %error "BS3_ADDR_BS3SYSTEM16 and BS3_SEL_SYSTEM16 are out of sync"
1201%endif
1202
1203;
1204; BS3 register context (without FPU).
1205;
1206struc BS3REGCTX
1207 .rax resq 1
1208 .rcx resq 1
1209 .rdx resq 1
1210 .rbx resq 1
1211 .rsp resq 1
1212 .rbp resq 1
1213 .rsi resq 1
1214 .rdi resq 1
1215 .r8 resq 1
1216 .r9 resq 1
1217 .r10 resq 1
1218 .r11 resq 1
1219 .r12 resq 1
1220 .r13 resq 1
1221 .r14 resq 1
1222 .r15 resq 1
1223 .rflags resq 1
1224 .rip resq 1
1225 .cs resw 1
1226 .ds resw 1
1227 .es resw 1
1228 .fs resw 1
1229 .gs resw 1
1230 .ss resw 1
1231 .tr resw 1
1232 .ldtr resw 1
1233 .cBits resb 1
1234 .abPadding resb 7
1235 .cr0 resq 1
1236 .cr2 resq 1
1237 .cr3 resq 1
1238 .cr4 resq 1
1239endstruc
1240
1241;;
1242; BS3 Trap Frame.
1243;
1244struc BS3TRAPFRAME
1245 .bXcpt resb 1
1246 .bAlignment resb 1
1247 .uHandlerCs resw 1
1248 .uHandlerSs resw 1
1249 .uHandlerRsp resq 1
1250 .fHandlerRfl resq 1
1251 .uErrCd resq 1
1252 .Ctx resb BS3REGCTX_size
1253endstruc
1254
1255;; Flag for Bs3TrapXxResumeFrame methods.
1256%define BS3TRAPRESUME_F_SKIP_CRX 1
1257
1258
1259;; @name BS3CPU_XXX - Bs3CpuDetect_mmm return value and g_bBs3CpuDetected.
1260;; @{
1261%define BS3CPU_8086 0x0001
1262%define BS3CPU_V20 0x0002
1263%define BS3CPU_80186 0x0003
1264%define BS3CPU_80286 0x0004
1265%define BS3CPU_80386 0x0005
1266%define BS3CPU_80486 0x0006
1267%define BS3CPU_Pentium 0x0007
1268%define BS3CPU_PPro 0x0008
1269%define BS3CPU_PProOrNewer 0x0009
1270%define BS3CPU_TYPE_MASK 0x00ff
1271%define BS3CPU_F_CPUID 0x0100
1272%define BS3CPU_F_CPUID_EXT_LEAVES 0x0200
1273%define BS3CPU_F_LONG_MODE 0x0400
1274;; @}
1275
1276
1277%endif
1278
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