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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3kit.mac@ 60539

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1; $Id: bs3kit.mac 60539 2016-04-18 14:09:39Z vboxsync $
2;; @file
3; BS3Kit - structures, symbols, macros and stuff.
4;
5
6;
7; Copyright (C) 2007-2015 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17; The contents of this file may alternatively be used under the terms
18; of the Common Development and Distribution License Version 1.0
19; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20; VirtualBox OSE distribution, in which case the provisions of the
21; CDDL are applicable instead of those of the GPL.
22;
23; You may elect to license modified versions of this file under the
24; terms and conditions of either the GPL or the CDDL or both.
25;
26
27%ifndef ___bs3kit_mac___
28%define ___bs3kit_mac___
29
30;
31; Before we can include anything, we need to override NAME and switch section.
32; If we don't do the latter we end up with an unused 'text' section.
33;
34
35; Drop the asmdefs-first.mac header for native bs3kit files.
36%undef RT_ASMDEFS_INC_FIRST_FILE
37
38;;
39; Macro for setting register aliases according to the bit count given by %1.
40;
41%macro BS3_SET_REG_ALIASES 1
42 ;
43 ; Register aliases.
44 ;
45 %if %1 == 64
46 %define xCB 8
47 %define xDEF dq
48 %define xRES resq
49 %define xPRE qword
50 %define xSP rsp
51 %define xBP rbp
52 %define xAX rax
53 %define xBX rbx
54 %define xCX rcx
55 %define xDX rdx
56 %define xDI rdi
57 %define xSI rsi
58 %define xWrtRIP wrt rip
59 %define xPUSHF pushfq
60 %define xPOPF popfq
61 %define xRETF o64 retf
62 %elif %1 == 32
63 %define xCB 4
64 %define xDEF dd
65 %define xRES resd
66 %define xPRE dword
67 %define xSP esp
68 %define xBP ebp
69 %define xAX eax
70 %define xBX ebx
71 %define xCX ecx
72 %define xDX edx
73 %define xDI edi
74 %define xSI esi
75 %define xWrtRIP
76 %define xPUSHF pushfd
77 %define xPOPF popfd
78 %define xRETF retf
79 %elif %1 == 16
80 %define xCB 2
81 %define xDEF dw
82 %define xRES resw
83 %define xPRE word
84 %define xSP sp
85 %define xBP bp
86 %define xAX ax
87 %define xBX bx
88 %define xCX cx
89 %define xDX dx
90 %define xDI di
91 %define xSI si
92 %define xWrtRIP
93 %define xPUSHF pushf
94 %define xPOPF popf
95 %define xRETF retf
96 %else
97 %error "Invalid BS3_SET_REG_ALIASES argument:" %1
98 %endif
99
100
101 ;
102 ; Register names corresponding to the max size for pop/push <reg>.
103 ;
104 ; 16-bit can push both 32-bit and 16-bit registers. This 's' prefixed variant
105 ; is used when 16-bit should use the 32-bit register.
106 ;
107 %if %1 == 64
108 %define sCB 8
109 %define sDEF dq
110 %define sRES resq
111 %define sPRE qword
112 %define sSP rsp
113 %define sBP rbp
114 %define sAX rax
115 %define sBX rbx
116 %define sCX rcx
117 %define sDX rdx
118 %define sDI rdi
119 %define sSI rsi
120 %define sPUSHF pushfq
121 %define sPOPF popfq
122 %else
123 %define sCB 4
124 %define sDEF dd
125 %define sRES resd
126 %define sPRE dword
127 %define sSP esp
128 %define sBP ebp
129 %define sAX eax
130 %define sBX ebx
131 %define sCX ecx
132 %define sDX edx
133 %define sDI edi
134 %define sSI esi
135 %define sPUSHF pushfd
136 %define sPOPF popfd
137 %endif
138%endmacro
139
140;;
141; Redefines macros that follows __BITS__.
142%macro BS3_SET_BITS_MACROS 1
143 ;; Emulate the __BITS__ macro in NASM 2.0+. Follows BS3_SET_BITS.
144 %ifdef __YASM__
145 %undef __BITS__
146 %define __BITS__ %1
147 %endif
148
149 ;; Mostly internal macro. Follows BS3_SET_BITS.
150 %undef BS3_NAME_UNDERSCORE
151 %if %1 == 64
152 %define BS3_NAME_UNDERSCORE
153 %else
154 %define BS3_NAME_UNDERSCORE _
155 %endif
156
157 ;; For segment overrides and stuff. Follows BS3_SET_BITS.
158 %undef BS3_ONLY_16BIT
159 %if %1 == 16
160 %define BS3_ONLY_16BIT(a_Expr) a_Expr
161 %else
162 %define BS3_ONLY_16BIT(a_Expr)
163 %endif
164
165 ;; For odd 64-bit stuff. Follows BS3_SET_BITS.
166 %undef BS3_ONLY_64BIT
167 %if %1 == 64
168 %define BS3_ONLY_64BIT(a_Expr) a_Expr
169 %else
170 %define BS3_ONLY_64BIT(a_Expr)
171 %endif
172
173 ;; For segment overrides and stuff. Follows BS3_SET_BITS.
174 %undef BS3_NOT_64BIT
175 %if %1 == 64
176 %define BS3_NOT_64BIT(a_Expr)
177 %else
178 %define BS3_NOT_64BIT(a_Expr) a_Expr
179 %endif
180
181 ;; For stack cleanups and similar where each bit mode is different. Follows BS3_SET_BITS.
182 %undef BS3_IF_16_32_64BIT
183 %if %1 == 16
184 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_16BitExpr
185 %elif %1 == 32
186 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_32BitExpr
187 %else
188 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_64BitExpr
189 %endif
190
191 ;; For RIP relative addressing in 64-bit mode and absolute addressing in
192 ; other modes. Follows BS3_SET_BITS.
193 %undef BS3_WRT_RIP
194 %if %1 == 64
195 %define BS3_WRT_RIP(a_Sym) rel a_Sym
196 %else
197 %define BS3_WRT_RIP(a_Sym) a_Sym
198 %endif
199
200 %undef BS3_LEA_MOV_WRT_RIP
201 %if %1 == 64
202 %define BS3_LEA_MOV_WRT_RIP(a_DstReg, a_Sym) lea a_DstReg, [BS3_WRT_RIP(a_Sym)]
203 %else
204 %define BS3_LEA_MOV_WRT_RIP(a_DstReg, a_Sym) mov a_DstReg, a_Sym
205 %endif
206
207 ;; @def BS3_DATA16_WRT
208 ; For accessing BS3DATA16 correctly.
209 ; @param a_Var The BS3DATA16 variable.
210 %undef BS3_DATA16_WRT
211 %if %1 == 16
212 %define BS3_DATA16_WRT(a_Var) a_Var wrt BS3KIT_GRPNM_DATA16
213 %elif %1 == 32
214 %define BS3_DATA16_WRT(a_Var) a_Var wrt FLAT
215 %else
216 %define BS3_DATA16_WRT(a_Var) BS3_WRT_RIP(a_Var) wrt FLAT
217 %endif
218
219 %undef BS3_IF_16BIT_OTHERWISE
220 %if %1 == 16
221 %define BS3_IF_16BIT_OTHERWISE(a_16BitExpr, a_OtherwiseExpr) a_16BitExpr
222 %else
223 %define BS3_IF_16BIT_OTHERWISE(a_16BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
224 %endif
225
226 %undef BS3_IF_32BIT_OTHERWISE
227 %if %1 == 32
228 %define BS3_IF_32BIT_OTHERWISE(a_32BitExpr, a_OtherwiseExpr) a_32BitExpr
229 %else
230 %define BS3_IF_32BIT_OTHERWISE(a_32BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
231 %endif
232
233 %undef BS3_IF_64BIT_OTHERWISE
234 %if %1 == 32
235 %define BS3_IF_64BIT_OTHERWISE(a_64BitExpr, a_OtherwiseExpr) a_32BitExpr
236 %else
237 %define BS3_IF_64BIT_OTHERWISE(a_64BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
238 %endif
239
240 ;;
241 ; Same as BS3_CMN_NM except in 16-bit mode, it will generate the far name.
242 ; (16-bit code generally have both near and far callable symbols, so we won't
243 ; be restricted to 64KB test code.)
244 %if %1 == 16
245 %define BS3_CMN_NM_FAR(a_Name) BS3_NAME_UNDERSCORE %+ a_Name %+ _f %+ __BITS__
246 %else
247 %define BS3_CMN_NM_FAR(a_Name) BS3_CMN_NM(a_Name)
248 %endif
249
250%endmacro
251
252; Default to register aliases for ARCH_BITS.
253BS3_SET_REG_ALIASES ARCH_BITS
254
255; Define macros for ARCH_BITS.
256BS3_SET_BITS_MACROS ARCH_BITS
257
258
259;; Wrapper around BITS.
260; Updates __BITS__ (built-in variable in nasm, we work it for yasm) as well
261; a number of convenient macros and register aliases.
262;
263; @param %1 The CPU bit count: 16, 32 or 64
264; @remarks ARCH_BITS is not modified and will remain what it was on the
265; assembler command line.
266%macro BS3_SET_BITS 1
267 BITS %1
268 BS3_SET_BITS_MACROS %1
269 BS3_SET_REG_ALIASES %1
270%endmacro
271
272;;
273; For instruction that should only be emitted in 16-bit mode. Follows BS3_SET_BITS.
274%macro BS3_ONLY_16BIT_STMT 1+
275 %if __BITS__ == 16
276 %1
277 %endif
278%endmacro
279
280;;
281; For instruction that should only be emitted in 32-bit mode. Follows BS3_SET_BITS.
282%macro BS3_ONLY_32BIT_STMT 1+
283 %if __BITS__ == 32
284 %1
285 %endif
286%endmacro
287
288;;
289; For instruction that should only be emitted in 64-bit mode. Follows BS3_SET_BITS.
290%macro BS3_ONLY_64BIT_STMT 1+
291 %if __BITS__ == 64
292 %1
293 %endif
294%endmacro
295
296
297
298;; @name Segment definitions.
299;; @{
300
301%ifdef ASM_FORMAT_OMF
302; !!HACK ALERT!!
303;
304; To make FLAT actually be flat, i.e. have a base of 0 rather than the same as
305; the target (?) segment, we tweak it a little bit here. We associate a segment
306; with it so that we can get at it in the class/segment ordering directives
307; we pass to the linker. The segment does not contain any data or anything, it
308; is just an empty one which we assign the address of zero.
309;
310; Look for 'clname BS3FLAT segaddr=0x0000' and 'segment BS3FLAT segaddr=0x0000'
311; in the makefile.
312;
313; !!HACK ALERT!!
314segment BS3FLAT use32 class=BS3FLAT
315GROUP FLAT BS3FLAT
316%endif
317
318
319%macro BS3_BEGIN_TEXT16 0-1 2
320 %ifndef BS3_BEGIN_TEXT16_NOT_FIRST
321 %define BS3_BEGIN_TEXT16_NOT_FIRST
322 section BS3TEXT16 align=%1 CLASS=BS3CLASS16CODE PUBLIC USE16
323 %ifndef BS3_BEGIN_TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
324 %ifndef BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
325 %define BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
326 section BS3TEXT16_NEARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
327 %endif
328 %ifndef BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
329 %define BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
330 section BS3TEXT16_FARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
331 %endif
332 GROUP CGROUP16 BS3TEXT16 BS3TEXT16_NEARSTUBS BS3TEXT16_FARSTUBS
333 section BS3TEXT16
334 %endif
335 %else
336 section BS3TEXT16
337 %endif
338 %undef BS3_CUR_SEG_BEGIN_MACRO
339 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16
340 BS3_SET_BITS 16
341%endmacro
342
343%macro BS3_BEGIN_TEXT16_NEARSTUBS 0
344 %ifndef BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
345 %define BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
346 section BS3TEXT16_NEARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
347 %else
348 section BS3TEXT16_NEARSTUBS
349 %endif
350 %undef BS3_CUR_SEG_BEGIN_MACRO
351 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16_NEARSTUBS
352 BS3_SET_BITS 16
353%endmacro
354
355%macro BS3_BEGIN_TEXT16_FARSTUBS 0
356 %ifndef BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
357 %define BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
358 section BS3TEXT16_FARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
359 %else
360 section BS3TEXT16_FARSTUBS
361 %endif
362 %undef BS3_CUR_SEG_BEGIN_MACRO
363 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16_FARSTUBS
364 BS3_SET_BITS 16
365%endmacro
366
367%macro BS3_BEGIN_RMTEXT16 0-1 2
368 %ifndef BS3_BEGIN_RMTEXT16_NOT_FIRST
369 %define BS3_BEGIN_RMTEXT16_NOT_FIRST
370 section BS3RMTEXT16 align=%1 CLASS=BS3CLASS16RMCODE PUBLIC USE16
371 %ifndef BS3_BEGIN_RMTEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
372 GROUP BS3GROUPRMTEXT16 BS3RMTEXT16
373 %endif
374 %else
375 section BS3RMTEXT16
376 %endif
377 %undef BS3_CUR_SEG_BEGIN_MACRO
378 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_RMTEXT16
379 BS3_SET_BITS 16
380%endmacro
381
382%macro BS3_BEGIN_X0TEXT16 0-1 2
383 %ifndef BS3_BEGIN_X0TEXT16_NOT_FIRST
384 %define BS3_BEGIN_X0TEXT16_NOT_FIRST
385 section BS3X0TEXT16 align=%1 CLASS=BS3CLASS16X0CODE PUBLIC USE16
386 %ifndef BS3_BEGIN_X0TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
387 GROUP BS3GROUPX0TEXT16 BS3X0TEXT16
388 %endif
389 %else
390 section BS3X0TEXT16
391 %endif
392 %undef BS3_CUR_SEG_BEGIN_MACRO
393 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_X0TEXT16
394 BS3_SET_BITS 16
395%endmacro
396
397%macro BS3_BEGIN_X1TEXT16 0-1 2
398 %ifndef BS3_BEGIN_X1TEXT16_NOT_FIRST
399 %define BS3_BEGIN_X1TEXT16_NOT_FIRST
400 section BS3X1TEXT16 align=%1 CLASS=BS3CLASS16X1CODE PUBLIC USE16
401 %ifndef BS3_BEGIN_X1TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
402 GROUP BS3GROUPX1TEXT16 BS3X1TEXT16
403 %endif
404 %else
405 section BS3X1TEXT16
406 %endif
407 %undef BS3_CUR_SEG_BEGIN_MACRO
408 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_X1TEXT16
409 BS3_SET_BITS 16
410%endmacro
411
412
413%macro BS3_BEGIN_DATA16 0-1 2
414 %ifndef BS3_BEGIN_DATA16_NOT_FIRST
415 %define BS3_BEGIN_DATA16_NOT_FIRST
416 section BS3DATA16 align=%1 CLASS=BS3KIT_CLASS_DATA16 PUBLIC USE16
417 %ifndef BS3_BEGIN_DATA16_WITHOUT_GROUP ; bs3-first-common.mac trick.
418 GROUP BS3KIT_GRPNM_DATA16 BS3DATA16
419 %endif
420 %else
421 section BS3DATA16
422 %endif
423 %undef BS3_CUR_SEG_BEGIN_MACRO
424 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA16
425 BS3_SET_BITS 16
426%endmacro
427
428%macro BS3_BEGIN_TEXT32 0-1 2
429 %ifndef BS3_BEGIN_TEXT32_NOT_FIRST
430 %define BS3_BEGIN_TEXT32_NOT_FIRST
431 section BS3TEXT32 align=%1 CLASS=BS3CLASS32CODE PUBLIC USE32 FLAT
432 %else
433 section BS3TEXT32
434 %endif
435 %undef BS3_CUR_SEG_BEGIN_MACRO
436 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT32
437 BS3_SET_BITS 32
438%endmacro
439
440%macro BS3_BEGIN_DATA32 0-1 16
441 %ifndef BS3_BEGIN_DATA32_NOT_FIRST
442 %define BS3_BEGIN_DATA32_NOT_FIRST
443 section BS3DATA32 align=%1 CLASS=FAR_DATA PUBLIC USE32 ;FLAT - compiler doesn't make data flat.
444 %else
445 section BS3DATA32
446 %endif
447 %undef BS3_CUR_SEG_BEGIN_MACRO
448 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA32
449 BS3_SET_BITS 32
450%endmacro
451
452%macro BS3_BEGIN_TEXT64 0-1 2
453 %ifndef BS3_BEGIN_TEXT64_NOT_FIRST
454 %define BS3_BEGIN_TEXT64_NOT_FIRST
455 section BS3TEXT64 align=%1 CLASS=BS3CLASS64CODE PUBLIC USE32 FLAT
456 %else
457 section BS3TEXT64
458 %endif
459 %undef BS3_CUR_SEG_BEGIN_MACRO
460 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT64
461 BS3_SET_BITS 64
462%endmacro
463
464%macro BS3_BEGIN_DATA64 0-1 16
465 %ifndef BS3_BEGIN_DATA64_NOT_FIRST
466 %define BS3_BEGIN_DATA64_NOT_FIRST
467 section BS3DATA64 align=%1 CLASS=FAR_DATA PUBLIC USE32 ;FLAT (see DATA32)
468 %else
469 section BS3DATA64
470 %endif
471 %undef BS3_CUR_SEG_BEGIN_MACRO
472 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA64
473 BS3_SET_BITS 64
474%endmacro
475
476;; The system data segment containing the GDT, TSSes and IDTs.
477%macro BS3_BEGIN_SYSTEM16 0-1 16
478 %ifndef BS3_BEGIN_SYSTEM16_NOT_FIRST
479 %define BS3_BEGIN_SYSTEM16_NOT_FIRST
480 section BS3SYSTEM16 align=%1 CLASS=BS3SYSTEM16 PUBLIC USE16
481 %else
482 section BS3SYSTEM16
483 %endif
484 %undef BS3_CUR_SEG_BEGIN_MACRO
485 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_SYSTEM16
486 BS3_SET_BITS 16
487%endmacro
488
489;; Default text section.
490%macro BS3_BEGIN_DEFAULT_TEXT 0
491 %if ARCH_BITS == 16
492 BS3_BEGIN_TEXT16
493 %elif ARCH_BITS == 32
494 BS3_BEGIN_TEXT32
495 %elif ARCH_BITS == 64
496 BS3_BEGIN_TEXT64
497 %else
498 %error "ARCH_BITS must be defined as either 16, 32, or 64!"
499 INVALID_ARCH_BITS
500 %endif
501%endmacro
502
503;; @}
504
505
506;
507; Now, ditch the default 'text' section and define our own NAME macro.
508;
509%ifndef ASM_FORMAT_BIN
510 BS3_BEGIN_DEFAULT_TEXT
511 BS3_BEGIN_DEFAULT_TEXT ; stupid nasm automagically repeats the segment attributes.
512%endif
513
514;; When using watcom + OMF, we're using __cdecl by default, which
515; get an underscore added in front.
516%ifdef ASM_FORMAT_OMF
517 %define NAME(name) _ %+ NAME_OVERLOAD(name)
518%endif
519
520
521;
522; Include the standard headers from iprt.
523;
524
525
526%include "iprt/asmdefs.mac"
527%include "iprt/x86.mac"
528
529
530;;
531; Extern macro which mangles the name using NAME().
532%macro EXTERN 1
533 extern NAME(%1)
534%endmacro
535
536;;
537; Mangles a common name according to the current cpu bit count.
538; @remarks Requires the use of the BS3_SET_BITS macro instead of the BITS directive.
539%define BS3_CMN_NM(a_Name) BS3_NAME_UNDERSCORE %+ a_Name %+ _c %+ __BITS__
540
541;;
542; Extern macro which mangles the common name correctly, redefining the unmangled
543; name to the mangled one for ease of use.
544;
545; @param %1 The unmangled common name.
546;
547; @remarks Must enter the segment in which this name is defined.
548;
549%macro BS3_EXTERN_CMN 1
550 extern BS3_CMN_NM(%1)
551 %undef %1
552 %define %1 BS3_CMN_NM(%1)
553%endmacro
554
555;;
556; Same as BS3_EXTERN_CMN except it picks the far variant in 16-bit code.
557;
558; @param %1 The unmangled common name.
559;
560; @remarks Must enter the segment in which this name is defined.
561;
562%macro BS3_EXTERN_CMN_FAR 1
563 extern BS3_CMN_NM_FAR(%1)
564 %undef %1
565 %define %1 BS3_CMN_NM_FAR(%1)
566%endmacro
567
568;; @def BS3_EXTERN_TMPL
569; Mangles the given name into a template specific one. For ease of use, the
570; name is redefined to the mangled one, just like BS3_EXTERN_CMN does.
571; @note Segment does not change.
572%macro BS3_EXTERN_TMPL 1
573 extern TMPL_NM(%1)
574 %undef %1
575 %define %1 TMPL_NM(%1)
576%endmacro
577
578
579;;
580; Mangles a 16-bit and 32-bit accessible data name.
581; @remarks Requires the use of the BS3_SET_BITS macro instead of the BITS directive.
582%define BS3_DATA_NM(a_Name) _ %+ a_Name
583
584;;
585; Extern macro which mangles a DATA16 symbol correctly, redefining the
586; unmangled name to the mangled one for ease of use.
587;
588; @param %1 The unmangled common name.
589;
590; @remarks Will change to the DATA16 segment, use must switch back afterwards!
591;
592%macro BS3_EXTERN_DATA16 1
593 BS3_BEGIN_DATA16
594 extern _ %+ %1
595 %undef %1
596 %define %1 _ %+ %1
597%endmacro
598
599;;
600; Extern macro which mangles a BS3SYSTEM16 symbol correctly, redefining the
601; unmangled name to the mangled one for ease of use.
602;
603; @param %1 The unmangled common name.
604;
605; @remarks Will change to the SYSTEM16 segment, use must switch back afterwards!
606;
607%macro BS3_EXTERN_SYSTEM16 1
608 BS3_BEGIN_SYSTEM16
609 extern _ %+ %1
610 %undef %1
611 %define %1 _ %+ %1
612%endmacro
613
614
615;;
616; Global name with ELF attributes and size.
617;
618; This differs from GLOBALNAME_EX in that it expects a mangled symbol name,
619; and allows for nasm style symbol size expressions.
620;
621; @param %1 The mangled name.
622; @param %2 Symbol attributes.
623; @param %3 The size expression.
624;
625%macro BS3_GLOBAL_NAME_EX 3
626%ifdef ASM_FORMAT_ELF
627 %ifdef __NASM__
628global %1:%2 %3
629 %else
630global %1:%2
631 %endif
632%else
633global %1
634%endif
635%1:
636%endmacro
637
638;;
639; Global data unmangled label.
640;
641; @param %1 The unmangled name.
642; @param %2 The size (0 is fine).
643;
644%macro BS3_GLOBAL_DATA 2
645BS3_GLOBAL_NAME_EX BS3_DATA_NM(%1), , %2
646%endmacro
647
648;;
649; Starts a procedure.
650;
651; This differs from BEGINPROC in that it expects a mangled symbol name and
652; does the NASM symbol size stuff.
653;
654; @param %1 The mangled name.
655;
656%macro BS3_PROC_BEGIN 1
657%if __BITS__ == 64
658 BS3_GLOBAL_NAME_EX _ %+ %1, function, (_ %+ %1 %+ _EndProc - %1)
659%endif
660BS3_GLOBAL_NAME_EX %1, function, (%1 %+ _EndProc - %1)
661%endmacro
662
663;;
664; Ends a procedure.
665;
666; Counter part to BS3_PROC_BEGIN.
667;
668; @param %1 The mangled name.
669;
670%macro BS3_PROC_END 1
671BS3_GLOBAL_NAME_EX %1 %+ _EndProc, function hidden, (%1 %+ _EndProc - %1)
672 %ifdef ASM_FORMAT_ELF
673 %ifdef __YASM__
674size %1 %1 %+ _EndProc - %1
675size %1 %+ _EndProc 0
676 %endif
677 %endif
678 int3 ; handy and avoids overlapping labels.
679%endmacro
680
681
682;; @name BS3_PBC_XXX - For use as the 2nd parameter to BS3_PROC_BEGIN_CMN.
683;; @{
684%define BS3_PBC_NEAR 0 ;;< Only near.
685%define BS3_PBC_FAR 1 ;;< Only far.
686%define BS3_PBC_HYBRID 2 ;;< Hybrid near/far procedure, trashing AX
687%define BS3_PBC_HYBRID_SAFE 3 ;;< Hybrid near/far procedure, no trashing but slower.
688%define BS3_PBC_HYBRID_0_ARGS 4 ;;< Hybrid near/far procedure, no parameters so separate far stub, no trashing, fast near calls.
689;; @}
690
691;; Convenience macro for defining common procedures.
692; This will emit both near and far 16-bit symbols according to parameter %2 (BS3_PBC_XXX).
693%macro BS3_PROC_BEGIN_CMN 2
694 %undef BS3_CUR_PROC_FLAGS
695 %if __BITS__ == 16
696 %if %2 == BS3_PBC_NEAR
697 %define BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
698 %xdefine cbCurRetAddr 2
699 BS3_PROC_BEGIN BS3_CMN_NM(%1)
700
701 %elif %2 == BS3_PBC_FAR
702 %define BS3_CUR_PROC_FLAGS BS3_PBC_FAR
703 %xdefine cbCurRetAddr 4
704 BS3_PROC_BEGIN BS3_CMN_NM_FAR(%1)
705
706 %elif %2 == BS3_PBC_HYBRID
707 %define BS3_CUR_PROC_FLAGS BS3_PBC_HYBRID
708 %xdefine cbCurRetAddr 4
709 BS3_GLOBAL_NAME_EX BS3_CMN_NM(%1), function, 3
710 pop ax
711 push cs
712 push ax
713 BS3_PROC_BEGIN BS3_CMN_NM_FAR(%1)
714
715 %elif %2 == BS3_PBC_HYBRID_SAFE
716 %define BS3_CUR_PROC_FLAGS BS3_PBC_HYBRID_SAFE
717 %xdefine cbCurRetAddr 4
718 BS3_GLOBAL_NAME_EX BS3_CMN_NM(%1), function, 3
719 extern Bs3CreateHybridFarRet_c16
720 call Bs3CreateHybridFarRet_c16
721 BS3_PROC_BEGIN BS3_CMN_NM_FAR(%1)
722
723 %elif %2 == BS3_PBC_HYBRID_0_ARGS
724 %define BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
725 %xdefine cbCurRetAddr 2
726 %undef TMP_BEGIN_PREV_SEG
727 %xdefine TMP_BEGIN_PREV_SEG BS3_CUR_SEG_BEGIN_MACRO
728
729 BS3_BEGIN_TEXT16_FARSTUBS
730 BS3_PROC_BEGIN BS3_CMN_NM_FAR(%1)
731 call BS3_CMN_NM(%1)
732 retf
733 BS3_PROC_END BS3_CMN_NM_FAR(%1)
734
735 TMP_BEGIN_PREV_SEG
736 BS3_PROC_BEGIN BS3_CMN_NM(%1)
737
738 %else
739 %error BS3_PROC_BEGIN_CMN parameter 2 value %2 is not recognized.
740
741 %define BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
742 %xdefine cbCurRetAddr 4
743 BS3_PROC_BEGIN BS3_CMN_NM(%1)
744 %endif
745 %else
746 %define BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
747 %xdefine cbCurRetAddr xCB
748 BS3_PROC_BEGIN BS3_CMN_NM(%1)
749 %endif
750%endmacro
751
752;; Convenience macro for defining common procedures.
753%macro BS3_PROC_END_CMN 1
754 %if __BITS__ == 16
755 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR
756 BS3_PROC_END BS3_CMN_NM(%1)
757 %else
758 BS3_PROC_END BS3_CMN_NM_FAR(%1)
759 %endif
760 %else
761 BS3_PROC_END BS3_CMN_NM(%1)
762 %endif
763 %undef cbCurRetAddr
764%endmacro
765
766;; Does a far return in 16-bit code, near return in 32-bit and 64-bit.
767; This is for use with BS3_PBC_XXX
768%macro BS3_HYBRID_RET 0-1
769 %if __BITS__ == 16
770 %if %0 > 0
771 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR || BS3_CUR_PROC_FLAGS == BS3_PBC_HYBRID_0_ARGS
772 ret %1
773 %else
774 retf %1
775 %endif
776 %else
777 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR || BS3_CUR_PROC_FLAGS == BS3_PBC_HYBRID_0_ARGS
778 ret
779 %else
780 retf
781 %endif
782 %endif
783 %else
784 %if BS3_CUR_PROC_FLAGS != BS3_PBC_NEAR
785 %error Expected BS3_CUR_PROC_FLAGS to be BS3_PBC_NEAR in non-16-bit code.
786 %endif
787 %if %0 > 0
788 ret %1
789 %else
790 ret
791 %endif
792 %endif
793%endmacro
794
795;;
796; Generate a safe 16-bit far stub for function %1, shuffling %2 bytes of parameters.
797;
798; This does absolutely nothing in 32-bit and 64-bit mode.
799;
800; @param 1 The function basename.
801; @param 2 The number of bytes of parameters on the stack, must be a multiple of 2.
802; @remarks Changes the segment to TEXT16.
803;
804%macro BS3_CMN_FAR_STUB 2
805 %if %2 <= 1 || (%2 & 1)
806 %error Invalid parameter frame size passed to BS3_CMN_FAR_STUB: %2
807 %endif
808 %if __BITS__ == 16
809BS3_BEGIN_TEXT16_FARSTUBS
810BS3_PROC_BEGIN_CMN %1, BS3_PBC_FAR
811 CPU 8086
812 inc bp ; Odd bp is far call indicator.
813 push bp
814 mov bp, sp
815 %assign offParam %2
816 %rep %2/2
817 push word [bp + xCB + cbCurRetAddr + offParam - 2]
818 %assign offParam offParam - 2
819 %endrep
820 call BS3_CMN_NM(%1)
821 add sp, %2
822 pop bp
823 dec bp
824 retf
825BS3_PROC_END_CMN %1
826BS3_BEGIN_TEXT16
827 %endif
828%endmacro
829
830;; Convenience macro for defining mode specific procedures.
831%macro BS3_PROC_BEGIN_MODE 1
832 BS3_PROC_BEGIN TMPL_NM(%1)
833%endmacro
834
835;; Convenience macro for defining mode specific procedures.
836%macro BS3_PROC_END_MODE 1
837 BS3_PROC_END TMPL_NM(%1)
838%endmacro
839
840
841;;
842; Prologue hacks for 64-bit code.
843;
844; This saves the four register parameters onto the stack so we can pretend
845; the calling convention is stack based. The 64-bit calling convension is
846; the microsoft one, so this is straight forward.
847;
848; Pairs with BS3_CALL_CONV_EPILOG.
849;
850; @param %1 The number of parameters.
851;
852; @remarks Must be invoked before any stack changing instructions are emitted.
853;
854%macro BS3_CALL_CONV_PROLOG 1
855 %undef BS3_CALL_CONV_PROLOG_PARAMS
856 %define BS3_CALL_CONV_PROLOG_PARAMS %1
857 %if __BITS__ == 64
858 %if %1 >= 1
859 mov [rsp + 008h], rcx
860 %elifdef BS3_STRICT
861 and qword [rsp + 008h], 1
862 %endif
863 %if %1 >= 2
864 mov [rsp + 010h], rdx
865 %elifdef BS3_STRICT
866 and qword [rsp + 010h], 2
867 %endif
868 %if %1 >= 3
869 mov [rsp + 018h], r8
870 %elifdef BS3_STRICT
871 and qword [rsp + 018h], 3
872 %endif
873 %if %1 >= 4
874 mov [rsp + 020h], r9
875 %elifdef BS3_STRICT
876 and qword [rsp + 020h], 4
877 %endif
878 %endif
879%endmacro
880
881;;
882; Epilogue hacks for 64-bit code.
883;
884; Counter part to BS3_CALL_CONV_PROLOG.
885;
886; @param %1 The number of parameters.
887;
888; @remarks Must be invoked right before the return instruction as it uses RSP.
889;
890%macro BS3_CALL_CONV_EPILOG 1
891 %if BS3_CALL_CONV_PROLOG_PARAMS != %1
892 %error "BS3_CALL_CONV_EPILOG argument differs from BS3_CALL_CONV_PROLOG."
893 %endif
894 %if __BITS__ == 64
895 %ifdef BS3_STRICT
896 mov dword [rsp + 008h], 31h
897 mov dword [rsp + 010h], 32h
898 mov dword [rsp + 018h], 33h
899 mov dword [rsp + 020h], 34h
900 %endif
901 %endif
902%endmacro
903
904;;
905; Wrapper for the call instruction that hides calling convension differences.
906;
907; This always calls %1.
908; In 64-bit code, it will load up to 4 parameters into register.
909;
910; @param %1 The function to call (mangled).
911; @param %2 The number of parameters.
912;
913%macro BS3_CALL 2
914 %if __BITS__ == 64
915 %if %2 >= 1
916 mov rcx, [rsp]
917 %ifdef BS3_STRICT
918 and qword [rsp], 11h
919 %endif
920 %endif
921 %if %2 >= 2
922 mov rdx, [rsp + 008h]
923 %ifdef BS3_STRICT
924 and qword [rsp + 008h], 12h
925 %endif
926 %endif
927 %if %2 >= 3
928 mov r8, [rsp + 010h]
929 %ifdef BS3_STRICT
930 and qword [rsp + 010h], 13h
931 %endif
932 %endif
933 %if %2 >= 4
934 mov r9, [rsp + 018h]
935 %ifdef BS3_STRICT
936 and qword [rsp + 018h], 14h
937 %endif
938 %endif
939 %endif
940 call %1
941%endmacro
942
943
944;; @name Execution Modes
945; @{
946%define BS3_MODE_INVALID 000h
947%define BS3_MODE_RM 001h ;;< real mode.
948%define BS3_MODE_PE16 011h ;;< 16-bit protected mode kernel+tss, running 16-bit code, unpaged.
949%define BS3_MODE_PE16_32 012h ;;< 16-bit protected mode kernel+tss, running 32-bit code, unpaged.
950%define BS3_MODE_PE16_V86 018h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode code, unpaged.
951%define BS3_MODE_PE32 022h ;;< 32-bit protected mode kernel+tss, running 32-bit code, unpaged.
952%define BS3_MODE_PE32_16 021h ;;< 32-bit protected mode kernel+tss, running 16-bit code, unpaged.
953%define BS3_MODE_PEV86 028h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode code, unpaged.
954%define BS3_MODE_PP16 031h ;;< 16-bit protected mode kernel+tss, running 16-bit code, paged.
955%define BS3_MODE_PP16_32 032h ;;< 16-bit protected mode kernel+tss, running 32-bit code, paged.
956%define BS3_MODE_PP16_V86 038h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode code, paged.
957%define BS3_MODE_PP32 042h ;;< 32-bit protected mode kernel+tss, running 32-bit code, paged.
958%define BS3_MODE_PP32_16 041h ;;< 32-bit protected mode kernel+tss, running 16-bit code, paged.
959%define BS3_MODE_PPV86 048h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode code, paged.
960%define BS3_MODE_PAE16 051h ;;< 16-bit protected mode kernel+tss, running 16-bit code, PAE paging.
961%define BS3_MODE_PAE16_32 052h ;;< 16-bit protected mode kernel+tss, running 32-bit code, PAE paging.
962%define BS3_MODE_PAE16_V86 058h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode, PAE paging.
963%define BS3_MODE_PAE32 062h ;;< 32-bit protected mode kernel+tss, running 32-bit code, PAE paging.
964%define BS3_MODE_PAE32_16 061h ;;< 32-bit protected mode kernel+tss, running 16-bit code, PAE paging.
965%define BS3_MODE_PAEV86 068h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode, PAE paging.
966%define BS3_MODE_LM16 071h ;;< 16-bit long mode (paged), kernel+tss always 64-bit.
967%define BS3_MODE_LM32 072h ;;< 32-bit long mode (paged), kernel+tss always 64-bit.
968%define BS3_MODE_LM64 074h ;;< 64-bit long mode (paged), kernel+tss always 64-bit.
969
970%define BS3_MODE_CODE_MASK 00fh ;;< Running code mask.
971%define BS3_MODE_CODE_16 001h ;;< Running 16-bit code.
972%define BS3_MODE_CODE_32 002h ;;< Running 32-bit code.
973%define BS3_MODE_CODE_64 004h ;;< Running 64-bit code.
974%define BS3_MODE_CODE_V86 008h ;;< Running 16-bit virtual 8086 code.
975
976%define BS3_MODE_SYS_MASK 0f0h ;;< kernel+tss mask.
977%define BS3_MODE_SYS_RM 000h ;;< Real mode kernel+tss.
978%define BS3_MODE_SYS_PE16 010h ;;< 16-bit protected mode kernel+tss.
979%define BS3_MODE_SYS_PE32 020h ;;< 32-bit protected mode kernel+tss.
980%define BS3_MODE_SYS_PP16 030h ;;< 16-bit paged protected mode kernel+tss.
981%define BS3_MODE_SYS_PP32 040h ;;< 32-bit paged protected mode kernel+tss.
982%define BS3_MODE_SYS_PAE16 050h ;;< 16-bit PAE paged protected mode kernel+tss.
983%define BS3_MODE_SYS_PAE32 060h ;;< 32-bit PAE paged protected mode kernel+tss.
984%define BS3_MODE_SYS_LM 070h ;;< 64-bit (paged) long mode protected mode kernel+tss.
985
986;; Whether the mode has paging enabled.
987%define BS3_MODE_IS_PAGED(a_fMode) ((a_fMode) >= BS3_MODE_PP16)
988
989;; Whether the mode is running v8086 code.
990%define BS3_MODE_IS_V86(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_V86)
991;; Whether the we're executing in real mode or v8086 mode.
992%define BS3_MODE_IS_RM_OR_V86(a_fMode) ((a_fMode) == BS3_MODE_RM || BS3_MODE_IS_V86(a_fMode))
993;; Whether the mode is running 16-bit code, except v8086.
994%define BS3_MODE_IS_16BIT_CODE_NO_V86(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_16)
995;; Whether the mode is running 16-bit code (includes v8086).
996%define BS3_MODE_IS_16BIT_CODE(a_fMode) (BS3_MODE_IS_16BIT_CODE_NO_V86(a_fMode) || BS3_MODE_IS_V86(a_fMode))
997;; Whether the mode is running 32-bit code.
998%define BS3_MODE_IS_32BIT_CODE(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_32)
999;; Whether the mode is running 64-bit code.
1000%define BS3_MODE_IS_64BIT_CODE(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_64)
1001
1002;; Whether the system is in real mode.
1003%define BS3_MODE_IS_RM_SYS(a_fMode) (((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_RM)
1004;; Whether the system is some 16-bit mode that isn't real mode.
1005%define BS3_MODE_IS_16BIT_SYS_NO_RM(a_fMode) ( ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PE16 \
1006 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PP16 \
1007 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PAE16)
1008;; Whether the system is some 16-bit mode (includes real mode).
1009%define BS3_MODE_IS_16BIT_SYS(a_fMode) (BS3_MODE_IS_16BIT_SYS_NO_RM(a_fMode) || BS3_MODE_IS_RM_SYS(a_fMode))
1010;; Whether the system is some 32-bit mode.
1011%define BS3_MODE_IS_32BIT_SYS(a_fMode) ( ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PE32 \
1012 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PP32 \
1013 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PAE32)
1014;; Whether the system is long mode.
1015%define BS3_MODE_IS_64BIT_SYS(a_fMode) (((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_LM)
1016
1017;; @}
1018
1019;; @name For mode specfic lookups:
1020;; %[BS3_MODE_NM %+ BS3_MODE_PE32](SomeBaseName)
1021;; %[BS3_MODE_LNAME_ %+ TMPL_MODE]
1022;; @{
1023%define BS3_MODE_NM_001h(a_Name) _ %+ a_Name %+ _rm
1024%define BS3_MODE_NM_011h(a_Name) _ %+ a_Name %+ _pe16
1025%define BS3_MODE_NM_012h(a_Name) _ %+ a_Name %+ _pe16_32
1026%define BS3_MODE_NM_018h(a_Name) _ %+ a_Name %+ _pe16_v86
1027%define BS3_MODE_NM_022h(a_Name) _ %+ a_Name %+ _pe32
1028%define BS3_MODE_NM_021h(a_Name) _ %+ a_Name %+ _pe32_16
1029%define BS3_MODE_NM_028h(a_Name) _ %+ a_Name %+ _pev86
1030%define BS3_MODE_NM_031h(a_Name) _ %+ a_Name %+ _pp16
1031%define BS3_MODE_NM_032h(a_Name) _ %+ a_Name %+ _pp16_32
1032%define BS3_MODE_NM_038h(a_Name) _ %+ a_Name %+ _pp16_v86
1033%define BS3_MODE_NM_042h(a_Name) _ %+ a_Name %+ _pp32
1034%define BS3_MODE_NM_041h(a_Name) _ %+ a_Name %+ _pp32_16
1035%define BS3_MODE_NM_048h(a_Name) _ %+ a_Name %+ _ppv86
1036%define BS3_MODE_NM_051h(a_Name) _ %+ a_Name %+ _pae16
1037%define BS3_MODE_NM_052h(a_Name) _ %+ a_Name %+ _pae16_32
1038%define BS3_MODE_NM_058h(a_Name) _ %+ a_Name %+ _pae16_v86
1039%define BS3_MODE_NM_062h(a_Name) _ %+ a_Name %+ _pae32
1040%define BS3_MODE_NM_061h(a_Name) _ %+ a_Name %+ _pae32_16
1041%define BS3_MODE_NM_068h(a_Name) _ %+ a_Name %+ _paev86
1042%define BS3_MODE_NM_071h(a_Name) _ %+ a_Name %+ _lm16
1043%define BS3_MODE_NM_072h(a_Name) _ %+ a_Name %+ _lm32
1044%define BS3_MODE_NM_074h(a_Name) a_Name %+ _lm64
1045
1046%define BS3_MODE_LNAME_001h rm
1047%define BS3_MODE_LNAME_011h pe16
1048%define BS3_MODE_LNAME_012h pe16_32
1049%define BS3_MODE_LNAME_018h pe16_v86
1050%define BS3_MODE_LNAME_022h pe32
1051%define BS3_MODE_LNAME_021h pe32_16
1052%define BS3_MODE_LNAME_028h pev86
1053%define BS3_MODE_LNAME_031h pp16
1054%define BS3_MODE_LNAME_032h pp16_32
1055%define BS3_MODE_LNAME_038h pp16_v86
1056%define BS3_MODE_LNAME_042h pp32
1057%define BS3_MODE_LNAME_041h pp32_16
1058%define BS3_MODE_LNAME_048h ppv86
1059%define BS3_MODE_LNAME_051h pae16
1060%define BS3_MODE_LNAME_052h pae16_32
1061%define BS3_MODE_LNAME_058h pae16_v86
1062%define BS3_MODE_LNAME_062h pae32
1063%define BS3_MODE_LNAME_061h pae32_16
1064%define BS3_MODE_LNAME_068h paev86
1065%define BS3_MODE_LNAME_071h lm16
1066%define BS3_MODE_LNAME_072h lm32
1067%define BS3_MODE_LNAME_074h lm64
1068
1069%define BS3_MODE_UNAME_001h RM
1070%define BS3_MODE_UNAME_011h PE16
1071%define BS3_MODE_UNAME_012h PE16_32
1072%define BS3_MODE_UNAME_018h PE16_V86
1073%define BS3_MODE_UNAME_022h PE32
1074%define BS3_MODE_UNAME_021h PE32_16
1075%define BS3_MODE_UNAME_028h PEV86
1076%define BS3_MODE_UNAME_031h PP16
1077%define BS3_MODE_UNAME_032h PP16_32
1078%define BS3_MODE_UNAME_038h PP16_V86
1079%define BS3_MODE_UNAME_042h PP32
1080%define BS3_MODE_UNAME_041h PP32_16
1081%define BS3_MODE_UNAME_048h PPV86
1082%define BS3_MODE_UNAME_051h PAE16
1083%define BS3_MODE_UNAME_052h PAE16_32
1084%define BS3_MODE_UNAME_058h PAE16_V86
1085%define BS3_MODE_UNAME_062h PAE32
1086%define BS3_MODE_UNAME_061h PAE32_16
1087%define BS3_MODE_UNAME_068h PAEV86
1088%define BS3_MODE_UNAME_071h LM16
1089%define BS3_MODE_UNAME_072h LM32
1090%define BS3_MODE_UNAME_074h LM64
1091
1092%define BS3_MODE_UNDERSCORE_001h _
1093%define BS3_MODE_UNDERSCORE_011h _
1094%define BS3_MODE_UNDERSCORE_012h _
1095%define BS3_MODE_UNDERSCORE_018h _
1096%define BS3_MODE_UNDERSCORE_022h _
1097%define BS3_MODE_UNDERSCORE_021h _
1098%define BS3_MODE_UNDERSCORE_028h _
1099%define BS3_MODE_UNDERSCORE_031h _
1100%define BS3_MODE_UNDERSCORE_032h _
1101%define BS3_MODE_UNDERSCORE_038h _
1102%define BS3_MODE_UNDERSCORE_042h _
1103%define BS3_MODE_UNDERSCORE_041h _
1104%define BS3_MODE_UNDERSCORE_048h _
1105%define BS3_MODE_UNDERSCORE_051h _
1106%define BS3_MODE_UNDERSCORE_052h _
1107%define BS3_MODE_UNDERSCORE_058h _
1108%define BS3_MODE_UNDERSCORE_062h _
1109%define BS3_MODE_UNDERSCORE_061h _
1110%define BS3_MODE_UNDERSCORE_068h _
1111%define BS3_MODE_UNDERSCORE_071h _
1112%define BS3_MODE_UNDERSCORE_072h _
1113%define BS3_MODE_UNDERSCORE_074h
1114
1115%define BS3_MODE_CNAME_001h c16
1116%define BS3_MODE_CNAME_011h c16
1117%define BS3_MODE_CNAME_012h c32
1118%define BS3_MODE_CNAME_018h c16
1119%define BS3_MODE_CNAME_022h c32
1120%define BS3_MODE_CNAME_021h c16
1121%define BS3_MODE_CNAME_028h c16
1122%define BS3_MODE_CNAME_031h c16
1123%define BS3_MODE_CNAME_032h c32
1124%define BS3_MODE_CNAME_038h c16
1125%define BS3_MODE_CNAME_042h c32
1126%define BS3_MODE_CNAME_041h c16
1127%define BS3_MODE_CNAME_048h c16
1128%define BS3_MODE_CNAME_051h c16
1129%define BS3_MODE_CNAME_052h c32
1130%define BS3_MODE_CNAME_058h c16
1131%define BS3_MODE_CNAME_062h c32
1132%define BS3_MODE_CNAME_061h c16
1133%define BS3_MODE_CNAME_068h c16
1134%define BS3_MODE_CNAME_071h c16
1135%define BS3_MODE_CNAME_072h c32
1136%define BS3_MODE_CNAME_074h c64
1137;; @}
1138
1139;; @name For getting the ring-0 mode for v86 modes: %[BS3_MODE_R0_NM_001h %+ TMPL_MODE](Bs3SwitchToRM)
1140;; @{
1141%define BS3_MODE_R0_NM_001h(a_Name) _ %+ a_Name %+ _rm
1142%define BS3_MODE_R0_NM_011h(a_Name) _ %+ a_Name %+ _pe16
1143%define BS3_MODE_R0_NM_012h(a_Name) _ %+ a_Name %+ _pe16_32
1144%define BS3_MODE_R0_NM_018h(a_Name) _ %+ a_Name %+ _pe16
1145%define BS3_MODE_R0_NM_022h(a_Name) _ %+ a_Name %+ _pe32
1146%define BS3_MODE_R0_NM_021h(a_Name) _ %+ a_Name %+ _pe32_16
1147%define BS3_MODE_R0_NM_028h(a_Name) _ %+ a_Name %+ _pe32_16
1148%define BS3_MODE_R0_NM_031h(a_Name) _ %+ a_Name %+ _pp16
1149%define BS3_MODE_R0_NM_032h(a_Name) _ %+ a_Name %+ _pp16_32
1150%define BS3_MODE_R0_NM_038h(a_Name) _ %+ a_Name %+ _pp16
1151%define BS3_MODE_R0_NM_042h(a_Name) _ %+ a_Name %+ _pp32
1152%define BS3_MODE_R0_NM_041h(a_Name) _ %+ a_Name %+ _pp32_16
1153%define BS3_MODE_R0_NM_048h(a_Name) _ %+ a_Name %+ _pp32_16
1154%define BS3_MODE_R0_NM_051h(a_Name) _ %+ a_Name %+ _pae16
1155%define BS3_MODE_R0_NM_052h(a_Name) _ %+ a_Name %+ _pae16_32
1156%define BS3_MODE_R0_NM_058h(a_Name) _ %+ a_Name %+ _pae16
1157%define BS3_MODE_R0_NM_062h(a_Name) _ %+ a_Name %+ _pae32
1158%define BS3_MODE_R0_NM_061h(a_Name) _ %+ a_Name %+ _pae32_16
1159%define BS3_MODE_R0_NM_068h(a_Name) _ %+ a_Name %+ _pae32_16
1160%define BS3_MODE_R0_NM_071h(a_Name) _ %+ a_Name %+ _lm16
1161%define BS3_MODE_R0_NM_072h(a_Name) _ %+ a_Name %+ _lm32
1162%define BS3_MODE_R0_NM_074h(a_Name) a_Name %+ _lm64
1163;; @}
1164
1165
1166;;
1167; Includes the file %1 with TMPL_MODE set to all possible value.
1168; @param 1 Double quoted include file name.
1169%macro BS3_INSTANTIATE_TEMPLATE_WITH_WEIRD_ONES 1
1170 %define TMPL_MODE BS3_MODE_RM
1171 %include %1
1172
1173 %define TMPL_MODE BS3_MODE_PE16
1174 %include %1
1175 %define TMPL_MODE BS3_MODE_PE16_32
1176 %include %1
1177 %define TMPL_MODE BS3_MODE_PE16_V86
1178 %include %1
1179
1180 %define TMPL_MODE BS3_MODE_PE32
1181 %include %1
1182 %define TMPL_MODE BS3_MODE_PE32_16
1183 %include %1
1184 %define TMPL_MODE BS3_MODE_PEV86
1185 %include %1
1186
1187 %define TMPL_MODE BS3_MODE_PP16
1188 %include %1
1189 %define TMPL_MODE BS3_MODE_PP16_32
1190 %include %1
1191 %define TMPL_MODE BS3_MODE_PP16_V86
1192 %include %1
1193
1194 %define TMPL_MODE BS3_MODE_PP32
1195 %include %1
1196 %define TMPL_MODE BS3_MODE_PP32_16
1197 %include %1
1198 %define TMPL_MODE BS3_MODE_PPV86
1199 %include %1
1200
1201 %define TMPL_MODE BS3_MODE_PAE16
1202 %include %1
1203 %define TMPL_MODE BS3_MODE_PAE16_32
1204 %include %1
1205 %define TMPL_MODE BS3_MODE_PAE16_V86
1206 %include %1
1207
1208 %define TMPL_MODE BS3_MODE_PAE32
1209 %include %1
1210 %define TMPL_MODE BS3_MODE_PAE32_16
1211 %include %1
1212 %define TMPL_MODE BS3_MODE_PAEV86
1213 %include %1
1214
1215 %define TMPL_MODE BS3_MODE_LM16
1216 %include %1
1217 %define TMPL_MODE BS3_MODE_LM32
1218 %include %1
1219 %define TMPL_MODE BS3_MODE_LM64
1220 %include %1
1221%endmacro
1222
1223
1224;;
1225; Includes the file %1 with TMPL_MODE set to all but the "weird" value.
1226; @param 1 Double quoted include file name.
1227%macro BS3_INSTANTIATE_TEMPLATE_ESSENTIALS 1
1228 %define TMPL_MODE BS3_MODE_RM
1229 %include %1
1230
1231 %define TMPL_MODE BS3_MODE_PE16
1232 %include %1
1233
1234 %define TMPL_MODE BS3_MODE_PE32
1235 %include %1
1236 %define TMPL_MODE BS3_MODE_PEV86
1237 %include %1
1238
1239 %define TMPL_MODE BS3_MODE_PP16
1240 %include %1
1241
1242 %define TMPL_MODE BS3_MODE_PP32
1243 %include %1
1244 %define TMPL_MODE BS3_MODE_PPV86
1245 %include %1
1246
1247 %define TMPL_MODE BS3_MODE_PAE16
1248 %include %1
1249
1250 %define TMPL_MODE BS3_MODE_PAE32
1251 %include %1
1252 %define TMPL_MODE BS3_MODE_PAEV86
1253 %include %1
1254
1255 %define TMPL_MODE BS3_MODE_LM16
1256 %include %1
1257 %define TMPL_MODE BS3_MODE_LM32
1258 %include %1
1259 %define TMPL_MODE BS3_MODE_LM64
1260 %include %1
1261%endmacro
1262
1263;;
1264; Includes the file %1 with TMPL_MODE set to a 16-bit, a 32-bit and a 64-bit value.
1265; @param 1 Double quoted include file name.
1266%macro BS3_INSTANTIATE_COMMON_TEMPLATE 1
1267 %define TMPL_MODE BS3_MODE_RM
1268 %include %1
1269 %define TMPL_MODE BS3_MODE_PE32
1270 %include %1
1271 %define TMPL_MODE BS3_MODE_LM64
1272 %include %1
1273%endmacro
1274
1275
1276;; @name Static Memory Allocation
1277; @{
1278;; The flat load address for the code after the bootsector.
1279%define BS3_ADDR_LOAD 010000h
1280;; Where we save the boot registers during init.
1281; Located right before the code.
1282%define BS3_ADDR_REG_SAVE (BS3_ADDR_LOAD - BS3REGCTX_size - 8)
1283;; Where the stack starts (initial RSP value).
1284; Located 16 bytes (assumed by boot sector) before the saved registers. SS.BASE=0.
1285%define BS3_ADDR_STACK (BS3_ADDR_REG_SAVE - 16)
1286;; The ring-0 stack (8KB) for ring transitions.
1287%define BS3_ADDR_STACK_R0 006000h
1288;; The ring-1 stack (8KB) for ring transitions.
1289%define BS3_ADDR_STACK_R1 004000h
1290;; The ring-2 stack (8KB) for ring transitions.
1291%define BS3_ADDR_STACK_R2 002000h
1292;; IST1 ring-0 stack for long mode (4KB), used for double faults elsewhere.
1293%define BS3_ADDR_STACK_R0_IST1 009000h
1294;; IST2 ring-0 stack for long mode (3KB), used for spare 0 stack elsewhere.
1295%define BS3_ADDR_STACK_R0_IST2 008000h
1296;; IST3 ring-0 stack for long mode (1KB).
1297%define BS3_ADDR_STACK_R0_IST3 007400h
1298;; IST4 ring-0 stack for long mode (1KB), used for spare 1 stack elsewhere.
1299%define BS3_ADDR_STACK_R0_IST4 007000h
1300;; IST5 ring-0 stack for long mode (1KB).
1301%define BS3_ADDR_STACK_R0_IST5 006c00h
1302;; IST6 ring-0 stack for long mode (1KB).
1303%define BS3_ADDR_STACK_R0_IST6 006800h
1304;; IST7 ring-0 stack for long mode (1KB).
1305%define BS3_ADDR_STACK_R0_IST7 006400h
1306
1307;; The base address of the BS3TEXT16 segment (same as BS3_LOAD_ADDR).
1308;; @sa BS3_SEL_TEXT16
1309%define BS3_ADDR_BS3TEXT16 010000h
1310;; The base address of the BS3SYSTEM16 segment.
1311;; @sa BS3_SEL_SYSTEM16
1312%define BS3_ADDR_BS3SYSTEM16 020000h
1313;; The base address of the BS3DATA16/BS3KIT_GRPNM_DATA16 segment.
1314;; @sa BS3_SEL_DATA16
1315%define BS3_ADDR_BS3DATA16 029000h
1316;; @}
1317
1318
1319;;
1320; BS3 register context. Used by traps and such.
1321;
1322struc BS3REGCTX
1323 .rax resq 1 ; BS3REG rax; /**< 0x00 */
1324 .rcx resq 1 ; BS3REG rcx; /**< 0x08 */
1325 .rdx resq 1 ; BS3REG rdx; /**< 0x10 */
1326 .rbx resq 1 ; BS3REG rbx; /**< 0x18 */
1327 .rsp resq 1 ; BS3REG rsp; /**< 0x20 */
1328 .rbp resq 1 ; BS3REG rbp; /**< 0x28 */
1329 .rsi resq 1 ; BS3REG rsi; /**< 0x30 */
1330 .rdi resq 1 ; BS3REG rdi; /**< 0x38 */
1331 .r8 resq 1 ; BS3REG r8; /**< 0x40 */
1332 .r9 resq 1 ; BS3REG r9; /**< 0x48 */
1333 .r10 resq 1 ; BS3REG r10; /**< 0x50 */
1334 .r11 resq 1 ; BS3REG r11; /**< 0x58 */
1335 .r12 resq 1 ; BS3REG r12; /**< 0x60 */
1336 .r13 resq 1 ; BS3REG r13; /**< 0x68 */
1337 .r14 resq 1 ; BS3REG r14; /**< 0x70 */
1338 .r15 resq 1 ; BS3REG r15; /**< 0x78 */
1339 .rflags resq 1 ; BS3REG rflags; /**< 0x80 */
1340 .rip resq 1 ; BS3REG rip; /**< 0x88 */
1341 .cs resw 1 ; uint16_t cs; /**< 0x90 */
1342 .ds resw 1 ; uint16_t ds; /**< 0x92 */
1343 .es resw 1 ; uint16_t es; /**< 0x94 */
1344 .fs resw 1 ; uint16_t fs; /**< 0x96 */
1345 .gs resw 1 ; uint16_t gs; /**< 0x98 */
1346 .ss resw 1 ; uint16_t ss; /**< 0x9a */
1347 .tr resw 1 ; uint16_t tr; /**< 0x9c */
1348 .ldtr resw 1 ; uint16_t ldtr; /**< 0x9e */
1349 .bMode resb 1 ; uint8_t bMode; /**< 0xa0: BS3_MODE_XXX. */
1350 .bCpl resb 1 ; uint8_t bCpl; /**< 0xa1: 0-3, 0 is used for real mode. */
1351 .fbFlags resb 1 ; uint8_t fbFlags; /**< 0xa2: BS3REG_CTX_F_XXX */
1352 .abPadding resb 5 ; uint8_t abPadding[5]; /**< 0xa4 */
1353 .cr0 resq 1 ; BS3REG cr0; /**< 0xa8 */
1354 .cr2 resq 1 ; BS3REG cr2; /**< 0xb0 */
1355 .cr3 resq 1 ; BS3REG cr3; /**< 0xb8 */
1356 .cr4 resq 1 ; BS3REG cr4; /**< 0xc0 */
1357 .uUnused resq 1 ; BS3REG uUnused; /**< 0xc8 */
1358endstruc
1359AssertCompileSize(BS3REGCTX, 0xd0)
1360
1361;; @name BS3REG_CTX_F_XXX - BS3REGCTX::fbFlags masks.
1362; @{
1363;; The context doesn't have valid values for the CRx fields.
1364; This is usually because it wasn't created with CPL=0.
1365%define BS3REG_CTX_F_NO_CR 0x01
1366;; The CPU is too old for CR4, so no CR4 in this context.
1367%define BS3REG_CTX_F_NO_CR4 0x02
1368;; The context doesn't have valid values for AMD64 GPR extensions.
1369%define BS3REG_CTX_F_NO_AMD64 0x04
1370;; @}
1371
1372;;
1373; BS3 Trap Frame.
1374;
1375struc BS3TRAPFRAME
1376 .bXcpt resb 1
1377 .cbIretFrame resb 1
1378 .uHandlerCs resw 1
1379 .uHandlerSs resw 1
1380 .usAlignment resw 1
1381 .uHandlerRsp resq 1
1382 .fHandlerRfl resq 1
1383 .uErrCd resq 1
1384 .Ctx resb BS3REGCTX_size
1385endstruc
1386AssertCompileSize(BS3TRAPFRAME, 0x20 + 0xd0)
1387
1388;; Flag for Bs3TrapXxResumeFrame methods.
1389%define BS3TRAPRESUME_F_SKIP_CRX 1
1390
1391
1392;;
1393; Trap record.
1394;
1395struc BS3TRAPREC
1396 ;; The trap location relative to the base address given at
1397 ; registration time.
1398 .offWhere resd 1
1399 ;; What to add to .offWhere to calculate the resume address.
1400 .offResumeAddend resb 1
1401 ;; The trap number.
1402 .u8TrapNo resb 1
1403 ;; The error code if the trap takes one.
1404 .u16ErrCd resw 1
1405endstruc
1406
1407;; The size shift.
1408%define BS3TRAPREC_SIZE_SHIFT 3
1409
1410
1411;; The system call vector.
1412%define BS3_TRAP_SYSCALL 20h
1413
1414;; @name System call numbers (ax)
1415;; @note Pointers are always passed in cx:xDI.
1416;; @{
1417;; Print char (cl).
1418%define BS3_SYSCALL_PRINT_CHR 0001h
1419;; Print string (pointer in cx:xDI, length in xDX).
1420%define BS3_SYSCALL_PRINT_STR 0002h
1421;; Switch to ring-0.
1422%define BS3_SYSCALL_TO_RING0 0003h
1423;; Switch to ring-1.
1424%define BS3_SYSCALL_TO_RING1 0004h
1425;; Switch to ring-2.
1426%define BS3_SYSCALL_TO_RING2 0005h
1427;; Switch to ring-3.
1428%define BS3_SYSCALL_TO_RING3 0006h
1429;; Restore context (pointer in cx:xDI, flags in dx).
1430%define BS3_SYSCALL_RESTORE_CTX 0007h
1431;; The last system call value.
1432%define BS3_SYSCALL_LAST BS3_SYSCALL_RESTORE_CTX
1433;; @}
1434
1435
1436
1437;; @name BS3_SEL_XXX - GDT selectors
1438;; @{
1439
1440%define BS3_SEL_LDT 0010h ;;< The LDT selector (requires setting up).
1441%define BS3_SEL_TSS16 0020h ;;< The 16-bit TSS selector.
1442%define BS3_SEL_TSS16_DF 0028h ;;< The 16-bit TSS selector for double faults.
1443%define BS3_SEL_TSS16_SPARE0 0030h ;;< The 16-bit TSS selector for testing.
1444%define BS3_SEL_TSS16_SPARE1 0038h ;;< The 16-bit TSS selector for testing.
1445%define BS3_SEL_TSS32 0040h ;;< The 32-bit TSS selector.
1446%define BS3_SEL_TSS32_DF 0048h ;;< The 32-bit TSS selector for double faults.
1447%define BS3_SEL_TSS32_SPARE0 0050h ;;< The 32-bit TSS selector for testing.
1448%define BS3_SEL_TSS32_SPARE1 0058h ;;< The 32-bit TSS selector for testing.
1449%define BS3_SEL_TSS32_IOBP_IRB 0060h ;;< The 32-bit TSS selector with I/O permission and interrupt redirection bitmaps.
1450%define BS3_SEL_TSS32_IRB 0068h ;;< The 32-bit TSS selector with only interrupt redirection bitmap (IOPB stripped by limit).
1451%define BS3_SEL_TSS64 0070h ;;< The 64-bit TSS selector.
1452%define BS3_SEL_TSS64_SPARE0 0080h ;;< The 64-bit TSS selector.
1453%define BS3_SEL_TSS64_SPARE1 0090h ;;< The 64-bit TSS selector.
1454%define BS3_SEL_TSS64_IOBP 00a0h ;;< The 64-bit TSS selector.
1455
1456%define BS3_SEL_X0TEXT16_CS 00e8h ;;< Conforming code selector for accessing the BS3X0TEXT16 segment. Runtime config.
1457%define BS3_SEL_X1TEXT16_CS 00f0h ;;< Conforming code selector for accessing the BS3X0TEXT16 segment. Runtime config.
1458%define BS3_SEL_VMMDEV_MMIO16 00f8h ;;< Selector for accessing the VMMDev MMIO segment at 0100000h from 16-bit code.
1459
1460%define BS3_SEL_RING_SHIFT 8 ;;< For the formula: BS3_SEL_R0_XXX + ((cs & 3) << BS3_SEL_RING_SHIFT)
1461
1462%define BS3_SEL_R0_FIRST 0100h ;;< The first selector in the ring-0 block.
1463%define BS3_SEL_R0_CS16 0100h ;;< ring-0: 16-bit code selector, base 0x10000.
1464%define BS3_SEL_R0_DS16 0108h ;;< ring-0: 16-bit data selector, base 0x23000.
1465%define BS3_SEL_R0_SS16 0110h ;;< ring-0: 16-bit stack selector, base 0x00000.
1466%define BS3_SEL_R0_CS32 0118h ;;< ring-0: 32-bit flat code selector.
1467%define BS3_SEL_R0_DS32 0120h ;;< ring-0: 32-bit flat data selector.
1468%define BS3_SEL_R0_SS32 0128h ;;< ring-0: 32-bit flat stack selector.
1469%define BS3_SEL_R0_CS64 0130h ;;< ring-0: 64-bit flat code selector.
1470%define BS3_SEL_R0_DS64 0138h ;;< ring-0: 64-bit flat data & stack selector.
1471%define BS3_SEL_R0_CS16_EO 0140h ;;< ring-0: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1472%define BS3_SEL_R0_CS16_CNF 0148h ;;< ring-0: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1473%define BS3_SEL_R0_CS16_CNF_EO 0150h ;;< ring-0: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1474%define BS3_SEL_R0_CS32_EO 0158h ;;< ring-0: 32-bit execute-only code selector, not accessed, flat.
1475%define BS3_SEL_R0_CS32_CNF 0160h ;;< ring-0: 32-bit conforming code selector, not accessed, flat.
1476%define BS3_SEL_R0_CS32_CNF_EO 0168h ;;< ring-0: 32-bit execute-only conforming code selector, not accessed, flat.
1477%define BS3_SEL_R0_CS64_EO 0170h ;;< ring-0: 64-bit execute-only code selector, not accessed, flat.
1478%define BS3_SEL_R0_CS64_CNF 0178h ;;< ring-0: 64-bit conforming code selector, not accessed, flat.
1479%define BS3_SEL_R0_CS64_CNF_EO 0180h ;;< ring-0: 64-bit execute-only conforming code selector, not accessed, flat.
1480
1481%define BS3_SEL_R1_FIRST 0200h ;;< The first selector in the ring-1 block.
1482%define BS3_SEL_R1_CS16 0200h ;;< ring-1: 16-bit code selector, base 0x10000.
1483%define BS3_SEL_R1_DS16 0208h ;;< ring-1: 16-bit data selector, base 0x23000.
1484%define BS3_SEL_R1_SS16 0210h ;;< ring-1: 16-bit stack selector, base 0x00000.
1485%define BS3_SEL_R1_CS32 0218h ;;< ring-1: 32-bit flat code selector.
1486%define BS3_SEL_R1_DS32 0220h ;;< ring-1: 32-bit flat data selector.
1487%define BS3_SEL_R1_SS32 0228h ;;< ring-1: 32-bit flat stack selector.
1488%define BS3_SEL_R1_CS64 0230h ;;< ring-1: 64-bit flat code selector.
1489%define BS3_SEL_R1_DS64 0238h ;;< ring-1: 64-bit flat data & stack selector.
1490%define BS3_SEL_R1_CS16_EO 0240h ;;< ring-1: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1491%define BS3_SEL_R1_CS16_CNF 0248h ;;< ring-1: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1492%define BS3_SEL_R1_CS16_CNF_EO 0250h ;;< ring-1: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1493%define BS3_SEL_R1_CS32_EO 0258h ;;< ring-1: 32-bit execute-only code selector, not accessed, flat.
1494%define BS3_SEL_R1_CS32_CNF 0260h ;;< ring-1: 32-bit conforming code selector, not accessed, flat.
1495%define BS3_SEL_R1_CS32_CNF_EO 0268h ;;< ring-1: 32-bit execute-only conforming code selector, not accessed, flat.
1496%define BS3_SEL_R1_CS64_EO 0270h ;;< ring-1: 64-bit execute-only code selector, not accessed, flat.
1497%define BS3_SEL_R1_CS64_CNF 0278h ;;< ring-1: 64-bit conforming code selector, not accessed, flat.
1498%define BS3_SEL_R1_CS64_CNF_EO 0280h ;;< ring-1: 64-bit execute-only conforming code selector, not accessed, flat.
1499
1500%define BS3_SEL_R2_FIRST 0300h ;;< The first selector in the ring-2 block.
1501%define BS3_SEL_R2_CS16 0300h ;;< ring-2: 16-bit code selector, base 0x10000.
1502%define BS3_SEL_R2_DS16 0308h ;;< ring-2: 16-bit data selector, base 0x23000.
1503%define BS3_SEL_R2_SS16 0310h ;;< ring-2: 16-bit stack selector, base 0x00000.
1504%define BS3_SEL_R2_CS32 0318h ;;< ring-2: 32-bit flat code selector.
1505%define BS3_SEL_R2_DS32 0320h ;;< ring-2: 32-bit flat data selector.
1506%define BS3_SEL_R2_SS32 0328h ;;< ring-2: 32-bit flat stack selector.
1507%define BS3_SEL_R2_CS64 0330h ;;< ring-2: 64-bit flat code selector.
1508%define BS3_SEL_R2_DS64 0338h ;;< ring-2: 64-bit flat data & stack selector.
1509%define BS3_SEL_R2_CS16_EO 0340h ;;< ring-2: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1510%define BS3_SEL_R2_CS16_CNF 0348h ;;< ring-2: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1511%define BS3_SEL_R2_CS16_CNF_EO 0350h ;;< ring-2: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1512%define BS3_SEL_R2_CS32_EO 0358h ;;< ring-2: 32-bit execute-only code selector, not accessed, flat.
1513%define BS3_SEL_R2_CS32_CNF 0360h ;;< ring-2: 32-bit conforming code selector, not accessed, flat.
1514%define BS3_SEL_R2_CS32_CNF_EO 0368h ;;< ring-2: 32-bit execute-only conforming code selector, not accessed, flat.
1515%define BS3_SEL_R2_CS64_EO 0370h ;;< ring-2: 64-bit execute-only code selector, not accessed, flat.
1516%define BS3_SEL_R2_CS64_CNF 0378h ;;< ring-2: 64-bit conforming code selector, not accessed, flat.
1517%define BS3_SEL_R2_CS64_CNF_EO 0380h ;;< ring-2: 64-bit execute-only conforming code selector, not accessed, flat.
1518
1519%define BS3_SEL_R3_FIRST 0400h ;;< The first selector in the ring-3 block.
1520%define BS3_SEL_R3_CS16 0400h ;;< ring-3: 16-bit code selector, base 0x10000.
1521%define BS3_SEL_R3_DS16 0408h ;;< ring-3: 16-bit data selector, base 0x23000.
1522%define BS3_SEL_R3_SS16 0410h ;;< ring-3: 16-bit stack selector, base 0x00000.
1523%define BS3_SEL_R3_CS32 0418h ;;< ring-3: 32-bit flat code selector.
1524%define BS3_SEL_R3_DS32 0420h ;;< ring-3: 32-bit flat data selector.
1525%define BS3_SEL_R3_SS32 0428h ;;< ring-3: 32-bit flat stack selector.
1526%define BS3_SEL_R3_CS64 0430h ;;< ring-3: 64-bit flat code selector.
1527%define BS3_SEL_R3_DS64 0438h ;;< ring-3: 64-bit flat data & stack selector.
1528%define BS3_SEL_R3_CS16_EO 0440h ;;< ring-3: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1529%define BS3_SEL_R3_CS16_CNF 0448h ;;< ring-3: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1530%define BS3_SEL_R3_CS16_CNF_EO 0450h ;;< ring-3: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1531%define BS3_SEL_R3_CS32_EO 0458h ;;< ring-3: 32-bit execute-only code selector, not accessed, flat.
1532%define BS3_SEL_R3_CS32_CNF 0460h ;;< ring-3: 32-bit conforming code selector, not accessed, flat.
1533%define BS3_SEL_R3_CS32_CNF_EO 0468h ;;< ring-3: 32-bit execute-only conforming code selector, not accessed, flat.
1534%define BS3_SEL_R3_CS64_EO 0470h ;;< ring-3: 64-bit execute-only code selector, not accessed, flat.
1535%define BS3_SEL_R3_CS64_CNF 0478h ;;< ring-3: 64-bit conforming code selector, not accessed, flat.
1536%define BS3_SEL_R3_CS64_CNF_EO 0480h ;;< ring-3: 64-bit execute-only conforming code selector, not accessed, flat.
1537
1538%define BS3_SEL_SPARE_FIRST 0500h ;;< The first selector in the spare block
1539%define BS3_SEL_SPARE_00 0500h ;;< Spare selector number 00h.
1540%define BS3_SEL_SPARE_01 0508h ;;< Spare selector number 01h.
1541%define BS3_SEL_SPARE_02 0510h ;;< Spare selector number 02h.
1542%define BS3_SEL_SPARE_03 0518h ;;< Spare selector number 03h.
1543%define BS3_SEL_SPARE_04 0520h ;;< Spare selector number 04h.
1544%define BS3_SEL_SPARE_05 0528h ;;< Spare selector number 05h.
1545%define BS3_SEL_SPARE_06 0530h ;;< Spare selector number 06h.
1546%define BS3_SEL_SPARE_07 0538h ;;< Spare selector number 07h.
1547%define BS3_SEL_SPARE_08 0540h ;;< Spare selector number 08h.
1548%define BS3_SEL_SPARE_09 0548h ;;< Spare selector number 09h.
1549%define BS3_SEL_SPARE_0a 0550h ;;< Spare selector number 0ah.
1550%define BS3_SEL_SPARE_0b 0558h ;;< Spare selector number 0bh.
1551%define BS3_SEL_SPARE_0c 0560h ;;< Spare selector number 0ch.
1552%define BS3_SEL_SPARE_0d 0568h ;;< Spare selector number 0dh.
1553%define BS3_SEL_SPARE_0e 0570h ;;< Spare selector number 0eh.
1554%define BS3_SEL_SPARE_0f 0578h ;;< Spare selector number 0fh.
1555%define BS3_SEL_SPARE_10 0580h ;;< Spare selector number 10h.
1556%define BS3_SEL_SPARE_11 0588h ;;< Spare selector number 11h.
1557%define BS3_SEL_SPARE_12 0590h ;;< Spare selector number 12h.
1558%define BS3_SEL_SPARE_13 0598h ;;< Spare selector number 13h.
1559%define BS3_SEL_SPARE_14 05a0h ;;< Spare selector number 14h.
1560%define BS3_SEL_SPARE_15 05a8h ;;< Spare selector number 15h.
1561%define BS3_SEL_SPARE_16 05b0h ;;< Spare selector number 16h.
1562%define BS3_SEL_SPARE_17 05b8h ;;< Spare selector number 17h.
1563%define BS3_SEL_SPARE_18 05c0h ;;< Spare selector number 18h.
1564%define BS3_SEL_SPARE_19 05c8h ;;< Spare selector number 19h.
1565%define BS3_SEL_SPARE_1a 05d0h ;;< Spare selector number 1ah.
1566%define BS3_SEL_SPARE_1b 05d8h ;;< Spare selector number 1bh.
1567%define BS3_SEL_SPARE_1c 05e0h ;;< Spare selector number 1ch.
1568%define BS3_SEL_SPARE_1d 05e8h ;;< Spare selector number 1dh.
1569%define BS3_SEL_SPARE_1e 05f0h ;;< Spare selector number 1eh.
1570%define BS3_SEL_SPARE_1f 05f8h ;;< Spare selector number 1fh.
1571
1572%define BS3_SEL_TILED 0600h ;;< 16-bit data tiling: First - base=0x00000000, limit=64KB, DPL=3.
1573%define BS3_SEL_TILED_LAST 0df8h ;;< 16-bit data tiling: Last - base=0x00ff0000, limit=64KB, DPL=3.
1574%define BS3_SEL_TILED_AREA_SIZE 001000000h ;;< 16-bit data tiling: Size of addressable area, in bytes. (16 MB)
1575
1576%define BS3_SEL_FREE_PART1 0e00h ;;< Free selector space - part \%1.
1577%define BS3_SEL_FREE_PART1_LAST 0ff8h ;;< Free selector space - part \%1, last entry.
1578
1579%define BS3_SEL_TEXT16 1000h ;;< The BS3TEXT16 selector.
1580
1581%define BS3_SEL_FREE_PART2 1008h ;;< Free selector space - part \#2.
1582%define BS3_SEL_FREE_PART2_LAST 17f8h ;;< Free selector space - part \#2, last entry.
1583
1584%define BS3_SEL_TILED_R0 1800h ;;< 16-bit data/stack tiling: First - base=0x00000000, limit=64KB, DPL=0.
1585%define BS3_SEL_TILED_R0_LAST 1ff8h ;;< 16-bit data/stack tiling: Last - base=0x00ff0000, limit=64KB, DPL=0.
1586
1587%define BS3_SEL_SYSTEM16 2000h ;;< The BS3SYSTEM16 selector.
1588
1589%define BS3_SEL_FREE_PART3 2008h ;;< Free selector space - part \%3.
1590%define BS3_SEL_FREE_PART3_LAST 28f8h ;;< Free selector space - part \%3, last entry.
1591
1592%define BS3_SEL_DATA16 2900h ;;< The BS3DATA16/BS3KIT_GRPNM_DATA16 selector.
1593
1594%define BS3_SEL_FREE_PART4 2908h ;;< Free selector space - part \#4.
1595%define BS3_SEL_FREE_PART4_LAST 2f98h ;;< Free selector space - part \#4, last entry.
1596
1597%define BS3_SEL_PRE_TEST_PAGE_08 2fa0h ;;< Selector located 8 selectors before the test page.
1598%define BS3_SEL_PRE_TEST_PAGE_07 2fa8h ;;< Selector located 7 selectors before the test page.
1599%define BS3_SEL_PRE_TEST_PAGE_06 2fb0h ;;< Selector located 6 selectors before the test page.
1600%define BS3_SEL_PRE_TEST_PAGE_05 2fb8h ;;< Selector located 5 selectors before the test page.
1601%define BS3_SEL_PRE_TEST_PAGE_04 2fc0h ;;< Selector located 4 selectors before the test page.
1602%define BS3_SEL_PRE_TEST_PAGE_03 2fc8h ;;< Selector located 3 selectors before the test page.
1603%define BS3_SEL_PRE_TEST_PAGE_02 2fd0h ;;< Selector located 2 selectors before the test page.
1604%define BS3_SEL_PRE_TEST_PAGE_01 2fd8h ;;< Selector located 1 selector before the test page.
1605%define BS3_SEL_TEST_PAGE 2fe0h ;;< Start of the test page intended for playing around with paging and GDT.
1606%define BS3_SEL_TEST_PAGE_00 2fe0h ;;< Test page selector number 00h (convenience).
1607%define BS3_SEL_TEST_PAGE_01 2fe8h ;;< Test page selector number 01h (convenience).
1608%define BS3_SEL_TEST_PAGE_02 2ff0h ;;< Test page selector number 02h (convenience).
1609%define BS3_SEL_TEST_PAGE_03 2ff8h ;;< Test page selector number 03h (convenience).
1610%define BS3_SEL_TEST_PAGE_04 3000h ;;< Test page selector number 04h (convenience).
1611%define BS3_SEL_TEST_PAGE_05 3008h ;;< Test page selector number 05h (convenience).
1612%define BS3_SEL_TEST_PAGE_06 3010h ;;< Test page selector number 06h (convenience).
1613%define BS3_SEL_TEST_PAGE_07 3018h ;;< Test page selector number 07h (convenience).
1614%define BS3_SEL_TEST_PAGE_LAST 3fd0h ;;< The last selector in the spare page.
1615
1616%define BS3_SEL_GDT_LIMIT 3fd8h ;;< The GDT limit.
1617
1618;; @}
1619
1620
1621;
1622; Sanity checks.
1623;
1624%if BS3_ADDR_BS3TEXT16 != BS3_ADDR_LOAD
1625 %error "BS3_ADDR_BS3TEXT16 and BS3_ADDR_LOAD are out of sync"
1626%endif
1627%if (BS3_ADDR_BS3TEXT16 / 16) != BS3_SEL_TEXT16
1628 %error "BS3_ADDR_BS3TEXT16 and BS3_SEL_TEXT16 are out of sync"
1629%endif
1630%if (BS3_ADDR_BS3DATA16 / 16) != BS3_SEL_DATA16
1631 %error "BS3_ADDR_BS3DATA16 and BS3_SEL_DATA16 are out of sync"
1632%endif
1633%if (BS3_ADDR_BS3SYSTEM16 / 16) != BS3_SEL_SYSTEM16
1634 %error "BS3_ADDR_BS3SYSTEM16 and BS3_SEL_SYSTEM16 are out of sync"
1635%endif
1636
1637
1638;; @name BS3CPU_XXX - Bs3CpuDetect_mmm return value and g_bBs3CpuDetected.
1639;; @{
1640%define BS3CPU_8086 0x0001
1641%define BS3CPU_V20 0x0002
1642%define BS3CPU_80186 0x0003
1643%define BS3CPU_80286 0x0004
1644%define BS3CPU_80386 0x0005
1645%define BS3CPU_80486 0x0006
1646%define BS3CPU_Pentium 0x0007
1647%define BS3CPU_PPro 0x0008
1648%define BS3CPU_PProOrNewer 0x0009
1649%define BS3CPU_TYPE_MASK 0x00ff
1650%define BS3CPU_F_CPUID 0x0100
1651%define BS3CPU_F_CPUID_EXT_LEAVES 0x0200
1652%define BS3CPU_F_PAE 0x0400
1653%define BS3CPU_F_PAE_BIT 10
1654%define BS3CPU_F_PSE 0x0800
1655%define BS3CPU_F_PSE_BIT 11
1656%define BS3CPU_F_LONG_MODE 0x1000
1657;; @}
1658
1659
1660%endif
1661
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