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1; $Id: bs3kit.mac 60676 2016-04-24 11:04:57Z vboxsync $
2;; @file
3; BS3Kit - structures, symbols, macros and stuff.
4;
5
6;
7; Copyright (C) 2007-2015 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17; The contents of this file may alternatively be used under the terms
18; of the Common Development and Distribution License Version 1.0
19; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20; VirtualBox OSE distribution, in which case the provisions of the
21; CDDL are applicable instead of those of the GPL.
22;
23; You may elect to license modified versions of this file under the
24; terms and conditions of either the GPL or the CDDL or both.
25;
26
27%ifndef ___bs3kit_mac___
28%define ___bs3kit_mac___
29
30;
31; Before we can include anything, we need to override NAME and switch section.
32; If we don't do the latter we end up with an unused 'text' section.
33;
34
35; Drop the asmdefs-first.mac header for native bs3kit files.
36%undef RT_ASMDEFS_INC_FIRST_FILE
37
38;;
39; Macro for setting register aliases according to the bit count given by %1.
40;
41%macro BS3_SET_REG_ALIASES 1
42 ;
43 ; Register aliases.
44 ;
45 %if %1 == 64
46 %define xCB 8
47 %define xDEF dq
48 %define xRES resq
49 %define xPRE qword
50 %define xSP rsp
51 %define xBP rbp
52 %define xAX rax
53 %define xBX rbx
54 %define xCX rcx
55 %define xDX rdx
56 %define xDI rdi
57 %define xSI rsi
58 %define xWrtRIP wrt rip
59 %define xPUSHF pushfq
60 %define xPOPF popfq
61 %define xRETF o64 retf
62 %elif %1 == 32
63 %define xCB 4
64 %define xDEF dd
65 %define xRES resd
66 %define xPRE dword
67 %define xSP esp
68 %define xBP ebp
69 %define xAX eax
70 %define xBX ebx
71 %define xCX ecx
72 %define xDX edx
73 %define xDI edi
74 %define xSI esi
75 %define xWrtRIP
76 %define xPUSHF pushfd
77 %define xPOPF popfd
78 %define xRETF retf
79 %elif %1 == 16
80 %define xCB 2
81 %define xDEF dw
82 %define xRES resw
83 %define xPRE word
84 %define xSP sp
85 %define xBP bp
86 %define xAX ax
87 %define xBX bx
88 %define xCX cx
89 %define xDX dx
90 %define xDI di
91 %define xSI si
92 %define xWrtRIP
93 %define xPUSHF pushf
94 %define xPOPF popf
95 %define xRETF retf
96 %else
97 %error "Invalid BS3_SET_REG_ALIASES argument:" %1
98 %endif
99
100
101 ;
102 ; Register names corresponding to the max size for pop/push <reg>.
103 ;
104 ; 16-bit can push both 32-bit and 16-bit registers. This 's' prefixed variant
105 ; is used when 16-bit should use the 32-bit register.
106 ;
107 %if %1 == 64
108 %define sCB 8
109 %define sDEF dq
110 %define sRES resq
111 %define sPRE qword
112 %define sSP rsp
113 %define sBP rbp
114 %define sAX rax
115 %define sBX rbx
116 %define sCX rcx
117 %define sDX rdx
118 %define sDI rdi
119 %define sSI rsi
120 %define sPUSHF pushfq
121 %define sPOPF popfq
122 %else
123 %define sCB 4
124 %define sDEF dd
125 %define sRES resd
126 %define sPRE dword
127 %define sSP esp
128 %define sBP ebp
129 %define sAX eax
130 %define sBX ebx
131 %define sCX ecx
132 %define sDX edx
133 %define sDI edi
134 %define sSI esi
135 %define sPUSHF pushfd
136 %define sPOPF popfd
137 %endif
138%endmacro
139
140;;
141; Redefines macros that follows __BITS__.
142%macro BS3_SET_BITS_MACROS 1
143 ;; Emulate the __BITS__ macro in NASM 2.0+. Follows BS3_SET_BITS.
144 %ifdef __YASM__
145 %undef __BITS__
146 %define __BITS__ %1
147 %endif
148
149 ;; Mostly internal macro. Follows BS3_SET_BITS.
150 %undef BS3_NAME_UNDERSCORE
151 %define BS3_NAME_UNDERSCORE _
152
153 ;; For segment overrides and stuff. Follows BS3_SET_BITS.
154 %undef BS3_ONLY_16BIT
155 %if %1 == 16
156 %define BS3_ONLY_16BIT(a_Expr) a_Expr
157 %else
158 %define BS3_ONLY_16BIT(a_Expr)
159 %endif
160
161 ;; For odd 64-bit stuff. Follows BS3_SET_BITS.
162 %undef BS3_ONLY_64BIT
163 %if %1 == 64
164 %define BS3_ONLY_64BIT(a_Expr) a_Expr
165 %else
166 %define BS3_ONLY_64BIT(a_Expr)
167 %endif
168
169 ;; For segment overrides and stuff. Follows BS3_SET_BITS.
170 %undef BS3_NOT_64BIT
171 %if %1 == 64
172 %define BS3_NOT_64BIT(a_Expr)
173 %else
174 %define BS3_NOT_64BIT(a_Expr) a_Expr
175 %endif
176
177 ;; For stack cleanups and similar where each bit mode is different. Follows BS3_SET_BITS.
178 %undef BS3_IF_16_32_64BIT
179 %if %1 == 16
180 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_16BitExpr
181 %elif %1 == 32
182 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_32BitExpr
183 %else
184 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_64BitExpr
185 %endif
186
187 ;; For RIP relative addressing in 64-bit mode and absolute addressing in
188 ; other modes. Follows BS3_SET_BITS.
189 %undef BS3_WRT_RIP
190 %if %1 == 64
191 %define BS3_WRT_RIP(a_Sym) rel a_Sym
192 %else
193 %define BS3_WRT_RIP(a_Sym) a_Sym
194 %endif
195
196 %undef BS3_LEA_MOV_WRT_RIP
197 %if %1 == 64
198 %define BS3_LEA_MOV_WRT_RIP(a_DstReg, a_Sym) lea a_DstReg, [BS3_WRT_RIP(a_Sym)]
199 %else
200 %define BS3_LEA_MOV_WRT_RIP(a_DstReg, a_Sym) mov a_DstReg, a_Sym
201 %endif
202
203 ;; @def BS3_DATA16_WRT
204 ; For accessing BS3DATA16 correctly.
205 ; @param a_Var The BS3DATA16 variable.
206 %undef BS3_DATA16_WRT
207 %if %1 == 16
208 %define BS3_DATA16_WRT(a_Var) a_Var wrt BS3KIT_GRPNM_DATA16
209 %elif %1 == 32
210 %define BS3_DATA16_WRT(a_Var) a_Var wrt FLAT
211 %else
212 %define BS3_DATA16_WRT(a_Var) BS3_WRT_RIP(a_Var) wrt FLAT
213 %endif
214
215 %undef BS3_IF_16BIT_OTHERWISE
216 %if %1 == 16
217 %define BS3_IF_16BIT_OTHERWISE(a_16BitExpr, a_OtherwiseExpr) a_16BitExpr
218 %else
219 %define BS3_IF_16BIT_OTHERWISE(a_16BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
220 %endif
221
222 %undef BS3_IF_32BIT_OTHERWISE
223 %if %1 == 32
224 %define BS3_IF_32BIT_OTHERWISE(a_32BitExpr, a_OtherwiseExpr) a_32BitExpr
225 %else
226 %define BS3_IF_32BIT_OTHERWISE(a_32BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
227 %endif
228
229 %undef BS3_IF_64BIT_OTHERWISE
230 %if %1 == 32
231 %define BS3_IF_64BIT_OTHERWISE(a_64BitExpr, a_OtherwiseExpr) a_32BitExpr
232 %else
233 %define BS3_IF_64BIT_OTHERWISE(a_64BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
234 %endif
235
236 ;;
237 ; Same as BS3_CMN_NM except in 16-bit mode, it will generate the far name.
238 ; (16-bit code generally have both near and far callable symbols, so we won't
239 ; be restricted to 64KB test code.)
240 %if %1 == 16
241 %define BS3_CMN_NM_FAR(a_Name) BS3_NAME_UNDERSCORE %+ a_Name %+ _f %+ __BITS__
242 %else
243 %define BS3_CMN_NM_FAR(a_Name) BS3_CMN_NM(a_Name)
244 %endif
245
246%endmacro
247
248; Default to register aliases for ARCH_BITS.
249BS3_SET_REG_ALIASES ARCH_BITS
250
251; Define macros for ARCH_BITS.
252BS3_SET_BITS_MACROS ARCH_BITS
253
254
255;; Wrapper around BITS.
256; Updates __BITS__ (built-in variable in nasm, we work it for yasm) as well
257; a number of convenient macros and register aliases.
258;
259; @param %1 The CPU bit count: 16, 32 or 64
260; @remarks ARCH_BITS is not modified and will remain what it was on the
261; assembler command line.
262%macro BS3_SET_BITS 1
263 BITS %1
264 BS3_SET_BITS_MACROS %1
265 BS3_SET_REG_ALIASES %1
266%endmacro
267
268;;
269; For instruction that should only be emitted in 16-bit mode. Follows BS3_SET_BITS.
270; BONLY16 normally goes in column 1.
271%macro BONLY16 1+
272 %if __BITS__ == 16
273 %1
274 %endif
275%endmacro
276
277;;
278; For instruction that should only be emitted in 32-bit mode. Follows BS3_SET_BITS.
279; BONLY32 normally goes in column 1.
280%macro BONLY32 1+
281 %if __BITS__ == 32
282 %1
283 %endif
284%endmacro
285
286;;
287; For instruction that should only be emitted in 64-bit mode. Follows BS3_SET_BITS.
288; BONLY64 normally goes in column 1.
289%macro BONLY64 1+
290 %if __BITS__ == 64
291 %1
292 %endif
293%endmacro
294
295
296
297;; @name Segment definitions.
298;; @{
299
300%ifndef ASM_FORMAT_BIN
301; !!HACK ALERT!!
302;
303; To make FLAT actually be flat, i.e. have a base of 0 rather than the same as
304; the target (?) segment, we tweak it a little bit here. We associate a segment
305; with it so that we can get at it in the class/segment ordering directives
306; we pass to the linker. The segment does not contain any data or anything, it
307; is just an empty one which we assign the address of zero.
308;
309; Look for 'clname BS3FLAT segaddr=0x0000' and 'segment BS3FLAT segaddr=0x0000'
310; in the makefile.
311;
312; !!HACK ALERT!!
313segment BS3FLAT use32 class=BS3FLAT
314GROUP FLAT BS3FLAT
315%endif
316
317
318%macro BS3_BEGIN_TEXT16 0-1 2
319 %ifndef BS3_BEGIN_TEXT16_NOT_FIRST
320 %define BS3_BEGIN_TEXT16_NOT_FIRST
321 section BS3TEXT16 align=%1 CLASS=BS3CLASS16CODE PUBLIC USE16
322 %ifndef BS3_BEGIN_TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
323 %ifndef BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
324 %define BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
325 section BS3TEXT16_NEARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
326 %endif
327 %ifndef BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
328 %define BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
329 section BS3TEXT16_FARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
330 %endif
331 GROUP CGROUP16 BS3TEXT16 BS3TEXT16_NEARSTUBS BS3TEXT16_FARSTUBS
332 section BS3TEXT16
333 %endif
334 %else
335 section BS3TEXT16
336 %endif
337 %undef BS3_CUR_SEG_BEGIN_MACRO
338 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16
339 BS3_SET_BITS 16
340%endmacro
341
342%macro BS3_BEGIN_TEXT16_NEARSTUBS 0
343 %ifndef BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
344 %define BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
345 section BS3TEXT16_NEARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
346 %else
347 section BS3TEXT16_NEARSTUBS
348 %endif
349 %undef BS3_CUR_SEG_BEGIN_MACRO
350 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16_NEARSTUBS
351 BS3_SET_BITS 16
352%endmacro
353
354%macro BS3_BEGIN_TEXT16_FARSTUBS 0
355 %ifndef BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
356 %define BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
357 section BS3TEXT16_FARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
358 %else
359 section BS3TEXT16_FARSTUBS
360 %endif
361 %undef BS3_CUR_SEG_BEGIN_MACRO
362 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16_FARSTUBS
363 BS3_SET_BITS 16
364%endmacro
365
366%macro BS3_BEGIN_RMTEXT16 0-1 2
367 %ifndef BS3_BEGIN_RMTEXT16_NOT_FIRST
368 %define BS3_BEGIN_RMTEXT16_NOT_FIRST
369 section BS3RMTEXT16 align=%1 CLASS=BS3CLASS16RMCODE PUBLIC USE16
370 %ifndef BS3_BEGIN_RMTEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
371 GROUP BS3GROUPRMTEXT16 BS3RMTEXT16
372 %endif
373 %else
374 section BS3RMTEXT16
375 %endif
376 %undef BS3_CUR_SEG_BEGIN_MACRO
377 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_RMTEXT16
378 BS3_SET_BITS 16
379%endmacro
380
381%macro BS3_BEGIN_X0TEXT16 0-1 2
382 %ifndef BS3_BEGIN_X0TEXT16_NOT_FIRST
383 %define BS3_BEGIN_X0TEXT16_NOT_FIRST
384 section BS3X0TEXT16 align=%1 CLASS=BS3CLASS16X0CODE PUBLIC USE16
385 %ifndef BS3_BEGIN_X0TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
386 GROUP BS3GROUPX0TEXT16 BS3X0TEXT16
387 %endif
388 %else
389 section BS3X0TEXT16
390 %endif
391 %undef BS3_CUR_SEG_BEGIN_MACRO
392 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_X0TEXT16
393 BS3_SET_BITS 16
394%endmacro
395
396%macro BS3_BEGIN_X1TEXT16 0-1 2
397 %ifndef BS3_BEGIN_X1TEXT16_NOT_FIRST
398 %define BS3_BEGIN_X1TEXT16_NOT_FIRST
399 section BS3X1TEXT16 align=%1 CLASS=BS3CLASS16X1CODE PUBLIC USE16
400 %ifndef BS3_BEGIN_X1TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
401 GROUP BS3GROUPX1TEXT16 BS3X1TEXT16
402 %endif
403 %else
404 section BS3X1TEXT16
405 %endif
406 %undef BS3_CUR_SEG_BEGIN_MACRO
407 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_X1TEXT16
408 BS3_SET_BITS 16
409%endmacro
410
411
412%macro BS3_BEGIN_DATA16 0-1 2
413 %ifndef BS3_BEGIN_DATA16_NOT_FIRST
414 %define BS3_BEGIN_DATA16_NOT_FIRST
415 section BS3DATA16 align=%1 CLASS=BS3KIT_CLASS_DATA16 PUBLIC USE16
416 %ifndef BS3_BEGIN_DATA16_WITHOUT_GROUP ; bs3-first-common.mac trick.
417 GROUP BS3KIT_GRPNM_DATA16 BS3DATA16
418 %endif
419 %else
420 section BS3DATA16
421 %endif
422 %undef BS3_CUR_SEG_BEGIN_MACRO
423 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA16
424 BS3_SET_BITS 16
425%endmacro
426
427%macro BS3_BEGIN_TEXT32 0-1 2
428 %ifndef BS3_BEGIN_TEXT32_NOT_FIRST
429 %define BS3_BEGIN_TEXT32_NOT_FIRST
430 section BS3TEXT32 align=%1 CLASS=BS3CLASS32CODE PUBLIC USE32 FLAT
431 %else
432 section BS3TEXT32
433 %endif
434 %undef BS3_CUR_SEG_BEGIN_MACRO
435 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT32
436 BS3_SET_BITS 32
437%endmacro
438
439%macro BS3_BEGIN_DATA32 0-1 16
440 %ifndef BS3_BEGIN_DATA32_NOT_FIRST
441 %define BS3_BEGIN_DATA32_NOT_FIRST
442 section BS3DATA32 align=%1 CLASS=FAR_DATA PUBLIC USE32 ;FLAT - compiler doesn't make data flat.
443 %else
444 section BS3DATA32
445 %endif
446 %undef BS3_CUR_SEG_BEGIN_MACRO
447 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA32
448 BS3_SET_BITS 32
449%endmacro
450
451%macro BS3_BEGIN_TEXT64 0-1 2
452 %ifndef BS3_BEGIN_TEXT64_NOT_FIRST
453 %define BS3_BEGIN_TEXT64_NOT_FIRST
454 section BS3TEXT64 align=%1 CLASS=BS3CLASS64CODE PUBLIC USE32 FLAT
455 %else
456 section BS3TEXT64
457 %endif
458 %undef BS3_CUR_SEG_BEGIN_MACRO
459 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT64
460 BS3_SET_BITS 64
461%endmacro
462
463%macro BS3_BEGIN_DATA64 0-1 16
464 %ifndef BS3_BEGIN_DATA64_NOT_FIRST
465 %define BS3_BEGIN_DATA64_NOT_FIRST
466 section BS3DATA64 align=%1 CLASS=FAR_DATA PUBLIC USE32 ;FLAT (see DATA32)
467 %else
468 section BS3DATA64
469 %endif
470 %undef BS3_CUR_SEG_BEGIN_MACRO
471 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA64
472 BS3_SET_BITS 64
473%endmacro
474
475;; The system data segment containing the GDT, TSSes and IDTs.
476%macro BS3_BEGIN_SYSTEM16 0-1 16
477 %ifndef BS3_BEGIN_SYSTEM16_NOT_FIRST
478 %define BS3_BEGIN_SYSTEM16_NOT_FIRST
479 section BS3SYSTEM16 align=%1 CLASS=BS3SYSTEM16 PUBLIC USE16
480 %else
481 section BS3SYSTEM16
482 %endif
483 %undef BS3_CUR_SEG_BEGIN_MACRO
484 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_SYSTEM16
485 BS3_SET_BITS 16
486%endmacro
487
488;; Default text section.
489%macro BS3_BEGIN_DEFAULT_TEXT 0
490 %if ARCH_BITS == 16
491 BS3_BEGIN_TEXT16
492 %elif ARCH_BITS == 32
493 BS3_BEGIN_TEXT32
494 %elif ARCH_BITS == 64
495 BS3_BEGIN_TEXT64
496 %else
497 %error "ARCH_BITS must be defined as either 16, 32, or 64!"
498 INVALID_ARCH_BITS
499 %endif
500%endmacro
501
502;; @}
503
504
505;
506; Now, ditch the default 'text' section and define our own NAME macro.
507;
508%ifndef ASM_FORMAT_BIN
509 BS3_BEGIN_DEFAULT_TEXT
510 BS3_BEGIN_DEFAULT_TEXT ; stupid nasm automagically repeats the segment attributes.
511%endif
512
513;; When using watcom + OMF, we're using __cdecl by default, which
514; get an underscore added in front.
515%define NAME(name) _ %+ NAME_OVERLOAD(name)
516
517
518;
519; Include the standard headers from iprt.
520;
521
522
523%include "iprt/asmdefs.mac"
524%include "iprt/x86.mac"
525
526
527;;
528; Extern macro which mangles the name using NAME().
529%macro EXTERN 1
530 extern NAME(%1)
531%endmacro
532
533;;
534; Mangles a common name according to the current cpu bit count.
535; @remarks Requires the use of the BS3_SET_BITS macro instead of the BITS directive.
536%define BS3_CMN_NM(a_Name) BS3_NAME_UNDERSCORE %+ a_Name %+ _c %+ __BITS__
537
538;;
539; Extern macro which mangles the common name correctly, redefining the unmangled
540; name to the mangled one for ease of use.
541;
542; @param %1 The unmangled common name.
543;
544; @remarks Must enter the segment in which this name is defined.
545;
546%macro BS3_EXTERN_CMN 1
547 extern BS3_CMN_NM(%1)
548 %undef %1
549 %define %1 BS3_CMN_NM(%1)
550%endmacro
551
552;;
553; Same as BS3_EXTERN_CMN except it picks the far variant in 16-bit code.
554;
555; @param %1 The unmangled common name.
556;
557; @remarks Must enter the segment in which this name is defined.
558;
559%macro BS3_EXTERN_CMN_FAR 1
560 extern BS3_CMN_NM_FAR(%1)
561 %undef %1
562 %define %1 BS3_CMN_NM_FAR(%1)
563%endmacro
564
565;; @def BS3_EXTERN_TMPL
566; Mangles the given name into a template specific one. For ease of use, the
567; name is redefined to the mangled one, just like BS3_EXTERN_CMN does.
568; @note Segment does not change.
569%macro BS3_EXTERN_TMPL 1
570 extern TMPL_NM(%1)
571 %undef %1
572 %define %1 TMPL_NM(%1)
573%endmacro
574
575
576;;
577; Mangles a 16-bit and 32-bit accessible data name.
578; @remarks Requires the use of the BS3_SET_BITS macro instead of the BITS directive.
579%define BS3_DATA_NM(a_Name) _ %+ a_Name
580
581;;
582; Extern macro which mangles a DATA16 symbol correctly, redefining the
583; unmangled name to the mangled one for ease of use.
584;
585; @param %1 The unmangled common name.
586;
587; @remarks Will change to the DATA16 segment, use must switch back afterwards!
588;
589%macro BS3_EXTERN_DATA16 1
590 BS3_BEGIN_DATA16
591 extern _ %+ %1
592 %undef %1
593 %define %1 _ %+ %1
594%endmacro
595
596;;
597; Extern macro which mangles a BS3SYSTEM16 symbol correctly, redefining the
598; unmangled name to the mangled one for ease of use.
599;
600; @param %1 The unmangled common name.
601;
602; @remarks Will change to the SYSTEM16 segment, use must switch back afterwards!
603;
604%macro BS3_EXTERN_SYSTEM16 1
605 BS3_BEGIN_SYSTEM16
606 extern _ %+ %1
607 %undef %1
608 %define %1 _ %+ %1
609%endmacro
610
611
612;;
613; Global name with ELF attributes and size.
614;
615; This differs from GLOBALNAME_EX in that it expects a mangled symbol name,
616; and allows for nasm style symbol size expressions.
617;
618; @param %1 The mangled name.
619; @param %2 Symbol attributes.
620; @param %3 The size expression.
621;
622%macro BS3_GLOBAL_NAME_EX 3
623global %1
624%1:
625%endmacro
626
627;;
628; Global data unmangled label.
629;
630; @param %1 The unmangled name.
631; @param %2 The size (0 is fine).
632;
633%macro BS3_GLOBAL_DATA 2
634BS3_GLOBAL_NAME_EX BS3_DATA_NM(%1), , %2
635%endmacro
636
637;;
638; Starts a procedure.
639;
640; This differs from BEGINPROC in that it expects a mangled symbol name and
641; does the NASM symbol size stuff.
642;
643; @param %1 The mangled name.
644;
645%macro BS3_PROC_BEGIN 1
646BS3_GLOBAL_NAME_EX %1, function, (%1 %+ _EndProc - %1)
647%endmacro
648
649;;
650; Ends a procedure.
651;
652; Counter part to BS3_PROC_BEGIN.
653;
654; @param %1 The mangled name.
655;
656%macro BS3_PROC_END 1
657BS3_GLOBAL_NAME_EX %1 %+ _EndProc, function hidden, (%1 %+ _EndProc - %1)
658 int3 ; handy and avoids overlapping labels.
659%endmacro
660
661
662;; @name BS3_PBC_XXX - For use as the 2nd parameter to BS3_PROC_BEGIN_CMN and BS3_PROC_BEGIN_MODE.
663;; @{
664%define BS3_PBC_NEAR 1 ;;< Only near.
665%define BS3_PBC_FAR 2 ;;< Only far.
666%define BS3_PBC_HYBRID 3 ;;< Hybrid near/far procedure, trashing AX
667%define BS3_PBC_HYBRID_SAFE 4 ;;< Hybrid near/far procedure, no trashing but slower.
668%define BS3_PBC_HYBRID_0_ARGS 5 ;;< Hybrid near/far procedure, no parameters so separate far stub, no trashing, fast near calls.
669;; @}
670
671;; Internal begin procedure macro.
672;
673; @param 1 The near name.
674; @param 2 The far name
675; @param 3 BS3_PBC_XXX.
676%macro BS3_PROC_BEGIN_INT 3
677 ;%warning "BS3_PROC_BEGIN_INT:" 1=%1 2=%2 3=%3
678 %undef BS3_CUR_PROC_FLAGS
679 %if __BITS__ == 16
680 %if %3 == BS3_PBC_NEAR
681 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
682 %xdefine cbCurRetAddr 2
683 BS3_PROC_BEGIN %1
684
685 %elif %3 == BS3_PBC_FAR
686 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_FAR
687 %xdefine cbCurRetAddr 4
688 BS3_PROC_BEGIN %2
689
690 %elif %3 == BS3_PBC_HYBRID
691 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_HYBRID
692 %xdefine cbCurRetAddr 4
693 BS3_GLOBAL_NAME_EX %1, function, 3
694 pop ax
695 push cs
696 push ax
697 BS3_PROC_BEGIN %2
698
699 %elif %3 == BS3_PBC_HYBRID_SAFE
700 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_HYBRID_SAFE
701 %xdefine cbCurRetAddr 4
702 BS3_GLOBAL_NAME_EX %1, function, 3
703 extern Bs3CreateHybridFarRet_c16
704 call Bs3CreateHybridFarRet_c16
705 BS3_PROC_BEGIN %2
706
707 %elif %3 == BS3_PBC_HYBRID_0_ARGS
708 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
709 %xdefine cbCurRetAddr 2
710 %xdefine TMP_BEGIN_PREV_SEG BS3_CUR_SEG_BEGIN_MACRO
711
712 BS3_BEGIN_TEXT16_FARSTUBS
713 BS3_PROC_BEGIN %2
714 call %1
715 retf
716 BS3_PROC_END %2
717
718 TMP_BEGIN_PREV_SEG
719 BS3_PROC_BEGIN %1
720 %undef TMP_BEGIN_PREV_SEG
721
722 %else
723 %error BS3_PROC_BEGIN_CMN parameter 2 value %3 is not recognized.
724
725 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
726 %xdefine cbCurRetAddr 4
727 BS3_PROC_BEGIN %1
728 %endif
729 %else
730 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
731 %xdefine cbCurRetAddr xCB
732 BS3_PROC_BEGIN %1
733 %endif
734%endmacro
735
736;; Internal end procedure macro
737;
738; @param 1 The near name.
739; @param 2 The far name
740;
741%macro BS3_PROC_END_INT 2
742 %if __BITS__ == 16
743 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR
744 BS3_PROC_END %1
745 %else
746 BS3_PROC_END %2
747 %endif
748 %else
749 BS3_PROC_END %1
750 %endif
751 %undef BS3_CUR_PROC_FLAGS
752 %undef cbCurRetAddr
753%endmacro
754
755
756;; Convenience macro for defining common procedures.
757; This will emit both near and far 16-bit symbols according to parameter %2 (BS3_PBC_XXX).
758%macro BS3_PROC_BEGIN_CMN 2
759 BS3_PROC_BEGIN_INT BS3_CMN_NM(%1), BS3_CMN_NM_FAR(%1), %2
760%endmacro
761
762;; Convenience macro for defining common procedures.
763%macro BS3_PROC_END_CMN 1
764 BS3_PROC_END_INT BS3_CMN_NM(%1), BS3_CMN_NM_FAR(%1)
765%endmacro
766
767;;
768; Generate a safe 16-bit far stub for function %1, shuffling %2 bytes of parameters.
769;
770; This does absolutely nothing in 32-bit and 64-bit mode.
771;
772; @param 1 The function basename.
773; @param 2 The number of bytes of parameters on the stack, must be a multiple of 2.
774; @remarks Changes the segment to TEXT16.
775;
776%macro BS3_CMN_FAR_STUB 2
777 %if %2 <= 1 || (%2 & 1)
778 %error Invalid parameter frame size passed to BS3_CMN_FAR_STUB: %2
779 %endif
780 %if __BITS__ == 16
781BS3_BEGIN_TEXT16_FARSTUBS
782BS3_PROC_BEGIN_CMN %1, BS3_PBC_FAR
783 CPU 8086
784 inc bp ; Odd bp is far call indicator.
785 push bp
786 mov bp, sp
787 %assign offParam %2
788 %rep %2/2
789 push word [bp + xCB + cbCurRetAddr + offParam - 2]
790 %assign offParam offParam - 2
791 %endrep
792 call BS3_CMN_NM(%1)
793 add sp, %2
794 pop bp
795 dec bp
796 retf
797BS3_PROC_END_CMN %1
798BS3_BEGIN_TEXT16
799 %endif
800%endmacro
801
802
803;; Convenience macro for defining mode specific procedures.
804%macro BS3_PROC_BEGIN_MODE 2
805 ;%warning "BS3_PROC_BEGIN_MODE: 1=" %1 "2=" %2
806 BS3_PROC_BEGIN_INT TMPL_NM(%1), TMPL_FAR_NM(%1), %2
807%endmacro
808
809;; Convenience macro for defining mode specific procedures.
810%macro BS3_PROC_END_MODE 1
811 BS3_PROC_END_INT TMPL_NM(%1), TMPL_FAR_NM(%1)
812%endmacro
813
814;; Does a far return in 16-bit code, near return in 32-bit and 64-bit.
815; This is for use with BS3_PBC_XXX
816%macro BS3_HYBRID_RET 0-1
817 %if __BITS__ == 16
818 %if %0 > 0
819 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR || BS3_CUR_PROC_FLAGS == BS3_PBC_HYBRID_0_ARGS
820 ret %1
821 %else
822 retf %1
823 %endif
824 %else
825 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR || BS3_CUR_PROC_FLAGS == BS3_PBC_HYBRID_0_ARGS
826 ret
827 %else
828 retf
829 %endif
830 %endif
831 %else
832 %if BS3_CUR_PROC_FLAGS != BS3_PBC_NEAR
833 %error Expected BS3_CUR_PROC_FLAGS to be BS3_PBC_NEAR in non-16-bit code.
834 %endif
835 %if %0 > 0
836 ret %1
837 %else
838 ret
839 %endif
840 %endif
841%endmacro
842
843
844;;
845; Prologue hacks for 64-bit code.
846;
847; This saves the four register parameters onto the stack so we can pretend
848; the calling convention is stack based. The 64-bit calling convension is
849; the microsoft one, so this is straight forward.
850;
851; Pairs with BS3_CALL_CONV_EPILOG.
852;
853; @param %1 The number of parameters.
854;
855; @remarks Must be invoked before any stack changing instructions are emitted.
856;
857%macro BS3_CALL_CONV_PROLOG 1
858 %undef BS3_CALL_CONV_PROLOG_PARAMS
859 %define BS3_CALL_CONV_PROLOG_PARAMS %1
860 %if __BITS__ == 64
861 %if %1 >= 1
862 mov [rsp + 008h], rcx
863 %elifdef BS3_STRICT
864 and qword [rsp + 008h], 1
865 %endif
866 %if %1 >= 2
867 mov [rsp + 010h], rdx
868 %elifdef BS3_STRICT
869 and qword [rsp + 010h], 2
870 %endif
871 %if %1 >= 3
872 mov [rsp + 018h], r8
873 %elifdef BS3_STRICT
874 and qword [rsp + 018h], 3
875 %endif
876 %if %1 >= 4
877 mov [rsp + 020h], r9
878 %elifdef BS3_STRICT
879 and qword [rsp + 020h], 4
880 %endif
881 %endif
882%endmacro
883
884;;
885; Epilogue hacks for 64-bit code.
886;
887; Counter part to BS3_CALL_CONV_PROLOG.
888;
889; @param %1 The number of parameters.
890;
891; @remarks Must be invoked right before the return instruction as it uses RSP.
892;
893%macro BS3_CALL_CONV_EPILOG 1
894 %if BS3_CALL_CONV_PROLOG_PARAMS != %1
895 %error "BS3_CALL_CONV_EPILOG argument differs from BS3_CALL_CONV_PROLOG."
896 %endif
897 %if __BITS__ == 64
898 %ifdef BS3_STRICT
899 mov dword [rsp + 008h], 31h
900 mov dword [rsp + 010h], 32h
901 mov dword [rsp + 018h], 33h
902 mov dword [rsp + 020h], 34h
903 %endif
904 %endif
905%endmacro
906
907;;
908; Wrapper for the call instruction that hides calling convension differences.
909;
910; This always calls %1.
911; In 64-bit code, it will load up to 4 parameters into register.
912;
913; @param %1 The function to call (mangled).
914; @param %2 The number of parameters.
915;
916%macro BS3_CALL 2
917 %if __BITS__ == 64
918 %if %2 >= 1
919 mov rcx, [rsp]
920 %ifdef BS3_STRICT
921 and qword [rsp], 11h
922 %endif
923 %endif
924 %if %2 >= 2
925 mov rdx, [rsp + 008h]
926 %ifdef BS3_STRICT
927 and qword [rsp + 008h], 12h
928 %endif
929 %endif
930 %if %2 >= 3
931 mov r8, [rsp + 010h]
932 %ifdef BS3_STRICT
933 and qword [rsp + 010h], 13h
934 %endif
935 %endif
936 %if %2 >= 4
937 mov r9, [rsp + 018h]
938 %ifdef BS3_STRICT
939 and qword [rsp + 018h], 14h
940 %endif
941 %endif
942 %endif
943 call %1
944%endmacro
945
946
947;; @name Execution Modes
948; @{
949%define BS3_MODE_INVALID 000h
950%define BS3_MODE_RM 001h ;;< real mode.
951%define BS3_MODE_PE16 011h ;;< 16-bit protected mode kernel+tss, running 16-bit code, unpaged.
952%define BS3_MODE_PE16_32 012h ;;< 16-bit protected mode kernel+tss, running 32-bit code, unpaged.
953%define BS3_MODE_PE16_V86 018h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode code, unpaged.
954%define BS3_MODE_PE32 022h ;;< 32-bit protected mode kernel+tss, running 32-bit code, unpaged.
955%define BS3_MODE_PE32_16 021h ;;< 32-bit protected mode kernel+tss, running 16-bit code, unpaged.
956%define BS3_MODE_PEV86 028h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode code, unpaged.
957%define BS3_MODE_PP16 031h ;;< 16-bit protected mode kernel+tss, running 16-bit code, paged.
958%define BS3_MODE_PP16_32 032h ;;< 16-bit protected mode kernel+tss, running 32-bit code, paged.
959%define BS3_MODE_PP16_V86 038h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode code, paged.
960%define BS3_MODE_PP32 042h ;;< 32-bit protected mode kernel+tss, running 32-bit code, paged.
961%define BS3_MODE_PP32_16 041h ;;< 32-bit protected mode kernel+tss, running 16-bit code, paged.
962%define BS3_MODE_PPV86 048h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode code, paged.
963%define BS3_MODE_PAE16 051h ;;< 16-bit protected mode kernel+tss, running 16-bit code, PAE paging.
964%define BS3_MODE_PAE16_32 052h ;;< 16-bit protected mode kernel+tss, running 32-bit code, PAE paging.
965%define BS3_MODE_PAE16_V86 058h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode, PAE paging.
966%define BS3_MODE_PAE32 062h ;;< 32-bit protected mode kernel+tss, running 32-bit code, PAE paging.
967%define BS3_MODE_PAE32_16 061h ;;< 32-bit protected mode kernel+tss, running 16-bit code, PAE paging.
968%define BS3_MODE_PAEV86 068h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode, PAE paging.
969%define BS3_MODE_LM16 071h ;;< 16-bit long mode (paged), kernel+tss always 64-bit.
970%define BS3_MODE_LM32 072h ;;< 32-bit long mode (paged), kernel+tss always 64-bit.
971%define BS3_MODE_LM64 074h ;;< 64-bit long mode (paged), kernel+tss always 64-bit.
972
973%define BS3_MODE_CODE_MASK 00fh ;;< Running code mask.
974%define BS3_MODE_CODE_16 001h ;;< Running 16-bit code.
975%define BS3_MODE_CODE_32 002h ;;< Running 32-bit code.
976%define BS3_MODE_CODE_64 004h ;;< Running 64-bit code.
977%define BS3_MODE_CODE_V86 008h ;;< Running 16-bit virtual 8086 code.
978
979%define BS3_MODE_SYS_MASK 0f0h ;;< kernel+tss mask.
980%define BS3_MODE_SYS_RM 000h ;;< Real mode kernel+tss.
981%define BS3_MODE_SYS_PE16 010h ;;< 16-bit protected mode kernel+tss.
982%define BS3_MODE_SYS_PE32 020h ;;< 32-bit protected mode kernel+tss.
983%define BS3_MODE_SYS_PP16 030h ;;< 16-bit paged protected mode kernel+tss.
984%define BS3_MODE_SYS_PP32 040h ;;< 32-bit paged protected mode kernel+tss.
985%define BS3_MODE_SYS_PAE16 050h ;;< 16-bit PAE paged protected mode kernel+tss.
986%define BS3_MODE_SYS_PAE32 060h ;;< 32-bit PAE paged protected mode kernel+tss.
987%define BS3_MODE_SYS_LM 070h ;;< 64-bit (paged) long mode protected mode kernel+tss.
988
989;; Whether the mode has paging enabled.
990%define BS3_MODE_IS_PAGED(a_fMode) ((a_fMode) >= BS3_MODE_PP16)
991
992;; Whether the mode is running v8086 code.
993%define BS3_MODE_IS_V86(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_V86)
994;; Whether the we're executing in real mode or v8086 mode.
995%define BS3_MODE_IS_RM_OR_V86(a_fMode) ((a_fMode) == BS3_MODE_RM || BS3_MODE_IS_V86(a_fMode))
996;; Whether the mode is running 16-bit code, except v8086.
997%define BS3_MODE_IS_16BIT_CODE_NO_V86(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_16)
998;; Whether the mode is running 16-bit code (includes v8086).
999%define BS3_MODE_IS_16BIT_CODE(a_fMode) (BS3_MODE_IS_16BIT_CODE_NO_V86(a_fMode) || BS3_MODE_IS_V86(a_fMode))
1000;; Whether the mode is running 32-bit code.
1001%define BS3_MODE_IS_32BIT_CODE(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_32)
1002;; Whether the mode is running 64-bit code.
1003%define BS3_MODE_IS_64BIT_CODE(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_64)
1004
1005;; Whether the system is in real mode.
1006%define BS3_MODE_IS_RM_SYS(a_fMode) (((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_RM)
1007;; Whether the system is some 16-bit mode that isn't real mode.
1008%define BS3_MODE_IS_16BIT_SYS_NO_RM(a_fMode) ( ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PE16 \
1009 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PP16 \
1010 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PAE16)
1011;; Whether the system is some 16-bit mode (includes real mode).
1012%define BS3_MODE_IS_16BIT_SYS(a_fMode) (BS3_MODE_IS_16BIT_SYS_NO_RM(a_fMode) || BS3_MODE_IS_RM_SYS(a_fMode))
1013;; Whether the system is some 32-bit mode.
1014%define BS3_MODE_IS_32BIT_SYS(a_fMode) ( ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PE32 \
1015 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PP32 \
1016 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PAE32)
1017;; Whether the system is long mode.
1018%define BS3_MODE_IS_64BIT_SYS(a_fMode) (((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_LM)
1019
1020;; @}
1021
1022;; @name For mode specfic lookups:
1023;; %[BS3_MODE_NM %+ BS3_MODE_PE32](SomeBaseName)
1024;; %[BS3_MODE_LNAME_ %+ TMPL_MODE]
1025;; @{
1026%define BS3_MODE_NM_001h(a_Name) _ %+ a_Name %+ _rm
1027%define BS3_MODE_NM_011h(a_Name) _ %+ a_Name %+ _pe16
1028%define BS3_MODE_NM_012h(a_Name) _ %+ a_Name %+ _pe16_32
1029%define BS3_MODE_NM_018h(a_Name) _ %+ a_Name %+ _pe16_v86
1030%define BS3_MODE_NM_022h(a_Name) _ %+ a_Name %+ _pe32
1031%define BS3_MODE_NM_021h(a_Name) _ %+ a_Name %+ _pe32_16
1032%define BS3_MODE_NM_028h(a_Name) _ %+ a_Name %+ _pev86
1033%define BS3_MODE_NM_031h(a_Name) _ %+ a_Name %+ _pp16
1034%define BS3_MODE_NM_032h(a_Name) _ %+ a_Name %+ _pp16_32
1035%define BS3_MODE_NM_038h(a_Name) _ %+ a_Name %+ _pp16_v86
1036%define BS3_MODE_NM_042h(a_Name) _ %+ a_Name %+ _pp32
1037%define BS3_MODE_NM_041h(a_Name) _ %+ a_Name %+ _pp32_16
1038%define BS3_MODE_NM_048h(a_Name) _ %+ a_Name %+ _ppv86
1039%define BS3_MODE_NM_051h(a_Name) _ %+ a_Name %+ _pae16
1040%define BS3_MODE_NM_052h(a_Name) _ %+ a_Name %+ _pae16_32
1041%define BS3_MODE_NM_058h(a_Name) _ %+ a_Name %+ _pae16_v86
1042%define BS3_MODE_NM_062h(a_Name) _ %+ a_Name %+ _pae32
1043%define BS3_MODE_NM_061h(a_Name) _ %+ a_Name %+ _pae32_16
1044%define BS3_MODE_NM_068h(a_Name) _ %+ a_Name %+ _paev86
1045%define BS3_MODE_NM_071h(a_Name) _ %+ a_Name %+ _lm16
1046%define BS3_MODE_NM_072h(a_Name) _ %+ a_Name %+ _lm32
1047%define BS3_MODE_NM_074h(a_Name) _ %+ a_Name %+ _lm64
1048
1049%define BS3_MODE_LNAME_001h rm
1050%define BS3_MODE_LNAME_011h pe16
1051%define BS3_MODE_LNAME_012h pe16_32
1052%define BS3_MODE_LNAME_018h pe16_v86
1053%define BS3_MODE_LNAME_022h pe32
1054%define BS3_MODE_LNAME_021h pe32_16
1055%define BS3_MODE_LNAME_028h pev86
1056%define BS3_MODE_LNAME_031h pp16
1057%define BS3_MODE_LNAME_032h pp16_32
1058%define BS3_MODE_LNAME_038h pp16_v86
1059%define BS3_MODE_LNAME_042h pp32
1060%define BS3_MODE_LNAME_041h pp32_16
1061%define BS3_MODE_LNAME_048h ppv86
1062%define BS3_MODE_LNAME_051h pae16
1063%define BS3_MODE_LNAME_052h pae16_32
1064%define BS3_MODE_LNAME_058h pae16_v86
1065%define BS3_MODE_LNAME_062h pae32
1066%define BS3_MODE_LNAME_061h pae32_16
1067%define BS3_MODE_LNAME_068h paev86
1068%define BS3_MODE_LNAME_071h lm16
1069%define BS3_MODE_LNAME_072h lm32
1070%define BS3_MODE_LNAME_074h lm64
1071
1072%define BS3_MODE_UNAME_001h RM
1073%define BS3_MODE_UNAME_011h PE16
1074%define BS3_MODE_UNAME_012h PE16_32
1075%define BS3_MODE_UNAME_018h PE16_V86
1076%define BS3_MODE_UNAME_022h PE32
1077%define BS3_MODE_UNAME_021h PE32_16
1078%define BS3_MODE_UNAME_028h PEV86
1079%define BS3_MODE_UNAME_031h PP16
1080%define BS3_MODE_UNAME_032h PP16_32
1081%define BS3_MODE_UNAME_038h PP16_V86
1082%define BS3_MODE_UNAME_042h PP32
1083%define BS3_MODE_UNAME_041h PP32_16
1084%define BS3_MODE_UNAME_048h PPV86
1085%define BS3_MODE_UNAME_051h PAE16
1086%define BS3_MODE_UNAME_052h PAE16_32
1087%define BS3_MODE_UNAME_058h PAE16_V86
1088%define BS3_MODE_UNAME_062h PAE32
1089%define BS3_MODE_UNAME_061h PAE32_16
1090%define BS3_MODE_UNAME_068h PAEV86
1091%define BS3_MODE_UNAME_071h LM16
1092%define BS3_MODE_UNAME_072h LM32
1093%define BS3_MODE_UNAME_074h LM64
1094
1095%define BS3_MODE_UNDERSCORE_001h _
1096%define BS3_MODE_UNDERSCORE_011h _
1097%define BS3_MODE_UNDERSCORE_012h _
1098%define BS3_MODE_UNDERSCORE_018h _
1099%define BS3_MODE_UNDERSCORE_022h _
1100%define BS3_MODE_UNDERSCORE_021h _
1101%define BS3_MODE_UNDERSCORE_028h _
1102%define BS3_MODE_UNDERSCORE_031h _
1103%define BS3_MODE_UNDERSCORE_032h _
1104%define BS3_MODE_UNDERSCORE_038h _
1105%define BS3_MODE_UNDERSCORE_042h _
1106%define BS3_MODE_UNDERSCORE_041h _
1107%define BS3_MODE_UNDERSCORE_048h _
1108%define BS3_MODE_UNDERSCORE_051h _
1109%define BS3_MODE_UNDERSCORE_052h _
1110%define BS3_MODE_UNDERSCORE_058h _
1111%define BS3_MODE_UNDERSCORE_062h _
1112%define BS3_MODE_UNDERSCORE_061h _
1113%define BS3_MODE_UNDERSCORE_068h _
1114%define BS3_MODE_UNDERSCORE_071h _
1115%define BS3_MODE_UNDERSCORE_072h _
1116%define BS3_MODE_UNDERSCORE_074h _
1117
1118%define BS3_MODE_CNAME_001h c16
1119%define BS3_MODE_CNAME_011h c16
1120%define BS3_MODE_CNAME_012h c32
1121%define BS3_MODE_CNAME_018h c16
1122%define BS3_MODE_CNAME_022h c32
1123%define BS3_MODE_CNAME_021h c16
1124%define BS3_MODE_CNAME_028h c16
1125%define BS3_MODE_CNAME_031h c16
1126%define BS3_MODE_CNAME_032h c32
1127%define BS3_MODE_CNAME_038h c16
1128%define BS3_MODE_CNAME_042h c32
1129%define BS3_MODE_CNAME_041h c16
1130%define BS3_MODE_CNAME_048h c16
1131%define BS3_MODE_CNAME_051h c16
1132%define BS3_MODE_CNAME_052h c32
1133%define BS3_MODE_CNAME_058h c16
1134%define BS3_MODE_CNAME_062h c32
1135%define BS3_MODE_CNAME_061h c16
1136%define BS3_MODE_CNAME_068h c16
1137%define BS3_MODE_CNAME_071h c16
1138%define BS3_MODE_CNAME_072h c32
1139%define BS3_MODE_CNAME_074h c64
1140;; @}
1141
1142;; @name For getting the ring-0 mode for v86 modes: %[BS3_MODE_R0_NM_001h %+ TMPL_MODE](Bs3SwitchToRM)
1143;; @{
1144%define BS3_MODE_R0_NM_001h(a_Name) _ %+ a_Name %+ _rm
1145%define BS3_MODE_R0_NM_011h(a_Name) _ %+ a_Name %+ _pe16
1146%define BS3_MODE_R0_NM_012h(a_Name) _ %+ a_Name %+ _pe16_32
1147%define BS3_MODE_R0_NM_018h(a_Name) _ %+ a_Name %+ _pe16
1148%define BS3_MODE_R0_NM_022h(a_Name) _ %+ a_Name %+ _pe32
1149%define BS3_MODE_R0_NM_021h(a_Name) _ %+ a_Name %+ _pe32_16
1150%define BS3_MODE_R0_NM_028h(a_Name) _ %+ a_Name %+ _pe32_16
1151%define BS3_MODE_R0_NM_031h(a_Name) _ %+ a_Name %+ _pp16
1152%define BS3_MODE_R0_NM_032h(a_Name) _ %+ a_Name %+ _pp16_32
1153%define BS3_MODE_R0_NM_038h(a_Name) _ %+ a_Name %+ _pp16
1154%define BS3_MODE_R0_NM_042h(a_Name) _ %+ a_Name %+ _pp32
1155%define BS3_MODE_R0_NM_041h(a_Name) _ %+ a_Name %+ _pp32_16
1156%define BS3_MODE_R0_NM_048h(a_Name) _ %+ a_Name %+ _pp32_16
1157%define BS3_MODE_R0_NM_051h(a_Name) _ %+ a_Name %+ _pae16
1158%define BS3_MODE_R0_NM_052h(a_Name) _ %+ a_Name %+ _pae16_32
1159%define BS3_MODE_R0_NM_058h(a_Name) _ %+ a_Name %+ _pae16
1160%define BS3_MODE_R0_NM_062h(a_Name) _ %+ a_Name %+ _pae32
1161%define BS3_MODE_R0_NM_061h(a_Name) _ %+ a_Name %+ _pae32_16
1162%define BS3_MODE_R0_NM_068h(a_Name) _ %+ a_Name %+ _pae32_16
1163%define BS3_MODE_R0_NM_071h(a_Name) _ %+ a_Name %+ _lm16
1164%define BS3_MODE_R0_NM_072h(a_Name) _ %+ a_Name %+ _lm32
1165%define BS3_MODE_R0_NM_074h(a_Name) _ %+ a_Name %+ _lm64
1166;; @}
1167
1168
1169;;
1170; Includes the file %1 with TMPL_MODE set to all possible value.
1171; @param 1 Double quoted include file name.
1172%macro BS3_INSTANTIATE_TEMPLATE_WITH_WEIRD_ONES 1
1173 %define BS3_INSTANTIATING_MODE
1174 %define BS3_INSTANTIATING_ALL_MODES
1175
1176 %define TMPL_MODE BS3_MODE_RM
1177 %include %1
1178
1179 %define TMPL_MODE BS3_MODE_PE16
1180 %include %1
1181 %define TMPL_MODE BS3_MODE_PE16_32
1182 %include %1
1183 %define TMPL_MODE BS3_MODE_PE16_V86
1184 %include %1
1185
1186 %define TMPL_MODE BS3_MODE_PE32
1187 %include %1
1188 %define TMPL_MODE BS3_MODE_PE32_16
1189 %include %1
1190 %define TMPL_MODE BS3_MODE_PEV86
1191 %include %1
1192
1193 %define TMPL_MODE BS3_MODE_PP16
1194 %include %1
1195 %define TMPL_MODE BS3_MODE_PP16_32
1196 %include %1
1197 %define TMPL_MODE BS3_MODE_PP16_V86
1198 %include %1
1199
1200 %define TMPL_MODE BS3_MODE_PP32
1201 %include %1
1202 %define TMPL_MODE BS3_MODE_PP32_16
1203 %include %1
1204 %define TMPL_MODE BS3_MODE_PPV86
1205 %include %1
1206
1207 %define TMPL_MODE BS3_MODE_PAE16
1208 %include %1
1209 %define TMPL_MODE BS3_MODE_PAE16_32
1210 %include %1
1211 %define TMPL_MODE BS3_MODE_PAE16_V86
1212 %include %1
1213
1214 %define TMPL_MODE BS3_MODE_PAE32
1215 %include %1
1216 %define TMPL_MODE BS3_MODE_PAE32_16
1217 %include %1
1218 %define TMPL_MODE BS3_MODE_PAEV86
1219 %include %1
1220
1221 %define TMPL_MODE BS3_MODE_LM16
1222 %include %1
1223 %define TMPL_MODE BS3_MODE_LM32
1224 %include %1
1225 %define TMPL_MODE BS3_MODE_LM64
1226 %include %1
1227
1228 %undef BS3_INSTANTIATING_MODE
1229 %undef BS3_INSTANTIATING_ALL_MODES
1230%endmacro
1231
1232
1233;;
1234; Includes the file %1 with TMPL_MODE set to all but the "weird" value.
1235; @param 1 Double quoted include file name.
1236%macro BS3_INSTANTIATE_TEMPLATE_ESSENTIALS 1
1237 %define BS3_INSTANTIATING_MODE
1238 %define BS3_INSTANTIATING_ESSENTIAL_MODES
1239
1240 %define TMPL_MODE BS3_MODE_RM
1241 %include %1
1242
1243 %define TMPL_MODE BS3_MODE_PE16
1244 %include %1
1245
1246 %define TMPL_MODE BS3_MODE_PE32
1247 %include %1
1248 %define TMPL_MODE BS3_MODE_PEV86
1249 %include %1
1250
1251 %define TMPL_MODE BS3_MODE_PP16
1252 %include %1
1253
1254 %define TMPL_MODE BS3_MODE_PP32
1255 %include %1
1256 %define TMPL_MODE BS3_MODE_PPV86
1257 %include %1
1258
1259 %define TMPL_MODE BS3_MODE_PAE16
1260 %include %1
1261
1262 %define TMPL_MODE BS3_MODE_PAE32
1263 %include %1
1264 %define TMPL_MODE BS3_MODE_PAEV86
1265 %include %1
1266
1267 %define TMPL_MODE BS3_MODE_LM16
1268 %include %1
1269 %define TMPL_MODE BS3_MODE_LM32
1270 %include %1
1271 %define TMPL_MODE BS3_MODE_LM64
1272 %include %1
1273
1274 %undef BS3_INSTANTIATING_MODE
1275 %undef BS3_INSTANTIATING_ESSENTIAL_MODES
1276%endmacro
1277
1278;;
1279; Includes the file %1 with TMPL_MODE set to a 16-bit, a 32-bit and a 64-bit value.
1280; @param 1 Double quoted include file name.
1281%macro BS3_INSTANTIATE_COMMON_TEMPLATE 1
1282 %define BS3_INSTANTIATING_CMN
1283
1284 %define TMPL_MODE BS3_MODE_RM
1285 %include %1
1286 %define TMPL_MODE BS3_MODE_PE32
1287 %include %1
1288 %define TMPL_MODE BS3_MODE_LM64
1289 %include %1
1290
1291 %undef BS3_INSTANTIATING_CMN
1292%endmacro
1293
1294
1295;; @name Static Memory Allocation
1296; @{
1297;; The flat load address for the code after the bootsector.
1298%define BS3_ADDR_LOAD 010000h
1299;; Where we save the boot registers during init.
1300; Located right before the code.
1301%define BS3_ADDR_REG_SAVE (BS3_ADDR_LOAD - BS3REGCTX_size - 8)
1302;; Where the stack starts (initial RSP value).
1303; Located 16 bytes (assumed by boot sector) before the saved registers. SS.BASE=0.
1304%define BS3_ADDR_STACK (BS3_ADDR_REG_SAVE - 16)
1305;; The ring-0 stack (8KB) for ring transitions.
1306%define BS3_ADDR_STACK_R0 006000h
1307;; The ring-1 stack (8KB) for ring transitions.
1308%define BS3_ADDR_STACK_R1 004000h
1309;; The ring-2 stack (8KB) for ring transitions.
1310%define BS3_ADDR_STACK_R2 002000h
1311;; IST1 ring-0 stack for long mode (4KB), used for double faults elsewhere.
1312%define BS3_ADDR_STACK_R0_IST1 009000h
1313;; IST2 ring-0 stack for long mode (3KB), used for spare 0 stack elsewhere.
1314%define BS3_ADDR_STACK_R0_IST2 008000h
1315;; IST3 ring-0 stack for long mode (1KB).
1316%define BS3_ADDR_STACK_R0_IST3 007400h
1317;; IST4 ring-0 stack for long mode (1KB), used for spare 1 stack elsewhere.
1318%define BS3_ADDR_STACK_R0_IST4 007000h
1319;; IST5 ring-0 stack for long mode (1KB).
1320%define BS3_ADDR_STACK_R0_IST5 006c00h
1321;; IST6 ring-0 stack for long mode (1KB).
1322%define BS3_ADDR_STACK_R0_IST6 006800h
1323;; IST7 ring-0 stack for long mode (1KB).
1324%define BS3_ADDR_STACK_R0_IST7 006400h
1325
1326;; The base address of the BS3TEXT16 segment (same as BS3_LOAD_ADDR).
1327;; @sa BS3_SEL_TEXT16
1328%define BS3_ADDR_BS3TEXT16 010000h
1329;; The base address of the BS3SYSTEM16 segment.
1330;; @sa BS3_SEL_SYSTEM16
1331%define BS3_ADDR_BS3SYSTEM16 020000h
1332;; The base address of the BS3DATA16/BS3KIT_GRPNM_DATA16 segment.
1333;; @sa BS3_SEL_DATA16
1334%define BS3_ADDR_BS3DATA16 029000h
1335;; @}
1336
1337
1338;;
1339; BS3 register context. Used by traps and such.
1340;
1341struc BS3REGCTX
1342 .rax resq 1 ; BS3REG rax; /**< 0x00 */
1343 .rcx resq 1 ; BS3REG rcx; /**< 0x08 */
1344 .rdx resq 1 ; BS3REG rdx; /**< 0x10 */
1345 .rbx resq 1 ; BS3REG rbx; /**< 0x18 */
1346 .rsp resq 1 ; BS3REG rsp; /**< 0x20 */
1347 .rbp resq 1 ; BS3REG rbp; /**< 0x28 */
1348 .rsi resq 1 ; BS3REG rsi; /**< 0x30 */
1349 .rdi resq 1 ; BS3REG rdi; /**< 0x38 */
1350 .r8 resq 1 ; BS3REG r8; /**< 0x40 */
1351 .r9 resq 1 ; BS3REG r9; /**< 0x48 */
1352 .r10 resq 1 ; BS3REG r10; /**< 0x50 */
1353 .r11 resq 1 ; BS3REG r11; /**< 0x58 */
1354 .r12 resq 1 ; BS3REG r12; /**< 0x60 */
1355 .r13 resq 1 ; BS3REG r13; /**< 0x68 */
1356 .r14 resq 1 ; BS3REG r14; /**< 0x70 */
1357 .r15 resq 1 ; BS3REG r15; /**< 0x78 */
1358 .rflags resq 1 ; BS3REG rflags; /**< 0x80 */
1359 .rip resq 1 ; BS3REG rip; /**< 0x88 */
1360 .cs resw 1 ; uint16_t cs; /**< 0x90 */
1361 .ds resw 1 ; uint16_t ds; /**< 0x92 */
1362 .es resw 1 ; uint16_t es; /**< 0x94 */
1363 .fs resw 1 ; uint16_t fs; /**< 0x96 */
1364 .gs resw 1 ; uint16_t gs; /**< 0x98 */
1365 .ss resw 1 ; uint16_t ss; /**< 0x9a */
1366 .tr resw 1 ; uint16_t tr; /**< 0x9c */
1367 .ldtr resw 1 ; uint16_t ldtr; /**< 0x9e */
1368 .bMode resb 1 ; uint8_t bMode; /**< 0xa0: BS3_MODE_XXX. */
1369 .bCpl resb 1 ; uint8_t bCpl; /**< 0xa1: 0-3, 0 is used for real mode. */
1370 .fbFlags resb 1 ; uint8_t fbFlags; /**< 0xa2: BS3REG_CTX_F_XXX */
1371 .abPadding resb 5 ; uint8_t abPadding[5]; /**< 0xa4 */
1372 .cr0 resq 1 ; BS3REG cr0; /**< 0xa8 */
1373 .cr2 resq 1 ; BS3REG cr2; /**< 0xb0 */
1374 .cr3 resq 1 ; BS3REG cr3; /**< 0xb8 */
1375 .cr4 resq 1 ; BS3REG cr4; /**< 0xc0 */
1376 .uUnused resq 1 ; BS3REG uUnused; /**< 0xc8 */
1377endstruc
1378AssertCompileSize(BS3REGCTX, 0xd0)
1379
1380;; @name BS3REG_CTX_F_XXX - BS3REGCTX::fbFlags masks.
1381; @{
1382;; The CR0 is MSW (only low 16-bit). */
1383%define BS3REG_CTX_F_NO_CR0_IS_MSW 0x01
1384;; No CR2 and CR3 values. Not in CPL 0 or CPU too old for CR2 & CR3.
1385%define BS3REG_CTX_F_NO_CR2_CR3 0x02
1386;; No CR4 value. The CPU is too old for CR4.
1387%define BS3REG_CTX_F_NO_CR4 0x04
1388;; No TR and LDTR values. Context gathered in real mode or v8086 mode.
1389%define BS3REG_CTX_F_NO_TR_LDTR 0x08
1390;; The context doesn't have valid values for AMD64 GPR extensions.
1391%define BS3REG_CTX_F_NO_AMD64 0x10
1392;; @}
1393
1394;;
1395; BS3 Trap Frame.
1396;
1397struc BS3TRAPFRAME
1398 .bXcpt resb 1
1399 .cbIretFrame resb 1
1400 .uHandlerCs resw 1
1401 .uHandlerSs resw 1
1402 .usAlignment resw 1
1403 .uHandlerRsp resq 1
1404 .fHandlerRfl resq 1
1405 .uErrCd resq 1
1406 .Ctx resb BS3REGCTX_size
1407endstruc
1408AssertCompileSize(BS3TRAPFRAME, 0x20 + 0xd0)
1409
1410;; Flag for Bs3TrapXxResumeFrame methods.
1411%define BS3TRAPRESUME_F_SKIP_CRX 1
1412
1413
1414;;
1415; Trap record.
1416;
1417struc BS3TRAPREC
1418 ;; The trap location relative to the base address given at
1419 ; registration time.
1420 .offWhere resd 1
1421 ;; What to add to .offWhere to calculate the resume address.
1422 .offResumeAddend resb 1
1423 ;; The trap number.
1424 .u8TrapNo resb 1
1425 ;; The error code if the trap takes one.
1426 .u16ErrCd resw 1
1427endstruc
1428
1429;; The size shift.
1430%define BS3TRAPREC_SIZE_SHIFT 3
1431
1432
1433;; The system call vector.
1434%define BS3_TRAP_SYSCALL 20h
1435
1436;; @name System call numbers (ax)
1437;; @note Pointers are always passed in cx:xDI.
1438;; @{
1439;; Print char (cl).
1440%define BS3_SYSCALL_PRINT_CHR 0001h
1441;; Print string (pointer in cx:xDI, length in xDX).
1442%define BS3_SYSCALL_PRINT_STR 0002h
1443;; Switch to ring-0.
1444%define BS3_SYSCALL_TO_RING0 0003h
1445;; Switch to ring-1.
1446%define BS3_SYSCALL_TO_RING1 0004h
1447;; Switch to ring-2.
1448%define BS3_SYSCALL_TO_RING2 0005h
1449;; Switch to ring-3.
1450%define BS3_SYSCALL_TO_RING3 0006h
1451;; Restore context (pointer in cx:xDI, flags in dx).
1452%define BS3_SYSCALL_RESTORE_CTX 0007h
1453;; The last system call value.
1454%define BS3_SYSCALL_LAST BS3_SYSCALL_RESTORE_CTX
1455;; @}
1456
1457
1458
1459;; @name BS3_SEL_XXX - GDT selectors
1460;; @{
1461
1462%define BS3_SEL_LDT 0010h ;;< The LDT selector (requires setting up).
1463%define BS3_SEL_TSS16 0020h ;;< The 16-bit TSS selector.
1464%define BS3_SEL_TSS16_DF 0028h ;;< The 16-bit TSS selector for double faults.
1465%define BS3_SEL_TSS16_SPARE0 0030h ;;< The 16-bit TSS selector for testing.
1466%define BS3_SEL_TSS16_SPARE1 0038h ;;< The 16-bit TSS selector for testing.
1467%define BS3_SEL_TSS32 0040h ;;< The 32-bit TSS selector.
1468%define BS3_SEL_TSS32_DF 0048h ;;< The 32-bit TSS selector for double faults.
1469%define BS3_SEL_TSS32_SPARE0 0050h ;;< The 32-bit TSS selector for testing.
1470%define BS3_SEL_TSS32_SPARE1 0058h ;;< The 32-bit TSS selector for testing.
1471%define BS3_SEL_TSS32_IOBP_IRB 0060h ;;< The 32-bit TSS selector with I/O permission and interrupt redirection bitmaps.
1472%define BS3_SEL_TSS32_IRB 0068h ;;< The 32-bit TSS selector with only interrupt redirection bitmap (IOPB stripped by limit).
1473%define BS3_SEL_TSS64 0070h ;;< The 64-bit TSS selector.
1474%define BS3_SEL_TSS64_SPARE0 0080h ;;< The 64-bit TSS selector.
1475%define BS3_SEL_TSS64_SPARE1 0090h ;;< The 64-bit TSS selector.
1476%define BS3_SEL_TSS64_IOBP 00a0h ;;< The 64-bit TSS selector.
1477
1478%define BS3_SEL_RMTEXT16_CS 00e0h ;;< Conforming code selector for accessing the BS3RMTEXT16 segment. Runtime config.
1479%define BS3_SEL_X0TEXT16_CS 00e8h ;;< Conforming code selector for accessing the BS3X0TEXT16 segment. Runtime config.
1480%define BS3_SEL_X1TEXT16_CS 00f0h ;;< Conforming code selector for accessing the BS3X1TEXT16 segment. Runtime config.
1481%define BS3_SEL_VMMDEV_MMIO16 00f8h ;;< Selector for accessing the VMMDev MMIO segment at 0100000h from 16-bit code.
1482
1483%define BS3_SEL_RING_SHIFT 8 ;;< For the formula: BS3_SEL_R0_XXX + ((cs & 3) << BS3_SEL_RING_SHIFT)
1484
1485%define BS3_SEL_R0_FIRST 0100h ;;< The first selector in the ring-0 block.
1486%define BS3_SEL_R0_CS16 0100h ;;< ring-0: 16-bit code selector, base 0x10000.
1487%define BS3_SEL_R0_DS16 0108h ;;< ring-0: 16-bit data selector, base 0x23000.
1488%define BS3_SEL_R0_SS16 0110h ;;< ring-0: 16-bit stack selector, base 0x00000.
1489%define BS3_SEL_R0_CS32 0118h ;;< ring-0: 32-bit flat code selector.
1490%define BS3_SEL_R0_DS32 0120h ;;< ring-0: 32-bit flat data selector.
1491%define BS3_SEL_R0_SS32 0128h ;;< ring-0: 32-bit flat stack selector.
1492%define BS3_SEL_R0_CS64 0130h ;;< ring-0: 64-bit flat code selector.
1493%define BS3_SEL_R0_DS64 0138h ;;< ring-0: 64-bit flat data & stack selector.
1494%define BS3_SEL_R0_CS16_EO 0140h ;;< ring-0: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1495%define BS3_SEL_R0_CS16_CNF 0148h ;;< ring-0: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1496%define BS3_SEL_R0_CS16_CNF_EO 0150h ;;< ring-0: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1497%define BS3_SEL_R0_CS32_EO 0158h ;;< ring-0: 32-bit execute-only code selector, not accessed, flat.
1498%define BS3_SEL_R0_CS32_CNF 0160h ;;< ring-0: 32-bit conforming code selector, not accessed, flat.
1499%define BS3_SEL_R0_CS32_CNF_EO 0168h ;;< ring-0: 32-bit execute-only conforming code selector, not accessed, flat.
1500%define BS3_SEL_R0_CS64_EO 0170h ;;< ring-0: 64-bit execute-only code selector, not accessed, flat.
1501%define BS3_SEL_R0_CS64_CNF 0178h ;;< ring-0: 64-bit conforming code selector, not accessed, flat.
1502%define BS3_SEL_R0_CS64_CNF_EO 0180h ;;< ring-0: 64-bit execute-only conforming code selector, not accessed, flat.
1503
1504%define BS3_SEL_R1_FIRST 0200h ;;< The first selector in the ring-1 block.
1505%define BS3_SEL_R1_CS16 0200h ;;< ring-1: 16-bit code selector, base 0x10000.
1506%define BS3_SEL_R1_DS16 0208h ;;< ring-1: 16-bit data selector, base 0x23000.
1507%define BS3_SEL_R1_SS16 0210h ;;< ring-1: 16-bit stack selector, base 0x00000.
1508%define BS3_SEL_R1_CS32 0218h ;;< ring-1: 32-bit flat code selector.
1509%define BS3_SEL_R1_DS32 0220h ;;< ring-1: 32-bit flat data selector.
1510%define BS3_SEL_R1_SS32 0228h ;;< ring-1: 32-bit flat stack selector.
1511%define BS3_SEL_R1_CS64 0230h ;;< ring-1: 64-bit flat code selector.
1512%define BS3_SEL_R1_DS64 0238h ;;< ring-1: 64-bit flat data & stack selector.
1513%define BS3_SEL_R1_CS16_EO 0240h ;;< ring-1: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1514%define BS3_SEL_R1_CS16_CNF 0248h ;;< ring-1: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1515%define BS3_SEL_R1_CS16_CNF_EO 0250h ;;< ring-1: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1516%define BS3_SEL_R1_CS32_EO 0258h ;;< ring-1: 32-bit execute-only code selector, not accessed, flat.
1517%define BS3_SEL_R1_CS32_CNF 0260h ;;< ring-1: 32-bit conforming code selector, not accessed, flat.
1518%define BS3_SEL_R1_CS32_CNF_EO 0268h ;;< ring-1: 32-bit execute-only conforming code selector, not accessed, flat.
1519%define BS3_SEL_R1_CS64_EO 0270h ;;< ring-1: 64-bit execute-only code selector, not accessed, flat.
1520%define BS3_SEL_R1_CS64_CNF 0278h ;;< ring-1: 64-bit conforming code selector, not accessed, flat.
1521%define BS3_SEL_R1_CS64_CNF_EO 0280h ;;< ring-1: 64-bit execute-only conforming code selector, not accessed, flat.
1522
1523%define BS3_SEL_R2_FIRST 0300h ;;< The first selector in the ring-2 block.
1524%define BS3_SEL_R2_CS16 0300h ;;< ring-2: 16-bit code selector, base 0x10000.
1525%define BS3_SEL_R2_DS16 0308h ;;< ring-2: 16-bit data selector, base 0x23000.
1526%define BS3_SEL_R2_SS16 0310h ;;< ring-2: 16-bit stack selector, base 0x00000.
1527%define BS3_SEL_R2_CS32 0318h ;;< ring-2: 32-bit flat code selector.
1528%define BS3_SEL_R2_DS32 0320h ;;< ring-2: 32-bit flat data selector.
1529%define BS3_SEL_R2_SS32 0328h ;;< ring-2: 32-bit flat stack selector.
1530%define BS3_SEL_R2_CS64 0330h ;;< ring-2: 64-bit flat code selector.
1531%define BS3_SEL_R2_DS64 0338h ;;< ring-2: 64-bit flat data & stack selector.
1532%define BS3_SEL_R2_CS16_EO 0340h ;;< ring-2: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1533%define BS3_SEL_R2_CS16_CNF 0348h ;;< ring-2: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1534%define BS3_SEL_R2_CS16_CNF_EO 0350h ;;< ring-2: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1535%define BS3_SEL_R2_CS32_EO 0358h ;;< ring-2: 32-bit execute-only code selector, not accessed, flat.
1536%define BS3_SEL_R2_CS32_CNF 0360h ;;< ring-2: 32-bit conforming code selector, not accessed, flat.
1537%define BS3_SEL_R2_CS32_CNF_EO 0368h ;;< ring-2: 32-bit execute-only conforming code selector, not accessed, flat.
1538%define BS3_SEL_R2_CS64_EO 0370h ;;< ring-2: 64-bit execute-only code selector, not accessed, flat.
1539%define BS3_SEL_R2_CS64_CNF 0378h ;;< ring-2: 64-bit conforming code selector, not accessed, flat.
1540%define BS3_SEL_R2_CS64_CNF_EO 0380h ;;< ring-2: 64-bit execute-only conforming code selector, not accessed, flat.
1541
1542%define BS3_SEL_R3_FIRST 0400h ;;< The first selector in the ring-3 block.
1543%define BS3_SEL_R3_CS16 0400h ;;< ring-3: 16-bit code selector, base 0x10000.
1544%define BS3_SEL_R3_DS16 0408h ;;< ring-3: 16-bit data selector, base 0x23000.
1545%define BS3_SEL_R3_SS16 0410h ;;< ring-3: 16-bit stack selector, base 0x00000.
1546%define BS3_SEL_R3_CS32 0418h ;;< ring-3: 32-bit flat code selector.
1547%define BS3_SEL_R3_DS32 0420h ;;< ring-3: 32-bit flat data selector.
1548%define BS3_SEL_R3_SS32 0428h ;;< ring-3: 32-bit flat stack selector.
1549%define BS3_SEL_R3_CS64 0430h ;;< ring-3: 64-bit flat code selector.
1550%define BS3_SEL_R3_DS64 0438h ;;< ring-3: 64-bit flat data & stack selector.
1551%define BS3_SEL_R3_CS16_EO 0440h ;;< ring-3: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1552%define BS3_SEL_R3_CS16_CNF 0448h ;;< ring-3: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1553%define BS3_SEL_R3_CS16_CNF_EO 0450h ;;< ring-3: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1554%define BS3_SEL_R3_CS32_EO 0458h ;;< ring-3: 32-bit execute-only code selector, not accessed, flat.
1555%define BS3_SEL_R3_CS32_CNF 0460h ;;< ring-3: 32-bit conforming code selector, not accessed, flat.
1556%define BS3_SEL_R3_CS32_CNF_EO 0468h ;;< ring-3: 32-bit execute-only conforming code selector, not accessed, flat.
1557%define BS3_SEL_R3_CS64_EO 0470h ;;< ring-3: 64-bit execute-only code selector, not accessed, flat.
1558%define BS3_SEL_R3_CS64_CNF 0478h ;;< ring-3: 64-bit conforming code selector, not accessed, flat.
1559%define BS3_SEL_R3_CS64_CNF_EO 0480h ;;< ring-3: 64-bit execute-only conforming code selector, not accessed, flat.
1560
1561%define BS3_SEL_SPARE_FIRST 0500h ;;< The first selector in the spare block
1562%define BS3_SEL_SPARE_00 0500h ;;< Spare selector number 00h.
1563%define BS3_SEL_SPARE_01 0508h ;;< Spare selector number 01h.
1564%define BS3_SEL_SPARE_02 0510h ;;< Spare selector number 02h.
1565%define BS3_SEL_SPARE_03 0518h ;;< Spare selector number 03h.
1566%define BS3_SEL_SPARE_04 0520h ;;< Spare selector number 04h.
1567%define BS3_SEL_SPARE_05 0528h ;;< Spare selector number 05h.
1568%define BS3_SEL_SPARE_06 0530h ;;< Spare selector number 06h.
1569%define BS3_SEL_SPARE_07 0538h ;;< Spare selector number 07h.
1570%define BS3_SEL_SPARE_08 0540h ;;< Spare selector number 08h.
1571%define BS3_SEL_SPARE_09 0548h ;;< Spare selector number 09h.
1572%define BS3_SEL_SPARE_0a 0550h ;;< Spare selector number 0ah.
1573%define BS3_SEL_SPARE_0b 0558h ;;< Spare selector number 0bh.
1574%define BS3_SEL_SPARE_0c 0560h ;;< Spare selector number 0ch.
1575%define BS3_SEL_SPARE_0d 0568h ;;< Spare selector number 0dh.
1576%define BS3_SEL_SPARE_0e 0570h ;;< Spare selector number 0eh.
1577%define BS3_SEL_SPARE_0f 0578h ;;< Spare selector number 0fh.
1578%define BS3_SEL_SPARE_10 0580h ;;< Spare selector number 10h.
1579%define BS3_SEL_SPARE_11 0588h ;;< Spare selector number 11h.
1580%define BS3_SEL_SPARE_12 0590h ;;< Spare selector number 12h.
1581%define BS3_SEL_SPARE_13 0598h ;;< Spare selector number 13h.
1582%define BS3_SEL_SPARE_14 05a0h ;;< Spare selector number 14h.
1583%define BS3_SEL_SPARE_15 05a8h ;;< Spare selector number 15h.
1584%define BS3_SEL_SPARE_16 05b0h ;;< Spare selector number 16h.
1585%define BS3_SEL_SPARE_17 05b8h ;;< Spare selector number 17h.
1586%define BS3_SEL_SPARE_18 05c0h ;;< Spare selector number 18h.
1587%define BS3_SEL_SPARE_19 05c8h ;;< Spare selector number 19h.
1588%define BS3_SEL_SPARE_1a 05d0h ;;< Spare selector number 1ah.
1589%define BS3_SEL_SPARE_1b 05d8h ;;< Spare selector number 1bh.
1590%define BS3_SEL_SPARE_1c 05e0h ;;< Spare selector number 1ch.
1591%define BS3_SEL_SPARE_1d 05e8h ;;< Spare selector number 1dh.
1592%define BS3_SEL_SPARE_1e 05f0h ;;< Spare selector number 1eh.
1593%define BS3_SEL_SPARE_1f 05f8h ;;< Spare selector number 1fh.
1594
1595%define BS3_SEL_TILED 0600h ;;< 16-bit data tiling: First - base=0x00000000, limit=64KB, DPL=3.
1596%define BS3_SEL_TILED_LAST 0df8h ;;< 16-bit data tiling: Last - base=0x00ff0000, limit=64KB, DPL=3.
1597%define BS3_SEL_TILED_AREA_SIZE 001000000h ;;< 16-bit data tiling: Size of addressable area, in bytes. (16 MB)
1598
1599%define BS3_SEL_FREE_PART1 0e00h ;;< Free selector space - part \%1.
1600%define BS3_SEL_FREE_PART1_LAST 0ff8h ;;< Free selector space - part \%1, last entry.
1601
1602%define BS3_SEL_TEXT16 1000h ;;< The BS3TEXT16 selector.
1603
1604%define BS3_SEL_FREE_PART2 1008h ;;< Free selector space - part \#2.
1605%define BS3_SEL_FREE_PART2_LAST 17f8h ;;< Free selector space - part \#2, last entry.
1606
1607%define BS3_SEL_TILED_R0 1800h ;;< 16-bit data/stack tiling: First - base=0x00000000, limit=64KB, DPL=0.
1608%define BS3_SEL_TILED_R0_LAST 1ff8h ;;< 16-bit data/stack tiling: Last - base=0x00ff0000, limit=64KB, DPL=0.
1609
1610%define BS3_SEL_SYSTEM16 2000h ;;< The BS3SYSTEM16 selector.
1611
1612%define BS3_SEL_FREE_PART3 2008h ;;< Free selector space - part \%3.
1613%define BS3_SEL_FREE_PART3_LAST 28f8h ;;< Free selector space - part \%3, last entry.
1614
1615%define BS3_SEL_DATA16 2900h ;;< The BS3DATA16/BS3KIT_GRPNM_DATA16 selector.
1616
1617%define BS3_SEL_FREE_PART4 2908h ;;< Free selector space - part \#4.
1618%define BS3_SEL_FREE_PART4_LAST 2f98h ;;< Free selector space - part \#4, last entry.
1619
1620%define BS3_SEL_PRE_TEST_PAGE_08 2fa0h ;;< Selector located 8 selectors before the test page.
1621%define BS3_SEL_PRE_TEST_PAGE_07 2fa8h ;;< Selector located 7 selectors before the test page.
1622%define BS3_SEL_PRE_TEST_PAGE_06 2fb0h ;;< Selector located 6 selectors before the test page.
1623%define BS3_SEL_PRE_TEST_PAGE_05 2fb8h ;;< Selector located 5 selectors before the test page.
1624%define BS3_SEL_PRE_TEST_PAGE_04 2fc0h ;;< Selector located 4 selectors before the test page.
1625%define BS3_SEL_PRE_TEST_PAGE_03 2fc8h ;;< Selector located 3 selectors before the test page.
1626%define BS3_SEL_PRE_TEST_PAGE_02 2fd0h ;;< Selector located 2 selectors before the test page.
1627%define BS3_SEL_PRE_TEST_PAGE_01 2fd8h ;;< Selector located 1 selector before the test page.
1628%define BS3_SEL_TEST_PAGE 2fe0h ;;< Start of the test page intended for playing around with paging and GDT.
1629%define BS3_SEL_TEST_PAGE_00 2fe0h ;;< Test page selector number 00h (convenience).
1630%define BS3_SEL_TEST_PAGE_01 2fe8h ;;< Test page selector number 01h (convenience).
1631%define BS3_SEL_TEST_PAGE_02 2ff0h ;;< Test page selector number 02h (convenience).
1632%define BS3_SEL_TEST_PAGE_03 2ff8h ;;< Test page selector number 03h (convenience).
1633%define BS3_SEL_TEST_PAGE_04 3000h ;;< Test page selector number 04h (convenience).
1634%define BS3_SEL_TEST_PAGE_05 3008h ;;< Test page selector number 05h (convenience).
1635%define BS3_SEL_TEST_PAGE_06 3010h ;;< Test page selector number 06h (convenience).
1636%define BS3_SEL_TEST_PAGE_07 3018h ;;< Test page selector number 07h (convenience).
1637%define BS3_SEL_TEST_PAGE_LAST 3fd0h ;;< The last selector in the spare page.
1638
1639%define BS3_SEL_GDT_LIMIT 3fd8h ;;< The GDT limit.
1640
1641;; @}
1642
1643
1644;
1645; Sanity checks.
1646;
1647%if BS3_ADDR_BS3TEXT16 != BS3_ADDR_LOAD
1648 %error "BS3_ADDR_BS3TEXT16 and BS3_ADDR_LOAD are out of sync"
1649%endif
1650%if (BS3_ADDR_BS3TEXT16 / 16) != BS3_SEL_TEXT16
1651 %error "BS3_ADDR_BS3TEXT16 and BS3_SEL_TEXT16 are out of sync"
1652%endif
1653%if (BS3_ADDR_BS3DATA16 / 16) != BS3_SEL_DATA16
1654 %error "BS3_ADDR_BS3DATA16 and BS3_SEL_DATA16 are out of sync"
1655%endif
1656%if (BS3_ADDR_BS3SYSTEM16 / 16) != BS3_SEL_SYSTEM16
1657 %error "BS3_ADDR_BS3SYSTEM16 and BS3_SEL_SYSTEM16 are out of sync"
1658%endif
1659
1660
1661;; @name BS3CPU_XXX - Bs3CpuDetect_mmm return value and g_bBs3CpuDetected.
1662;; @{
1663%define BS3CPU_8086 0x0001
1664%define BS3CPU_V20 0x0002
1665%define BS3CPU_80186 0x0003
1666%define BS3CPU_80286 0x0004
1667%define BS3CPU_80386 0x0005
1668%define BS3CPU_80486 0x0006
1669%define BS3CPU_Pentium 0x0007
1670%define BS3CPU_PPro 0x0008
1671%define BS3CPU_PProOrNewer 0x0009
1672%define BS3CPU_TYPE_MASK 0x00ff
1673%define BS3CPU_F_CPUID 0x0100
1674%define BS3CPU_F_CPUID_EXT_LEAVES 0x0200
1675%define BS3CPU_F_PAE 0x0400
1676%define BS3CPU_F_PAE_BIT 10
1677%define BS3CPU_F_PSE 0x0800
1678%define BS3CPU_F_PSE_BIT 11
1679%define BS3CPU_F_LONG_MODE 0x1000
1680;; @}
1681
1682
1683%endif
1684
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