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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3kit.mac@ 64694

Last change on this file since 64694 was 64694, checked in by vboxsync, 8 years ago

bs3kit: Added Bs3SwitchTo32BitAndCallC and fixed a few problems switching from PE32 to other mode and back again.

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1; $Id: bs3kit.mac 64694 2016-11-17 17:10:47Z vboxsync $
2;; @file
3; BS3Kit - structures, symbols, macros and stuff.
4;
5
6;
7; Copyright (C) 2007-2016 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17; The contents of this file may alternatively be used under the terms
18; of the Common Development and Distribution License Version 1.0
19; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20; VirtualBox OSE distribution, in which case the provisions of the
21; CDDL are applicable instead of those of the GPL.
22;
23; You may elect to license modified versions of this file under the
24; terms and conditions of either the GPL or the CDDL or both.
25;
26
27%ifndef ___bs3kit_mac___
28%define ___bs3kit_mac___
29
30;
31; Before we can include anything, we need to override NAME and switch section.
32; If we don't do the latter we end up with an unused 'text' section.
33;
34
35; Drop the asmdefs-first.mac header for native bs3kit files.
36%undef RT_ASMDEFS_INC_FIRST_FILE
37
38;;
39; Macro for setting register aliases according to the bit count given by %1.
40;
41%macro BS3_SET_REG_ALIASES 1
42 ;
43 ; Register aliases.
44 ;
45 %if %1 == 64
46 %define xCB 8
47 %define xDEF dq
48 %define xRES resq
49 %define xPRE qword
50 %define xSP rsp
51 %define xBP rbp
52 %define xAX rax
53 %define xBX rbx
54 %define xCX rcx
55 %define xDX rdx
56 %define xDI rdi
57 %define xSI rsi
58 %define xWrtRIP wrt rip
59 %define xPUSHF pushfq
60 %define xPOPF popfq
61 %define xRETF o64 retf
62 %elif %1 == 32
63 %define xCB 4
64 %define xDEF dd
65 %define xRES resd
66 %define xPRE dword
67 %define xSP esp
68 %define xBP ebp
69 %define xAX eax
70 %define xBX ebx
71 %define xCX ecx
72 %define xDX edx
73 %define xDI edi
74 %define xSI esi
75 %define xWrtRIP
76 %define xPUSHF pushfd
77 %define xPOPF popfd
78 %define xRETF retf
79 %elif %1 == 16
80 %define xCB 2
81 %define xDEF dw
82 %define xRES resw
83 %define xPRE word
84 %define xSP sp
85 %define xBP bp
86 %define xAX ax
87 %define xBX bx
88 %define xCX cx
89 %define xDX dx
90 %define xDI di
91 %define xSI si
92 %define xWrtRIP
93 %define xPUSHF pushf
94 %define xPOPF popf
95 %define xRETF retf
96 %else
97 %error "Invalid BS3_SET_REG_ALIASES argument:" %1
98 %endif
99
100
101 ;
102 ; Register names corresponding to the max size for pop/push <reg>.
103 ;
104 ; 16-bit can push both 32-bit and 16-bit registers. This 's' prefixed variant
105 ; is used when 16-bit should use the 32-bit register.
106 ;
107 %if %1 == 64
108 %define sCB 8
109 %define sDEF dq
110 %define sRES resq
111 %define sPRE qword
112 %define sSP rsp
113 %define sBP rbp
114 %define sAX rax
115 %define sBX rbx
116 %define sCX rcx
117 %define sDX rdx
118 %define sDI rdi
119 %define sSI rsi
120 %define sPUSHF pushfq
121 %define sPOPF popfq
122 %else
123 %define sCB 4
124 %define sDEF dd
125 %define sRES resd
126 %define sPRE dword
127 %define sSP esp
128 %define sBP ebp
129 %define sAX eax
130 %define sBX ebx
131 %define sCX ecx
132 %define sDX edx
133 %define sDI edi
134 %define sSI esi
135 %define sPUSHF pushfd
136 %define sPOPF popfd
137 %endif
138%endmacro
139
140;;
141; Redefines macros that follows __BITS__.
142%macro BS3_SET_BITS_MACROS 1
143 ;; Emulate the __BITS__ macro in NASM 2.0+. Follows BS3_SET_BITS.
144 %ifdef __YASM__
145 %undef __BITS__
146 %define __BITS__ %1
147 %endif
148
149 ;; Mostly internal macro. Follows BS3_SET_BITS.
150 %undef BS3_NAME_UNDERSCORE
151 %define BS3_NAME_UNDERSCORE _
152
153 ;; For segment overrides and stuff. Follows BS3_SET_BITS.
154 %undef BS3_ONLY_16BIT
155 %if %1 == 16
156 %define BS3_ONLY_16BIT(a_Expr) a_Expr
157 %else
158 %define BS3_ONLY_16BIT(a_Expr)
159 %endif
160
161 ;; For odd 64-bit stuff. Follows BS3_SET_BITS.
162 %undef BS3_ONLY_64BIT
163 %if %1 == 64
164 %define BS3_ONLY_64BIT(a_Expr) a_Expr
165 %else
166 %define BS3_ONLY_64BIT(a_Expr)
167 %endif
168
169 ;; For segment overrides and stuff. Follows BS3_SET_BITS.
170 %undef BS3_NOT_64BIT
171 %if %1 == 64
172 %define BS3_NOT_64BIT(a_Expr)
173 %else
174 %define BS3_NOT_64BIT(a_Expr) a_Expr
175 %endif
176
177 ;; For stack cleanups and similar where each bit mode is different. Follows BS3_SET_BITS.
178 %undef BS3_IF_16_32_64BIT
179 %if %1 == 16
180 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_16BitExpr
181 %elif %1 == 32
182 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_32BitExpr
183 %else
184 %define BS3_IF_16_32_64BIT(a_16BitExpr, a_32BitExpr, a_64BitExpr) a_64BitExpr
185 %endif
186
187 ;; For RIP relative addressing in 64-bit mode and absolute addressing in
188 ; other modes. Follows BS3_SET_BITS.
189 %undef BS3_WRT_RIP
190 %if %1 == 64
191 %define BS3_WRT_RIP(a_Sym) rel a_Sym
192 %else
193 %define BS3_WRT_RIP(a_Sym) a_Sym
194 %endif
195
196 %undef BS3_LEA_MOV_WRT_RIP
197 %if %1 == 64
198 %define BS3_LEA_MOV_WRT_RIP(a_DstReg, a_Sym) lea a_DstReg, [BS3_WRT_RIP(a_Sym)]
199 %else
200 %define BS3_LEA_MOV_WRT_RIP(a_DstReg, a_Sym) mov a_DstReg, a_Sym
201 %endif
202
203 ;; @def BS3_DATA16_WRT
204 ; For accessing BS3DATA16 correctly.
205 ; @param a_Var The BS3DATA16 variable.
206 %undef BS3_DATA16_WRT
207 %if %1 == 16
208 %define BS3_DATA16_WRT(a_Var) a_Var wrt BS3KIT_GRPNM_DATA16
209 %elif %1 == 32
210 %define BS3_DATA16_WRT(a_Var) a_Var wrt FLAT
211 %else
212 %define BS3_DATA16_WRT(a_Var) BS3_WRT_RIP(a_Var) wrt FLAT
213 %endif
214
215 ;; @def BS3_TEXT16_WRT
216 ; For accessing BS3DATA16 correctly.
217 ; @param a_Label The BS3TEXT16 label.
218 %undef BS3_TEXT16_WRT
219 %if %1 == 16
220 %define BS3_TEXT16_WRT(a_Label) a_Label wrt CGROUP16
221 %elif %1 == 32
222 %define BS3_TEXT16_WRT(a_Label) a_Label wrt FLAT
223 %else
224 %define BS3_TEXT16_WRT(a_Label) BS3_WRT_RIP(a_Label) wrt FLAT
225 %endif
226
227 %undef BS3_IF_16BIT_OTHERWISE
228 %if %1 == 16
229 %define BS3_IF_16BIT_OTHERWISE(a_16BitExpr, a_OtherwiseExpr) a_16BitExpr
230 %else
231 %define BS3_IF_16BIT_OTHERWISE(a_16BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
232 %endif
233
234 %undef BS3_IF_32BIT_OTHERWISE
235 %if %1 == 32
236 %define BS3_IF_32BIT_OTHERWISE(a_32BitExpr, a_OtherwiseExpr) a_32BitExpr
237 %else
238 %define BS3_IF_32BIT_OTHERWISE(a_32BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
239 %endif
240
241 %undef BS3_IF_64BIT_OTHERWISE
242 %if %1 == 64
243 %define BS3_IF_64BIT_OTHERWISE(a_64BitExpr, a_OtherwiseExpr) a_64BitExpr
244 %else
245 %define BS3_IF_64BIT_OTHERWISE(a_64BitExpr, a_OtherwiseExpr) a_OtherwiseExpr
246 %endif
247
248 ;;
249 ; Same as BS3_CMN_NM except in 16-bit mode, it will generate the far name.
250 ; (16-bit code generally have both near and far callable symbols, so we won't
251 ; be restricted to 64KB test code.)
252 %if %1 == 16
253 %define BS3_CMN_NM_FAR(a_Name) BS3_NAME_UNDERSCORE %+ a_Name %+ _f %+ __BITS__
254 %else
255 %define BS3_CMN_NM_FAR(a_Name) BS3_CMN_NM(a_Name)
256 %endif
257
258%endmacro
259
260; Default to register aliases for ARCH_BITS.
261BS3_SET_REG_ALIASES ARCH_BITS
262
263; Define macros for ARCH_BITS.
264BS3_SET_BITS_MACROS ARCH_BITS
265
266
267;; Wrapper around BITS.
268; Updates __BITS__ (built-in variable in nasm, we work it for yasm) as well
269; a number of convenient macros and register aliases.
270;
271; @param %1 The CPU bit count: 16, 32 or 64
272; @remarks ARCH_BITS is not modified and will remain what it was on the
273; assembler command line.
274%macro BS3_SET_BITS 1
275 BITS %1
276 BS3_SET_BITS_MACROS %1
277 BS3_SET_REG_ALIASES %1
278%endmacro
279
280;;
281; For instruction that should only be emitted in 16-bit mode. Follows BS3_SET_BITS.
282; BONLY16 normally goes in column 1.
283%macro BONLY16 1+
284 %if __BITS__ == 16
285 %1
286 %endif
287%endmacro
288
289;;
290; For instruction that should only be emitted in 32-bit mode. Follows BS3_SET_BITS.
291; BONLY32 normally goes in column 1.
292%macro BONLY32 1+
293 %if __BITS__ == 32
294 %1
295 %endif
296%endmacro
297
298;;
299; For instruction that should only be emitted in 64-bit mode. Follows BS3_SET_BITS.
300; BONLY64 normally goes in column 1.
301%macro BONLY64 1+
302 %if __BITS__ == 64
303 %1
304 %endif
305%endmacro
306
307
308
309;; @name Segment definitions.
310;; @{
311
312%ifndef ASM_FORMAT_BIN
313; !!HACK ALERT!!
314;
315; To make FLAT actually be flat, i.e. have a base of 0 rather than the same as
316; the target (?) segment, we tweak it a little bit here. We associate a segment
317; with it so that we can get at it in the class/segment ordering directives
318; we pass to the linker. The segment does not contain any data or anything, it
319; is just an empty one which we assign the address of zero.
320;
321; Look for 'clname BS3FLAT segaddr=0x0000' and 'segment BS3FLAT segaddr=0x0000'
322; in the makefile.
323;
324; !!HACK ALERT!!
325segment BS3FLAT use32 class=BS3FLAT
326GROUP FLAT BS3FLAT
327%endif
328
329
330%macro BS3_BEGIN_TEXT16 0-1 2
331 %ifndef BS3_BEGIN_TEXT16_NOT_FIRST
332 %define BS3_BEGIN_TEXT16_NOT_FIRST
333 section BS3TEXT16 align=%1 CLASS=BS3CLASS16CODE PUBLIC USE16
334 %ifndef BS3_BEGIN_TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
335 %ifndef BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
336 %define BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
337 section BS3TEXT16_NEARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
338 %endif
339 %ifndef BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
340 %define BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
341 section BS3TEXT16_FARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
342 %endif
343 GROUP CGROUP16 BS3TEXT16 BS3TEXT16_NEARSTUBS BS3TEXT16_FARSTUBS
344 section BS3TEXT16
345 %endif
346 %else
347 section BS3TEXT16
348 %endif
349 %undef BS3_CUR_SEG_BEGIN_MACRO
350 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16
351 BS3_SET_BITS 16
352%endmacro
353
354%macro BS3_BEGIN_TEXT16_NEARSTUBS 0
355 %ifndef BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
356 %define BS3_BEGIN_TEXT16_NEARSTUBS_NOT_FIRST
357 section BS3TEXT16_NEARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
358 %else
359 section BS3TEXT16_NEARSTUBS
360 %endif
361 %undef BS3_CUR_SEG_BEGIN_MACRO
362 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16_NEARSTUBS
363 BS3_SET_BITS 16
364%endmacro
365
366%macro BS3_BEGIN_TEXT16_FARSTUBS 0
367 %ifndef BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
368 %define BS3_BEGIN_TEXT16_FARSTUBS_NOT_FIRST
369 section BS3TEXT16_FARSTUBS align=1 CLASS=BS3CLASS16CODE PUBLIC USE16
370 %else
371 section BS3TEXT16_FARSTUBS
372 %endif
373 %undef BS3_CUR_SEG_BEGIN_MACRO
374 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT16_FARSTUBS
375 BS3_SET_BITS 16
376%endmacro
377
378%macro BS3_BEGIN_RMTEXT16 0-1 2
379 %ifndef BS3_BEGIN_RMTEXT16_NOT_FIRST
380 %define BS3_BEGIN_RMTEXT16_NOT_FIRST
381 section BS3RMTEXT16 align=%1 CLASS=BS3CLASS16RMCODE PUBLIC USE16
382 %ifndef BS3_BEGIN_RMTEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
383 GROUP BS3GROUPRMTEXT16 BS3RMTEXT16
384 %endif
385 %else
386 section BS3RMTEXT16
387 %endif
388 %undef BS3_CUR_SEG_BEGIN_MACRO
389 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_RMTEXT16
390 BS3_SET_BITS 16
391%endmacro
392
393%macro BS3_BEGIN_X0TEXT16 0-1 2
394 %ifndef BS3_BEGIN_X0TEXT16_NOT_FIRST
395 %define BS3_BEGIN_X0TEXT16_NOT_FIRST
396 section BS3X0TEXT16 align=%1 CLASS=BS3CLASS16X0CODE PUBLIC USE16
397 %ifndef BS3_BEGIN_X0TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
398 GROUP BS3GROUPX0TEXT16 BS3X0TEXT16
399 %endif
400 %else
401 section BS3X0TEXT16
402 %endif
403 %undef BS3_CUR_SEG_BEGIN_MACRO
404 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_X0TEXT16
405 BS3_SET_BITS 16
406%endmacro
407
408%macro BS3_BEGIN_X1TEXT16 0-1 2
409 %ifndef BS3_BEGIN_X1TEXT16_NOT_FIRST
410 %define BS3_BEGIN_X1TEXT16_NOT_FIRST
411 section BS3X1TEXT16 align=%1 CLASS=BS3CLASS16X1CODE PUBLIC USE16
412 %ifndef BS3_BEGIN_X1TEXT16_WITHOUT_GROUP ; bs3-first-common.mac trick.
413 GROUP BS3GROUPX1TEXT16 BS3X1TEXT16
414 %endif
415 %else
416 section BS3X1TEXT16
417 %endif
418 %undef BS3_CUR_SEG_BEGIN_MACRO
419 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_X1TEXT16
420 BS3_SET_BITS 16
421%endmacro
422
423
424%macro BS3_BEGIN_DATA16 0-1 2
425 %ifndef BS3_BEGIN_DATA16_NOT_FIRST
426 %define BS3_BEGIN_DATA16_NOT_FIRST
427 section BS3DATA16 align=%1 CLASS=BS3KIT_CLASS_DATA16 PUBLIC USE16
428 %ifndef BS3_BEGIN_DATA16_WITHOUT_GROUP ; bs3-first-common.mac trick.
429 GROUP BS3KIT_GRPNM_DATA16 BS3DATA16
430 %endif
431 %else
432 section BS3DATA16
433 %endif
434 %undef BS3_CUR_SEG_BEGIN_MACRO
435 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA16
436 BS3_SET_BITS 16
437%endmacro
438
439%macro BS3_BEGIN_TEXT32 0-1 2
440 %ifndef BS3_BEGIN_TEXT32_NOT_FIRST
441 %define BS3_BEGIN_TEXT32_NOT_FIRST
442 section BS3TEXT32 align=%1 CLASS=BS3CLASS32CODE PUBLIC USE32 FLAT
443 %else
444 section BS3TEXT32
445 %endif
446 %undef BS3_CUR_SEG_BEGIN_MACRO
447 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT32
448 BS3_SET_BITS 32
449%endmacro
450
451%macro BS3_BEGIN_DATA32 0-1 16
452 %ifndef BS3_BEGIN_DATA32_NOT_FIRST
453 %define BS3_BEGIN_DATA32_NOT_FIRST
454 section BS3DATA32 align=%1 CLASS=FAR_DATA PUBLIC USE32 ;FLAT - compiler doesn't make data flat.
455 %else
456 section BS3DATA32
457 %endif
458 %undef BS3_CUR_SEG_BEGIN_MACRO
459 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA32
460 BS3_SET_BITS 32
461%endmacro
462
463%macro BS3_BEGIN_TEXT64 0-1 2
464 %ifndef BS3_BEGIN_TEXT64_NOT_FIRST
465 %define BS3_BEGIN_TEXT64_NOT_FIRST
466 section BS3TEXT64 align=%1 CLASS=BS3CLASS64CODE PUBLIC USE32 FLAT
467 %else
468 section BS3TEXT64
469 %endif
470 %undef BS3_CUR_SEG_BEGIN_MACRO
471 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_TEXT64
472 BS3_SET_BITS 64
473%endmacro
474
475%macro BS3_BEGIN_DATA64 0-1 16
476 %ifndef BS3_BEGIN_DATA64_NOT_FIRST
477 %define BS3_BEGIN_DATA64_NOT_FIRST
478 section BS3DATA64 align=%1 CLASS=FAR_DATA PUBLIC USE32 ;FLAT (see DATA32)
479 %else
480 section BS3DATA64
481 %endif
482 %undef BS3_CUR_SEG_BEGIN_MACRO
483 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_DATA64
484 BS3_SET_BITS 64
485%endmacro
486
487;; The system data segment containing the GDT, TSSes and IDTs.
488%macro BS3_BEGIN_SYSTEM16 0-1 16
489 %ifndef BS3_BEGIN_SYSTEM16_NOT_FIRST
490 %define BS3_BEGIN_SYSTEM16_NOT_FIRST
491 section BS3SYSTEM16 align=%1 CLASS=BS3SYSTEM16 PUBLIC USE16
492 %else
493 section BS3SYSTEM16
494 %endif
495 %undef BS3_CUR_SEG_BEGIN_MACRO
496 %xdefine BS3_CUR_SEG_BEGIN_MACRO BS3_BEGIN_SYSTEM16
497 BS3_SET_BITS 16
498%endmacro
499
500;; Default text section.
501%macro BS3_BEGIN_DEFAULT_TEXT 0
502 %if ARCH_BITS == 16
503 BS3_BEGIN_TEXT16
504 %elif ARCH_BITS == 32
505 BS3_BEGIN_TEXT32
506 %elif ARCH_BITS == 64
507 BS3_BEGIN_TEXT64
508 %else
509 %error "ARCH_BITS must be defined as either 16, 32, or 64!"
510 INVALID_ARCH_BITS
511 %endif
512%endmacro
513
514;; @}
515
516
517;
518; Now, ditch the default 'text' section and define our own NAME macro.
519;
520%ifndef ASM_FORMAT_BIN
521 BS3_BEGIN_DEFAULT_TEXT
522 BS3_BEGIN_DEFAULT_TEXT ; stupid nasm automagically repeats the segment attributes.
523%endif
524
525;; When using watcom + OMF, we're using __cdecl by default, which
526; get an underscore added in front.
527%define NAME(name) _ %+ NAME_OVERLOAD(name)
528
529
530;
531; Include the standard headers from iprt.
532;
533
534
535%include "iprt/asmdefs.mac"
536%include "iprt/x86.mac"
537
538
539;;
540; Extern macro which mangles the name using NAME().
541%macro EXTERN 1
542 extern NAME(%1)
543%endmacro
544
545;;
546; Mangles a common name according to the current cpu bit count.
547; @remarks Requires the use of the BS3_SET_BITS macro instead of the BITS directive.
548%define BS3_CMN_NM(a_Name) BS3_NAME_UNDERSCORE %+ a_Name %+ _c %+ __BITS__
549
550;;
551; Extern macro which mangles the common name correctly, redefining the unmangled
552; name to the mangled one for ease of use.
553;
554; @param %1 The unmangled common name.
555;
556; @remarks Must enter the segment in which this name is defined.
557;
558%macro BS3_EXTERN_CMN 1
559 extern BS3_CMN_NM(%1)
560 %undef %1
561 %define %1 BS3_CMN_NM(%1)
562%endmacro
563
564;;
565; Same as BS3_EXTERN_CMN except it picks the far variant in 16-bit code.
566;
567; @param %1 The unmangled common name.
568;
569; @remarks Must enter the segment in which this name is defined.
570;
571%macro BS3_EXTERN_CMN_FAR 1
572 extern BS3_CMN_NM_FAR(%1)
573 %undef %1
574 %define %1 BS3_CMN_NM_FAR(%1)
575%endmacro
576
577;; @def BS3_EXTERN_TMPL
578; Mangles the given name into a template specific one. For ease of use, the
579; name is redefined to the mangled one, just like BS3_EXTERN_CMN does.
580; @note Segment does not change.
581%macro BS3_EXTERN_TMPL 1
582 extern TMPL_NM(%1)
583 %undef %1
584 %define %1 TMPL_NM(%1)
585%endmacro
586
587
588;;
589; Mangles a 16-bit and 32-bit accessible data name.
590; @remarks Requires the use of the BS3_SET_BITS macro instead of the BITS directive.
591%define BS3_DATA_NM(a_Name) _ %+ a_Name
592
593;;
594; Extern macro which mangles a DATA16 symbol correctly, redefining the
595; unmangled name to the mangled one for ease of use.
596;
597; @param %1 The unmangled common name.
598;
599; @remarks Will change to the DATA16 segment, use must switch back afterwards!
600;
601%macro BS3_EXTERN_DATA16 1
602 BS3_BEGIN_DATA16
603 extern _ %+ %1
604 %undef %1
605 %define %1 _ %+ %1
606%endmacro
607
608;;
609; Extern macro which mangles a BS3SYSTEM16 symbol correctly, redefining the
610; unmangled name to the mangled one for ease of use.
611;
612; @param %1 The unmangled common name.
613;
614; @remarks Will change to the SYSTEM16 segment, use must switch back afterwards!
615;
616%macro BS3_EXTERN_SYSTEM16 1
617 BS3_BEGIN_SYSTEM16
618 extern _ %+ %1
619 %undef %1
620 %define %1 _ %+ %1
621%endmacro
622
623
624;;
625; Global name with ELF attributes and size.
626;
627; This differs from GLOBALNAME_EX in that it expects a mangled symbol name,
628; and allows for nasm style symbol size expressions.
629;
630; @param %1 The mangled name.
631; @param %2 Symbol attributes.
632; @param %3 The size expression.
633;
634%macro BS3_GLOBAL_NAME_EX 3
635global %1
636%1:
637%undef BS3_LAST_LABEL
638%xdefine BS3_LAST_LABEL %1
639%endmacro
640
641;;
642; Global local label.
643;
644; This should be used when switching segments and jumping to it via a local lable.
645; It makes the lable visible to the debugger and map file.
646;
647%macro BS3_GLOBAL_LOCAL_LABEL 1
648global RT_CONCAT(BS3_LAST_LABEL,%1)
649%1:
650%endmacro
651
652;;
653; Global data unmangled label.
654;
655; @param %1 The unmangled name.
656; @param %2 The size (0 is fine).
657;
658%macro BS3_GLOBAL_DATA 2
659BS3_GLOBAL_NAME_EX BS3_DATA_NM(%1), , %2
660%endmacro
661
662;;
663; Starts a procedure.
664;
665; This differs from BEGINPROC in that it expects a mangled symbol name and
666; does the NASM symbol size stuff.
667;
668; @param %1 The mangled name.
669;
670%macro BS3_PROC_BEGIN 1
671BS3_GLOBAL_NAME_EX %1, function, (%1 %+ _EndProc - %1)
672%endmacro
673
674;;
675; Ends a procedure.
676;
677; Counter part to BS3_PROC_BEGIN.
678;
679; @param %1 The mangled name.
680;
681%macro BS3_PROC_END 1
682BS3_GLOBAL_NAME_EX %1 %+ _EndProc, function hidden, (%1 %+ _EndProc - %1)
683 int3 ; handy and avoids overlapping labels.
684%endmacro
685
686
687;; @name BS3_PBC_XXX - For use as the 2nd parameter to BS3_PROC_BEGIN_CMN and BS3_PROC_BEGIN_MODE.
688;; @{
689%define BS3_PBC_NEAR 1 ;;< Only near.
690%define BS3_PBC_FAR 2 ;;< Only far.
691%define BS3_PBC_HYBRID 3 ;;< Hybrid near/far procedure, trashing AX
692%define BS3_PBC_HYBRID_SAFE 4 ;;< Hybrid near/far procedure, no trashing but slower.
693%define BS3_PBC_HYBRID_0_ARGS 5 ;;< Hybrid near/far procedure, no parameters so separate far stub, no trashing, fast near calls.
694;; @}
695
696;; Internal begin procedure macro.
697;
698; @param 1 The near name.
699; @param 2 The far name
700; @param 3 BS3_PBC_XXX.
701%macro BS3_PROC_BEGIN_INT 3
702 ;%warning "BS3_PROC_BEGIN_INT:" 1=%1 2=%2 3=%3
703 %undef BS3_CUR_PROC_FLAGS
704 %if __BITS__ == 16
705 %if %3 == BS3_PBC_NEAR
706 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
707 %xdefine cbCurRetAddr 2
708 BS3_PROC_BEGIN %1
709
710 %elif %3 == BS3_PBC_FAR
711 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_FAR
712 %xdefine cbCurRetAddr 4
713 BS3_PROC_BEGIN %2
714
715 %elif %3 == BS3_PBC_HYBRID
716 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_HYBRID
717 %xdefine cbCurRetAddr 4
718 BS3_GLOBAL_NAME_EX %1, function, 3
719 pop ax
720 push cs
721 push ax
722 BS3_PROC_BEGIN %2
723
724 %elif %3 == BS3_PBC_HYBRID_SAFE
725 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_HYBRID_SAFE
726 %xdefine cbCurRetAddr 4
727 BS3_GLOBAL_NAME_EX %1, function, 3
728 extern Bs3CreateHybridFarRet_c16
729 call Bs3CreateHybridFarRet_c16
730 BS3_PROC_BEGIN %2
731
732 %elif %3 == BS3_PBC_HYBRID_0_ARGS
733 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
734 %xdefine cbCurRetAddr 2
735 %xdefine TMP_BEGIN_PREV_SEG BS3_CUR_SEG_BEGIN_MACRO
736
737 BS3_BEGIN_TEXT16_FARSTUBS
738 BS3_PROC_BEGIN %2
739 call %1
740 retf
741 BS3_PROC_END %2
742
743 TMP_BEGIN_PREV_SEG
744 BS3_PROC_BEGIN %1
745 %undef TMP_BEGIN_PREV_SEG
746
747 %else
748 %error BS3_PROC_BEGIN_CMN parameter 2 value %3 is not recognized.
749
750 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
751 %xdefine cbCurRetAddr 4
752 BS3_PROC_BEGIN %1
753 %endif
754 %else
755 %xdefine BS3_CUR_PROC_FLAGS BS3_PBC_NEAR
756 %xdefine cbCurRetAddr xCB
757 BS3_PROC_BEGIN %1
758 %endif
759%endmacro
760
761;; Internal end procedure macro
762;
763; @param 1 The near name.
764; @param 2 The far name
765;
766%macro BS3_PROC_END_INT 2
767 %if __BITS__ == 16
768 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR
769 BS3_PROC_END %1
770 %else
771 BS3_PROC_END %2
772 %endif
773 %else
774 BS3_PROC_END %1
775 %endif
776 %undef BS3_CUR_PROC_FLAGS
777 %undef cbCurRetAddr
778%endmacro
779
780
781;; Convenience macro for defining common procedures.
782; This will emit both near and far 16-bit symbols according to parameter %2 (BS3_PBC_XXX).
783%macro BS3_PROC_BEGIN_CMN 2
784 BS3_PROC_BEGIN_INT BS3_CMN_NM(%1), BS3_CMN_NM_FAR(%1), %2
785%endmacro
786
787;; Convenience macro for defining common procedures.
788%macro BS3_PROC_END_CMN 1
789 BS3_PROC_END_INT BS3_CMN_NM(%1), BS3_CMN_NM_FAR(%1)
790%endmacro
791
792;;
793; Generate a safe 16-bit far stub for function %1, shuffling %2 bytes of parameters.
794;
795; This does absolutely nothing in 32-bit and 64-bit mode.
796;
797; @param 1 The function basename.
798; @param 2 The number of bytes of parameters on the stack, must be a multiple of 2.
799; @remarks Changes the segment to TEXT16.
800;
801%macro BS3_CMN_FAR_STUB 2
802 %if %2 <= 1 || (%2 & 1)
803 %error Invalid parameter frame size passed to BS3_CMN_FAR_STUB: %2
804 %endif
805 %if __BITS__ == 16
806BS3_BEGIN_TEXT16_FARSTUBS
807BS3_PROC_BEGIN_CMN %1, BS3_PBC_FAR
808 CPU 8086
809 inc bp ; Odd bp is far call indicator.
810 push bp
811 mov bp, sp
812 %assign offParam %2
813 %rep %2/2
814 push word [bp + xCB + cbCurRetAddr + offParam - 2]
815 %assign offParam offParam - 2
816 %endrep
817 call BS3_CMN_NM(%1)
818 add sp, %2
819 pop bp
820 dec bp
821 retf
822BS3_PROC_END_CMN %1
823BS3_BEGIN_TEXT16
824 %endif
825%endmacro
826
827
828;; Convenience macro for defining mode specific procedures.
829%macro BS3_PROC_BEGIN_MODE 2
830 ;%warning "BS3_PROC_BEGIN_MODE: 1=" %1 "2=" %2
831 BS3_PROC_BEGIN_INT TMPL_NM(%1), TMPL_FAR_NM(%1), %2
832%endmacro
833
834;; Convenience macro for defining mode specific procedures.
835%macro BS3_PROC_END_MODE 1
836 BS3_PROC_END_INT TMPL_NM(%1), TMPL_FAR_NM(%1)
837%endmacro
838
839;; Does a far return in 16-bit code, near return in 32-bit and 64-bit.
840; This is for use with BS3_PBC_XXX
841%macro BS3_HYBRID_RET 0-1
842 %if __BITS__ == 16
843 %if %0 > 0
844 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR || BS3_CUR_PROC_FLAGS == BS3_PBC_HYBRID_0_ARGS
845 ret %1
846 %else
847 retf %1
848 %endif
849 %else
850 %if BS3_CUR_PROC_FLAGS == BS3_PBC_NEAR || BS3_CUR_PROC_FLAGS == BS3_PBC_HYBRID_0_ARGS
851 ret
852 %else
853 retf
854 %endif
855 %endif
856 %else
857 %if BS3_CUR_PROC_FLAGS != BS3_PBC_NEAR
858 %error Expected BS3_CUR_PROC_FLAGS to be BS3_PBC_NEAR in non-16-bit code.
859 %endif
860 %if %0 > 0
861 ret %1
862 %else
863 ret
864 %endif
865 %endif
866%endmacro
867
868
869;;
870; Prologue hacks for 64-bit code.
871;
872; This saves the four register parameters onto the stack so we can pretend
873; the calling convention is stack based. The 64-bit calling convension is
874; the microsoft one, so this is straight forward.
875;
876; Pairs with BS3_CALL_CONV_EPILOG.
877;
878; @param %1 The number of parameters.
879;
880; @remarks Must be invoked before any stack changing instructions are emitted.
881;
882%macro BS3_CALL_CONV_PROLOG 1
883 %undef BS3_CALL_CONV_PROLOG_PARAMS
884 %define BS3_CALL_CONV_PROLOG_PARAMS %1
885 %if __BITS__ == 64
886 %if %1 >= 1
887 mov [rsp + 008h], rcx
888 %elifdef BS3_STRICT
889 and qword [rsp + 008h], 1
890 %endif
891 %if %1 >= 2
892 mov [rsp + 010h], rdx
893 %elifdef BS3_STRICT
894 and qword [rsp + 010h], 2
895 %endif
896 %if %1 >= 3
897 mov [rsp + 018h], r8
898 %elifdef BS3_STRICT
899 and qword [rsp + 018h], 3
900 %endif
901 %if %1 >= 4
902 mov [rsp + 020h], r9
903 %elifdef BS3_STRICT
904 and qword [rsp + 020h], 4
905 %endif
906 %endif
907%endmacro
908
909;;
910; Epilogue hacks for 64-bit code.
911;
912; Counter part to BS3_CALL_CONV_PROLOG.
913;
914; @param %1 The number of parameters.
915;
916; @remarks Must be invoked right before the return instruction as it uses RSP.
917;
918%macro BS3_CALL_CONV_EPILOG 1
919 %if BS3_CALL_CONV_PROLOG_PARAMS != %1
920 %error "BS3_CALL_CONV_EPILOG argument differs from BS3_CALL_CONV_PROLOG."
921 %endif
922 %if __BITS__ == 64
923 %ifdef BS3_STRICT
924 mov dword [rsp + 008h], 31h
925 mov dword [rsp + 010h], 32h
926 mov dword [rsp + 018h], 33h
927 mov dword [rsp + 020h], 34h
928 %endif
929 %endif
930%endmacro
931
932;;
933; Wrapper for the call instruction that hides calling convension differences.
934;
935; This always calls %1.
936; In 64-bit code, it will load up to 4 parameters into register.
937;
938; @param %1 The function to call (mangled).
939; @param %2 The number of parameters.
940;
941%macro BS3_CALL 2
942 %if __BITS__ == 64
943 %if %2 >= 1
944 mov rcx, [rsp]
945 %ifdef BS3_STRICT
946 and qword [rsp], 11h
947 %endif
948 %endif
949 %if %2 >= 2
950 mov rdx, [rsp + 008h]
951 %ifdef BS3_STRICT
952 and qword [rsp + 008h], 12h
953 %endif
954 %endif
955 %if %2 >= 3
956 mov r8, [rsp + 010h]
957 %ifdef BS3_STRICT
958 and qword [rsp + 010h], 13h
959 %endif
960 %endif
961 %if %2 >= 4
962 mov r9, [rsp + 018h]
963 %ifdef BS3_STRICT
964 and qword [rsp + 018h], 14h
965 %endif
966 %endif
967 %endif
968 call %1
969%endmacro
970
971
972;; @name Execution Modes
973; @{
974%define BS3_MODE_INVALID 000h
975%define BS3_MODE_RM 001h ;;< real mode.
976%define BS3_MODE_PE16 011h ;;< 16-bit protected mode kernel+tss, running 16-bit code, unpaged.
977%define BS3_MODE_PE16_32 012h ;;< 16-bit protected mode kernel+tss, running 32-bit code, unpaged.
978%define BS3_MODE_PE16_V86 018h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode code, unpaged.
979%define BS3_MODE_PE32 022h ;;< 32-bit protected mode kernel+tss, running 32-bit code, unpaged.
980%define BS3_MODE_PE32_16 021h ;;< 32-bit protected mode kernel+tss, running 16-bit code, unpaged.
981%define BS3_MODE_PEV86 028h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode code, unpaged.
982%define BS3_MODE_PP16 031h ;;< 16-bit protected mode kernel+tss, running 16-bit code, paged.
983%define BS3_MODE_PP16_32 032h ;;< 16-bit protected mode kernel+tss, running 32-bit code, paged.
984%define BS3_MODE_PP16_V86 038h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode code, paged.
985%define BS3_MODE_PP32 042h ;;< 32-bit protected mode kernel+tss, running 32-bit code, paged.
986%define BS3_MODE_PP32_16 041h ;;< 32-bit protected mode kernel+tss, running 16-bit code, paged.
987%define BS3_MODE_PPV86 048h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode code, paged.
988%define BS3_MODE_PAE16 051h ;;< 16-bit protected mode kernel+tss, running 16-bit code, PAE paging.
989%define BS3_MODE_PAE16_32 052h ;;< 16-bit protected mode kernel+tss, running 32-bit code, PAE paging.
990%define BS3_MODE_PAE16_V86 058h ;;< 16-bit protected mode kernel+tss, running virtual 8086 mode, PAE paging.
991%define BS3_MODE_PAE32 062h ;;< 32-bit protected mode kernel+tss, running 32-bit code, PAE paging.
992%define BS3_MODE_PAE32_16 061h ;;< 32-bit protected mode kernel+tss, running 16-bit code, PAE paging.
993%define BS3_MODE_PAEV86 068h ;;< 32-bit protected mode kernel+tss, running virtual 8086 mode, PAE paging.
994%define BS3_MODE_LM16 071h ;;< 16-bit long mode (paged), kernel+tss always 64-bit.
995%define BS3_MODE_LM32 072h ;;< 32-bit long mode (paged), kernel+tss always 64-bit.
996%define BS3_MODE_LM64 074h ;;< 64-bit long mode (paged), kernel+tss always 64-bit.
997
998%define BS3_MODE_CODE_MASK 00fh ;;< Running code mask.
999%define BS3_MODE_CODE_16 001h ;;< Running 16-bit code.
1000%define BS3_MODE_CODE_32 002h ;;< Running 32-bit code.
1001%define BS3_MODE_CODE_64 004h ;;< Running 64-bit code.
1002%define BS3_MODE_CODE_V86 008h ;;< Running 16-bit virtual 8086 code.
1003
1004%define BS3_MODE_SYS_MASK 0f0h ;;< kernel+tss mask.
1005%define BS3_MODE_SYS_RM 000h ;;< Real mode kernel+tss.
1006%define BS3_MODE_SYS_PE16 010h ;;< 16-bit protected mode kernel+tss.
1007%define BS3_MODE_SYS_PE32 020h ;;< 32-bit protected mode kernel+tss.
1008%define BS3_MODE_SYS_PP16 030h ;;< 16-bit paged protected mode kernel+tss.
1009%define BS3_MODE_SYS_PP32 040h ;;< 32-bit paged protected mode kernel+tss.
1010%define BS3_MODE_SYS_PAE16 050h ;;< 16-bit PAE paged protected mode kernel+tss.
1011%define BS3_MODE_SYS_PAE32 060h ;;< 32-bit PAE paged protected mode kernel+tss.
1012%define BS3_MODE_SYS_LM 070h ;;< 64-bit (paged) long mode protected mode kernel+tss.
1013
1014;; Whether the mode has paging enabled.
1015%define BS3_MODE_IS_PAGED(a_fMode) ((a_fMode) >= BS3_MODE_PP16)
1016
1017;; Whether the mode is running v8086 code.
1018%define BS3_MODE_IS_V86(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_V86)
1019;; Whether the we're executing in real mode or v8086 mode.
1020%define BS3_MODE_IS_RM_OR_V86(a_fMode) ((a_fMode) == BS3_MODE_RM || BS3_MODE_IS_V86(a_fMode))
1021;; Whether the mode is running 16-bit code, except v8086.
1022%define BS3_MODE_IS_16BIT_CODE_NO_V86(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_16)
1023;; Whether the mode is running 16-bit code (includes v8086).
1024%define BS3_MODE_IS_16BIT_CODE(a_fMode) (BS3_MODE_IS_16BIT_CODE_NO_V86(a_fMode) || BS3_MODE_IS_V86(a_fMode))
1025;; Whether the mode is running 32-bit code.
1026%define BS3_MODE_IS_32BIT_CODE(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_32)
1027;; Whether the mode is running 64-bit code.
1028%define BS3_MODE_IS_64BIT_CODE(a_fMode) (((a_fMode) & BS3_MODE_CODE_MASK) == BS3_MODE_CODE_64)
1029
1030;; Whether the system is in real mode.
1031%define BS3_MODE_IS_RM_SYS(a_fMode) (((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_RM)
1032;; Whether the system is some 16-bit mode that isn't real mode.
1033%define BS3_MODE_IS_16BIT_SYS_NO_RM(a_fMode) ( ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PE16 \
1034 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PP16 \
1035 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PAE16)
1036;; Whether the system is some 16-bit mode (includes real mode).
1037%define BS3_MODE_IS_16BIT_SYS(a_fMode) (BS3_MODE_IS_16BIT_SYS_NO_RM(a_fMode) || BS3_MODE_IS_RM_SYS(a_fMode))
1038;; Whether the system is some 32-bit mode.
1039%define BS3_MODE_IS_32BIT_SYS(a_fMode) ( ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PE32 \
1040 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PP32 \
1041 || ((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_PAE32)
1042;; Whether the system is long mode.
1043%define BS3_MODE_IS_64BIT_SYS(a_fMode) (((a_fMode) & BS3_MODE_SYS_MASK) == BS3_MODE_SYS_LM)
1044
1045;; @}
1046
1047;; @name For mode specfic lookups:
1048;; %[BS3_MODE_NM %+ BS3_MODE_PE32](SomeBaseName)
1049;; %[BS3_MODE_LNAME_ %+ TMPL_MODE]
1050;; @{
1051%define BS3_MODE_NM_001h(a_Name) _ %+ a_Name %+ _rm
1052%define BS3_MODE_NM_011h(a_Name) _ %+ a_Name %+ _pe16
1053%define BS3_MODE_NM_012h(a_Name) _ %+ a_Name %+ _pe16_32
1054%define BS3_MODE_NM_018h(a_Name) _ %+ a_Name %+ _pe16_v86
1055%define BS3_MODE_NM_022h(a_Name) _ %+ a_Name %+ _pe32
1056%define BS3_MODE_NM_021h(a_Name) _ %+ a_Name %+ _pe32_16
1057%define BS3_MODE_NM_028h(a_Name) _ %+ a_Name %+ _pev86
1058%define BS3_MODE_NM_031h(a_Name) _ %+ a_Name %+ _pp16
1059%define BS3_MODE_NM_032h(a_Name) _ %+ a_Name %+ _pp16_32
1060%define BS3_MODE_NM_038h(a_Name) _ %+ a_Name %+ _pp16_v86
1061%define BS3_MODE_NM_042h(a_Name) _ %+ a_Name %+ _pp32
1062%define BS3_MODE_NM_041h(a_Name) _ %+ a_Name %+ _pp32_16
1063%define BS3_MODE_NM_048h(a_Name) _ %+ a_Name %+ _ppv86
1064%define BS3_MODE_NM_051h(a_Name) _ %+ a_Name %+ _pae16
1065%define BS3_MODE_NM_052h(a_Name) _ %+ a_Name %+ _pae16_32
1066%define BS3_MODE_NM_058h(a_Name) _ %+ a_Name %+ _pae16_v86
1067%define BS3_MODE_NM_062h(a_Name) _ %+ a_Name %+ _pae32
1068%define BS3_MODE_NM_061h(a_Name) _ %+ a_Name %+ _pae32_16
1069%define BS3_MODE_NM_068h(a_Name) _ %+ a_Name %+ _paev86
1070%define BS3_MODE_NM_071h(a_Name) _ %+ a_Name %+ _lm16
1071%define BS3_MODE_NM_072h(a_Name) _ %+ a_Name %+ _lm32
1072%define BS3_MODE_NM_074h(a_Name) _ %+ a_Name %+ _lm64
1073
1074%define BS3_MODE_LNAME_001h rm
1075%define BS3_MODE_LNAME_011h pe16
1076%define BS3_MODE_LNAME_012h pe16_32
1077%define BS3_MODE_LNAME_018h pe16_v86
1078%define BS3_MODE_LNAME_022h pe32
1079%define BS3_MODE_LNAME_021h pe32_16
1080%define BS3_MODE_LNAME_028h pev86
1081%define BS3_MODE_LNAME_031h pp16
1082%define BS3_MODE_LNAME_032h pp16_32
1083%define BS3_MODE_LNAME_038h pp16_v86
1084%define BS3_MODE_LNAME_042h pp32
1085%define BS3_MODE_LNAME_041h pp32_16
1086%define BS3_MODE_LNAME_048h ppv86
1087%define BS3_MODE_LNAME_051h pae16
1088%define BS3_MODE_LNAME_052h pae16_32
1089%define BS3_MODE_LNAME_058h pae16_v86
1090%define BS3_MODE_LNAME_062h pae32
1091%define BS3_MODE_LNAME_061h pae32_16
1092%define BS3_MODE_LNAME_068h paev86
1093%define BS3_MODE_LNAME_071h lm16
1094%define BS3_MODE_LNAME_072h lm32
1095%define BS3_MODE_LNAME_074h lm64
1096
1097%define BS3_MODE_UNAME_001h RM
1098%define BS3_MODE_UNAME_011h PE16
1099%define BS3_MODE_UNAME_012h PE16_32
1100%define BS3_MODE_UNAME_018h PE16_V86
1101%define BS3_MODE_UNAME_022h PE32
1102%define BS3_MODE_UNAME_021h PE32_16
1103%define BS3_MODE_UNAME_028h PEV86
1104%define BS3_MODE_UNAME_031h PP16
1105%define BS3_MODE_UNAME_032h PP16_32
1106%define BS3_MODE_UNAME_038h PP16_V86
1107%define BS3_MODE_UNAME_042h PP32
1108%define BS3_MODE_UNAME_041h PP32_16
1109%define BS3_MODE_UNAME_048h PPV86
1110%define BS3_MODE_UNAME_051h PAE16
1111%define BS3_MODE_UNAME_052h PAE16_32
1112%define BS3_MODE_UNAME_058h PAE16_V86
1113%define BS3_MODE_UNAME_062h PAE32
1114%define BS3_MODE_UNAME_061h PAE32_16
1115%define BS3_MODE_UNAME_068h PAEV86
1116%define BS3_MODE_UNAME_071h LM16
1117%define BS3_MODE_UNAME_072h LM32
1118%define BS3_MODE_UNAME_074h LM64
1119
1120%define BS3_MODE_UNDERSCORE_001h _
1121%define BS3_MODE_UNDERSCORE_011h _
1122%define BS3_MODE_UNDERSCORE_012h _
1123%define BS3_MODE_UNDERSCORE_018h _
1124%define BS3_MODE_UNDERSCORE_022h _
1125%define BS3_MODE_UNDERSCORE_021h _
1126%define BS3_MODE_UNDERSCORE_028h _
1127%define BS3_MODE_UNDERSCORE_031h _
1128%define BS3_MODE_UNDERSCORE_032h _
1129%define BS3_MODE_UNDERSCORE_038h _
1130%define BS3_MODE_UNDERSCORE_042h _
1131%define BS3_MODE_UNDERSCORE_041h _
1132%define BS3_MODE_UNDERSCORE_048h _
1133%define BS3_MODE_UNDERSCORE_051h _
1134%define BS3_MODE_UNDERSCORE_052h _
1135%define BS3_MODE_UNDERSCORE_058h _
1136%define BS3_MODE_UNDERSCORE_062h _
1137%define BS3_MODE_UNDERSCORE_061h _
1138%define BS3_MODE_UNDERSCORE_068h _
1139%define BS3_MODE_UNDERSCORE_071h _
1140%define BS3_MODE_UNDERSCORE_072h _
1141%define BS3_MODE_UNDERSCORE_074h _
1142
1143%define BS3_MODE_CNAME_001h c16
1144%define BS3_MODE_CNAME_011h c16
1145%define BS3_MODE_CNAME_012h c32
1146%define BS3_MODE_CNAME_018h c16
1147%define BS3_MODE_CNAME_022h c32
1148%define BS3_MODE_CNAME_021h c16
1149%define BS3_MODE_CNAME_028h c16
1150%define BS3_MODE_CNAME_031h c16
1151%define BS3_MODE_CNAME_032h c32
1152%define BS3_MODE_CNAME_038h c16
1153%define BS3_MODE_CNAME_042h c32
1154%define BS3_MODE_CNAME_041h c16
1155%define BS3_MODE_CNAME_048h c16
1156%define BS3_MODE_CNAME_051h c16
1157%define BS3_MODE_CNAME_052h c32
1158%define BS3_MODE_CNAME_058h c16
1159%define BS3_MODE_CNAME_062h c32
1160%define BS3_MODE_CNAME_061h c16
1161%define BS3_MODE_CNAME_068h c16
1162%define BS3_MODE_CNAME_071h c16
1163%define BS3_MODE_CNAME_072h c32
1164%define BS3_MODE_CNAME_074h c64
1165;; @}
1166
1167;; @name For getting the ring-0 mode for v86 modes: %[BS3_MODE_R0_NM_001h %+ TMPL_MODE](Bs3SwitchToRM)
1168;; @{
1169%define BS3_MODE_R0_NM_001h(a_Name) _ %+ a_Name %+ _rm
1170%define BS3_MODE_R0_NM_011h(a_Name) _ %+ a_Name %+ _pe16
1171%define BS3_MODE_R0_NM_012h(a_Name) _ %+ a_Name %+ _pe16_32
1172%define BS3_MODE_R0_NM_018h(a_Name) _ %+ a_Name %+ _pe16
1173%define BS3_MODE_R0_NM_022h(a_Name) _ %+ a_Name %+ _pe32
1174%define BS3_MODE_R0_NM_021h(a_Name) _ %+ a_Name %+ _pe32_16
1175%define BS3_MODE_R0_NM_028h(a_Name) _ %+ a_Name %+ _pe32_16
1176%define BS3_MODE_R0_NM_031h(a_Name) _ %+ a_Name %+ _pp16
1177%define BS3_MODE_R0_NM_032h(a_Name) _ %+ a_Name %+ _pp16_32
1178%define BS3_MODE_R0_NM_038h(a_Name) _ %+ a_Name %+ _pp16
1179%define BS3_MODE_R0_NM_042h(a_Name) _ %+ a_Name %+ _pp32
1180%define BS3_MODE_R0_NM_041h(a_Name) _ %+ a_Name %+ _pp32_16
1181%define BS3_MODE_R0_NM_048h(a_Name) _ %+ a_Name %+ _pp32_16
1182%define BS3_MODE_R0_NM_051h(a_Name) _ %+ a_Name %+ _pae16
1183%define BS3_MODE_R0_NM_052h(a_Name) _ %+ a_Name %+ _pae16_32
1184%define BS3_MODE_R0_NM_058h(a_Name) _ %+ a_Name %+ _pae16
1185%define BS3_MODE_R0_NM_062h(a_Name) _ %+ a_Name %+ _pae32
1186%define BS3_MODE_R0_NM_061h(a_Name) _ %+ a_Name %+ _pae32_16
1187%define BS3_MODE_R0_NM_068h(a_Name) _ %+ a_Name %+ _pae32_16
1188%define BS3_MODE_R0_NM_071h(a_Name) _ %+ a_Name %+ _lm16
1189%define BS3_MODE_R0_NM_072h(a_Name) _ %+ a_Name %+ _lm32
1190%define BS3_MODE_R0_NM_074h(a_Name) _ %+ a_Name %+ _lm64
1191;; @}
1192
1193
1194;;
1195; Includes the file %1 with TMPL_MODE set to all possible value.
1196; @param 1 Double quoted include file name.
1197%macro BS3_INSTANTIATE_TEMPLATE_WITH_WEIRD_ONES 1
1198 %define BS3_INSTANTIATING_MODE
1199 %define BS3_INSTANTIATING_ALL_MODES
1200
1201 %define TMPL_MODE BS3_MODE_RM
1202 %include %1
1203
1204 %define TMPL_MODE BS3_MODE_PE16
1205 %include %1
1206 %define TMPL_MODE BS3_MODE_PE16_32
1207 %include %1
1208 %define TMPL_MODE BS3_MODE_PE16_V86
1209 %include %1
1210
1211 %define TMPL_MODE BS3_MODE_PE32
1212 %include %1
1213 %define TMPL_MODE BS3_MODE_PE32_16
1214 %include %1
1215 %define TMPL_MODE BS3_MODE_PEV86
1216 %include %1
1217
1218 %define TMPL_MODE BS3_MODE_PP16
1219 %include %1
1220 %define TMPL_MODE BS3_MODE_PP16_32
1221 %include %1
1222 %define TMPL_MODE BS3_MODE_PP16_V86
1223 %include %1
1224
1225 %define TMPL_MODE BS3_MODE_PP32
1226 %include %1
1227 %define TMPL_MODE BS3_MODE_PP32_16
1228 %include %1
1229 %define TMPL_MODE BS3_MODE_PPV86
1230 %include %1
1231
1232 %define TMPL_MODE BS3_MODE_PAE16
1233 %include %1
1234 %define TMPL_MODE BS3_MODE_PAE16_32
1235 %include %1
1236 %define TMPL_MODE BS3_MODE_PAE16_V86
1237 %include %1
1238
1239 %define TMPL_MODE BS3_MODE_PAE32
1240 %include %1
1241 %define TMPL_MODE BS3_MODE_PAE32_16
1242 %include %1
1243 %define TMPL_MODE BS3_MODE_PAEV86
1244 %include %1
1245
1246 %define TMPL_MODE BS3_MODE_LM16
1247 %include %1
1248 %define TMPL_MODE BS3_MODE_LM32
1249 %include %1
1250 %define TMPL_MODE BS3_MODE_LM64
1251 %include %1
1252
1253 %undef BS3_INSTANTIATING_MODE
1254 %undef BS3_INSTANTIATING_ALL_MODES
1255%endmacro
1256
1257
1258;;
1259; Includes the file %1 with TMPL_MODE set to all but the "weird" value.
1260; @param 1 Double quoted include file name.
1261%macro BS3_INSTANTIATE_TEMPLATE_ESSENTIALS 1
1262 %define BS3_INSTANTIATING_MODE
1263 %define BS3_INSTANTIATING_ESSENTIAL_MODES
1264
1265 %define TMPL_MODE BS3_MODE_RM
1266 %include %1
1267
1268 %define TMPL_MODE BS3_MODE_PE16
1269 %include %1
1270
1271 %define TMPL_MODE BS3_MODE_PE32
1272 %include %1
1273 %define TMPL_MODE BS3_MODE_PEV86
1274 %include %1
1275
1276 %define TMPL_MODE BS3_MODE_PP16
1277 %include %1
1278
1279 %define TMPL_MODE BS3_MODE_PP32
1280 %include %1
1281 %define TMPL_MODE BS3_MODE_PPV86
1282 %include %1
1283
1284 %define TMPL_MODE BS3_MODE_PAE16
1285 %include %1
1286
1287 %define TMPL_MODE BS3_MODE_PAE32
1288 %include %1
1289 %define TMPL_MODE BS3_MODE_PAEV86
1290 %include %1
1291
1292 %define TMPL_MODE BS3_MODE_LM16
1293 %include %1
1294 %define TMPL_MODE BS3_MODE_LM32
1295 %include %1
1296 %define TMPL_MODE BS3_MODE_LM64
1297 %include %1
1298
1299 %undef BS3_INSTANTIATING_MODE
1300 %undef BS3_INSTANTIATING_ESSENTIAL_MODES
1301%endmacro
1302
1303;;
1304; Includes the file %1 with TMPL_MODE set to a 16-bit, a 32-bit and a 64-bit value.
1305; @param 1 Double quoted include file name.
1306%macro BS3_INSTANTIATE_COMMON_TEMPLATE 1
1307 %define BS3_INSTANTIATING_CMN
1308
1309 %define TMPL_MODE BS3_MODE_RM
1310 %include %1
1311 %define TMPL_MODE BS3_MODE_PE32
1312 %include %1
1313 %define TMPL_MODE BS3_MODE_LM64
1314 %include %1
1315
1316 %undef BS3_INSTANTIATING_CMN
1317%endmacro
1318
1319
1320;; @name Static Memory Allocation
1321; @{
1322;; The flat load address for the code after the bootsector.
1323%define BS3_ADDR_LOAD 010000h
1324;; Where we save the boot registers during init.
1325; Located right before the code.
1326%define BS3_ADDR_REG_SAVE (BS3_ADDR_LOAD - BS3REGCTX_size - 8)
1327;; Where the stack starts (initial RSP value).
1328; Located 16 bytes (assumed by boot sector) before the saved registers. SS.BASE=0.
1329%define BS3_ADDR_STACK (BS3_ADDR_REG_SAVE - 16)
1330;; The ring-0 stack (8KB) for ring transitions.
1331%define BS3_ADDR_STACK_R0 006000h
1332;; The ring-1 stack (8KB) for ring transitions.
1333%define BS3_ADDR_STACK_R1 004000h
1334;; The ring-2 stack (8KB) for ring transitions.
1335%define BS3_ADDR_STACK_R2 002000h
1336;; IST1 ring-0 stack for long mode (4KB), used for double faults elsewhere.
1337%define BS3_ADDR_STACK_R0_IST1 009000h
1338;; IST2 ring-0 stack for long mode (3KB), used for spare 0 stack elsewhere.
1339%define BS3_ADDR_STACK_R0_IST2 008000h
1340;; IST3 ring-0 stack for long mode (1KB).
1341%define BS3_ADDR_STACK_R0_IST3 007400h
1342;; IST4 ring-0 stack for long mode (1KB), used for spare 1 stack elsewhere.
1343%define BS3_ADDR_STACK_R0_IST4 007000h
1344;; IST5 ring-0 stack for long mode (1KB).
1345%define BS3_ADDR_STACK_R0_IST5 006c00h
1346;; IST6 ring-0 stack for long mode (1KB).
1347%define BS3_ADDR_STACK_R0_IST6 006800h
1348;; IST7 ring-0 stack for long mode (1KB).
1349%define BS3_ADDR_STACK_R0_IST7 006400h
1350
1351;; The base address of the BS3TEXT16 segment (same as BS3_LOAD_ADDR).
1352;; @sa BS3_SEL_TEXT16
1353%define BS3_ADDR_BS3TEXT16 010000h
1354;; The base address of the BS3SYSTEM16 segment.
1355;; @sa BS3_SEL_SYSTEM16
1356%define BS3_ADDR_BS3SYSTEM16 020000h
1357;; The base address of the BS3DATA16/BS3KIT_GRPNM_DATA16 segment.
1358;; @sa BS3_SEL_DATA16
1359%define BS3_ADDR_BS3DATA16 029000h
1360;; @}
1361
1362
1363;;
1364; BS3 register context. Used by traps and such.
1365;
1366struc BS3REGCTX
1367 .rax resq 1 ; BS3REG rax; /**< 0x00 */
1368 .rcx resq 1 ; BS3REG rcx; /**< 0x08 */
1369 .rdx resq 1 ; BS3REG rdx; /**< 0x10 */
1370 .rbx resq 1 ; BS3REG rbx; /**< 0x18 */
1371 .rsp resq 1 ; BS3REG rsp; /**< 0x20 */
1372 .rbp resq 1 ; BS3REG rbp; /**< 0x28 */
1373 .rsi resq 1 ; BS3REG rsi; /**< 0x30 */
1374 .rdi resq 1 ; BS3REG rdi; /**< 0x38 */
1375 .r8 resq 1 ; BS3REG r8; /**< 0x40 */
1376 .r9 resq 1 ; BS3REG r9; /**< 0x48 */
1377 .r10 resq 1 ; BS3REG r10; /**< 0x50 */
1378 .r11 resq 1 ; BS3REG r11; /**< 0x58 */
1379 .r12 resq 1 ; BS3REG r12; /**< 0x60 */
1380 .r13 resq 1 ; BS3REG r13; /**< 0x68 */
1381 .r14 resq 1 ; BS3REG r14; /**< 0x70 */
1382 .r15 resq 1 ; BS3REG r15; /**< 0x78 */
1383 .rflags resq 1 ; BS3REG rflags; /**< 0x80 */
1384 .rip resq 1 ; BS3REG rip; /**< 0x88 */
1385 .cs resw 1 ; uint16_t cs; /**< 0x90 */
1386 .ds resw 1 ; uint16_t ds; /**< 0x92 */
1387 .es resw 1 ; uint16_t es; /**< 0x94 */
1388 .fs resw 1 ; uint16_t fs; /**< 0x96 */
1389 .gs resw 1 ; uint16_t gs; /**< 0x98 */
1390 .ss resw 1 ; uint16_t ss; /**< 0x9a */
1391 .tr resw 1 ; uint16_t tr; /**< 0x9c */
1392 .ldtr resw 1 ; uint16_t ldtr; /**< 0x9e */
1393 .bMode resb 1 ; uint8_t bMode; /**< 0xa0: BS3_MODE_XXX. */
1394 .bCpl resb 1 ; uint8_t bCpl; /**< 0xa1: 0-3, 0 is used for real mode. */
1395 .fbFlags resb 1 ; uint8_t fbFlags; /**< 0xa2: BS3REG_CTX_F_XXX */
1396 .abPadding resb 5 ; uint8_t abPadding[5]; /**< 0xa4 */
1397 .cr0 resq 1 ; BS3REG cr0; /**< 0xa8 */
1398 .cr2 resq 1 ; BS3REG cr2; /**< 0xb0 */
1399 .cr3 resq 1 ; BS3REG cr3; /**< 0xb8 */
1400 .cr4 resq 1 ; BS3REG cr4; /**< 0xc0 */
1401 .uUnused resq 1 ; BS3REG uUnused; /**< 0xc8 */
1402endstruc
1403AssertCompileSize(BS3REGCTX, 0xd0)
1404
1405;; @name BS3REG_CTX_F_XXX - BS3REGCTX::fbFlags masks.
1406; @{
1407;; The CR0 is MSW (only low 16-bit). */
1408%define BS3REG_CTX_F_NO_CR0_IS_MSW 0x01
1409;; No CR2 and CR3 values. Not in CPL 0 or CPU too old for CR2 & CR3.
1410%define BS3REG_CTX_F_NO_CR2_CR3 0x02
1411;; No CR4 value. The CPU is too old for CR4.
1412%define BS3REG_CTX_F_NO_CR4 0x04
1413;; No TR and LDTR values. Context gathered in real mode or v8086 mode.
1414%define BS3REG_CTX_F_NO_TR_LDTR 0x08
1415;; The context doesn't have valid values for AMD64 GPR extensions.
1416%define BS3REG_CTX_F_NO_AMD64 0x10
1417;; @}
1418
1419;;
1420; BS3 Trap Frame.
1421;
1422struc BS3TRAPFRAME
1423 .bXcpt resb 1
1424 .cbIretFrame resb 1
1425 .uHandlerCs resw 1
1426 .uHandlerSs resw 1
1427 .usAlignment resw 1
1428 .uHandlerRsp resq 1
1429 .fHandlerRfl resq 1
1430 .uErrCd resq 1
1431 .Ctx resb BS3REGCTX_size
1432endstruc
1433AssertCompileSize(BS3TRAPFRAME, 0x20 + 0xd0)
1434
1435;; Flag for Bs3TrapXxResumeFrame methods.
1436%define BS3TRAPRESUME_F_SKIP_CRX 1
1437
1438
1439;;
1440; Trap record.
1441;
1442struc BS3TRAPREC
1443 ;; The trap location relative to the base address given at
1444 ; registration time.
1445 .offWhere resd 1
1446 ;; What to add to .offWhere to calculate the resume address.
1447 .offResumeAddend resb 1
1448 ;; The trap number.
1449 .u8TrapNo resb 1
1450 ;; The error code if the trap takes one.
1451 .u16ErrCd resw 1
1452endstruc
1453
1454;; The size shift.
1455%define BS3TRAPREC_SIZE_SHIFT 3
1456
1457
1458;; The system call vector.
1459%define BS3_TRAP_SYSCALL 20h
1460
1461;; @name System call numbers (ax)
1462;; @note Pointers are always passed in cx:xDI.
1463;; @{
1464;; Print char (cl).
1465%define BS3_SYSCALL_PRINT_CHR 0001h
1466;; Print string (pointer in cx:xDI, length in xDX).
1467%define BS3_SYSCALL_PRINT_STR 0002h
1468;; Switch to ring-0.
1469%define BS3_SYSCALL_TO_RING0 0003h
1470;; Switch to ring-1.
1471%define BS3_SYSCALL_TO_RING1 0004h
1472;; Switch to ring-2.
1473%define BS3_SYSCALL_TO_RING2 0005h
1474;; Switch to ring-3.
1475%define BS3_SYSCALL_TO_RING3 0006h
1476;; Restore context (pointer in cx:xDI, flags in dx).
1477%define BS3_SYSCALL_RESTORE_CTX 0007h
1478;; The last system call value.
1479%define BS3_SYSCALL_LAST BS3_SYSCALL_RESTORE_CTX
1480;; @}
1481
1482
1483
1484;; @name BS3_SEL_XXX - GDT selectors
1485;; @{
1486
1487%define BS3_SEL_LDT 0010h ;;< The LDT selector (requires setting up).
1488%define BS3_SEL_TSS16 0020h ;;< The 16-bit TSS selector.
1489%define BS3_SEL_TSS16_DF 0028h ;;< The 16-bit TSS selector for double faults.
1490%define BS3_SEL_TSS16_SPARE0 0030h ;;< The 16-bit TSS selector for testing.
1491%define BS3_SEL_TSS16_SPARE1 0038h ;;< The 16-bit TSS selector for testing.
1492%define BS3_SEL_TSS32 0040h ;;< The 32-bit TSS selector.
1493%define BS3_SEL_TSS32_DF 0048h ;;< The 32-bit TSS selector for double faults.
1494%define BS3_SEL_TSS32_SPARE0 0050h ;;< The 32-bit TSS selector for testing.
1495%define BS3_SEL_TSS32_SPARE1 0058h ;;< The 32-bit TSS selector for testing.
1496%define BS3_SEL_TSS32_IOBP_IRB 0060h ;;< The 32-bit TSS selector with I/O permission and interrupt redirection bitmaps.
1497%define BS3_SEL_TSS32_IRB 0068h ;;< The 32-bit TSS selector with only interrupt redirection bitmap (IOPB stripped by limit).
1498%define BS3_SEL_TSS64 0070h ;;< The 64-bit TSS selector.
1499%define BS3_SEL_TSS64_SPARE0 0080h ;;< The 64-bit TSS selector.
1500%define BS3_SEL_TSS64_SPARE1 0090h ;;< The 64-bit TSS selector.
1501%define BS3_SEL_TSS64_IOBP 00a0h ;;< The 64-bit TSS selector.
1502
1503%define BS3_SEL_RMTEXT16_CS 00e0h ;;< Conforming code selector for accessing the BS3RMTEXT16 segment. Runtime config.
1504%define BS3_SEL_X0TEXT16_CS 00e8h ;;< Conforming code selector for accessing the BS3X0TEXT16 segment. Runtime config.
1505%define BS3_SEL_X1TEXT16_CS 00f0h ;;< Conforming code selector for accessing the BS3X1TEXT16 segment. Runtime config.
1506%define BS3_SEL_VMMDEV_MMIO16 00f8h ;;< Selector for accessing the VMMDev MMIO segment at 0100000h from 16-bit code.
1507
1508%define BS3_SEL_RING_SHIFT 8 ;;< For the formula: BS3_SEL_R0_XXX + ((cs & 3) << BS3_SEL_RING_SHIFT)
1509
1510%define BS3_SEL_R0_FIRST 0100h ;;< The first selector in the ring-0 block.
1511%define BS3_SEL_R0_CS16 0100h ;;< ring-0: 16-bit code selector, base 0x10000.
1512%define BS3_SEL_R0_DS16 0108h ;;< ring-0: 16-bit data selector, base 0x23000.
1513%define BS3_SEL_R0_SS16 0110h ;;< ring-0: 16-bit stack selector, base 0x00000.
1514%define BS3_SEL_R0_CS32 0118h ;;< ring-0: 32-bit flat code selector.
1515%define BS3_SEL_R0_DS32 0120h ;;< ring-0: 32-bit flat data selector.
1516%define BS3_SEL_R0_SS32 0128h ;;< ring-0: 32-bit flat stack selector.
1517%define BS3_SEL_R0_CS64 0130h ;;< ring-0: 64-bit flat code selector.
1518%define BS3_SEL_R0_DS64 0138h ;;< ring-0: 64-bit flat data & stack selector.
1519%define BS3_SEL_R0_CS16_EO 0140h ;;< ring-0: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1520%define BS3_SEL_R0_CS16_CNF 0148h ;;< ring-0: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1521%define BS3_SEL_R0_CS16_CNF_EO 0150h ;;< ring-0: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1522%define BS3_SEL_R0_CS32_EO 0158h ;;< ring-0: 32-bit execute-only code selector, not accessed, flat.
1523%define BS3_SEL_R0_CS32_CNF 0160h ;;< ring-0: 32-bit conforming code selector, not accessed, flat.
1524%define BS3_SEL_R0_CS32_CNF_EO 0168h ;;< ring-0: 32-bit execute-only conforming code selector, not accessed, flat.
1525%define BS3_SEL_R0_CS64_EO 0170h ;;< ring-0: 64-bit execute-only code selector, not accessed, flat.
1526%define BS3_SEL_R0_CS64_CNF 0178h ;;< ring-0: 64-bit conforming code selector, not accessed, flat.
1527%define BS3_SEL_R0_CS64_CNF_EO 0180h ;;< ring-0: 64-bit execute-only conforming code selector, not accessed, flat.
1528
1529%define BS3_SEL_R1_FIRST 0200h ;;< The first selector in the ring-1 block.
1530%define BS3_SEL_R1_CS16 0200h ;;< ring-1: 16-bit code selector, base 0x10000.
1531%define BS3_SEL_R1_DS16 0208h ;;< ring-1: 16-bit data selector, base 0x23000.
1532%define BS3_SEL_R1_SS16 0210h ;;< ring-1: 16-bit stack selector, base 0x00000.
1533%define BS3_SEL_R1_CS32 0218h ;;< ring-1: 32-bit flat code selector.
1534%define BS3_SEL_R1_DS32 0220h ;;< ring-1: 32-bit flat data selector.
1535%define BS3_SEL_R1_SS32 0228h ;;< ring-1: 32-bit flat stack selector.
1536%define BS3_SEL_R1_CS64 0230h ;;< ring-1: 64-bit flat code selector.
1537%define BS3_SEL_R1_DS64 0238h ;;< ring-1: 64-bit flat data & stack selector.
1538%define BS3_SEL_R1_CS16_EO 0240h ;;< ring-1: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1539%define BS3_SEL_R1_CS16_CNF 0248h ;;< ring-1: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1540%define BS3_SEL_R1_CS16_CNF_EO 0250h ;;< ring-1: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1541%define BS3_SEL_R1_CS32_EO 0258h ;;< ring-1: 32-bit execute-only code selector, not accessed, flat.
1542%define BS3_SEL_R1_CS32_CNF 0260h ;;< ring-1: 32-bit conforming code selector, not accessed, flat.
1543%define BS3_SEL_R1_CS32_CNF_EO 0268h ;;< ring-1: 32-bit execute-only conforming code selector, not accessed, flat.
1544%define BS3_SEL_R1_CS64_EO 0270h ;;< ring-1: 64-bit execute-only code selector, not accessed, flat.
1545%define BS3_SEL_R1_CS64_CNF 0278h ;;< ring-1: 64-bit conforming code selector, not accessed, flat.
1546%define BS3_SEL_R1_CS64_CNF_EO 0280h ;;< ring-1: 64-bit execute-only conforming code selector, not accessed, flat.
1547
1548%define BS3_SEL_R2_FIRST 0300h ;;< The first selector in the ring-2 block.
1549%define BS3_SEL_R2_CS16 0300h ;;< ring-2: 16-bit code selector, base 0x10000.
1550%define BS3_SEL_R2_DS16 0308h ;;< ring-2: 16-bit data selector, base 0x23000.
1551%define BS3_SEL_R2_SS16 0310h ;;< ring-2: 16-bit stack selector, base 0x00000.
1552%define BS3_SEL_R2_CS32 0318h ;;< ring-2: 32-bit flat code selector.
1553%define BS3_SEL_R2_DS32 0320h ;;< ring-2: 32-bit flat data selector.
1554%define BS3_SEL_R2_SS32 0328h ;;< ring-2: 32-bit flat stack selector.
1555%define BS3_SEL_R2_CS64 0330h ;;< ring-2: 64-bit flat code selector.
1556%define BS3_SEL_R2_DS64 0338h ;;< ring-2: 64-bit flat data & stack selector.
1557%define BS3_SEL_R2_CS16_EO 0340h ;;< ring-2: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1558%define BS3_SEL_R2_CS16_CNF 0348h ;;< ring-2: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1559%define BS3_SEL_R2_CS16_CNF_EO 0350h ;;< ring-2: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1560%define BS3_SEL_R2_CS32_EO 0358h ;;< ring-2: 32-bit execute-only code selector, not accessed, flat.
1561%define BS3_SEL_R2_CS32_CNF 0360h ;;< ring-2: 32-bit conforming code selector, not accessed, flat.
1562%define BS3_SEL_R2_CS32_CNF_EO 0368h ;;< ring-2: 32-bit execute-only conforming code selector, not accessed, flat.
1563%define BS3_SEL_R2_CS64_EO 0370h ;;< ring-2: 64-bit execute-only code selector, not accessed, flat.
1564%define BS3_SEL_R2_CS64_CNF 0378h ;;< ring-2: 64-bit conforming code selector, not accessed, flat.
1565%define BS3_SEL_R2_CS64_CNF_EO 0380h ;;< ring-2: 64-bit execute-only conforming code selector, not accessed, flat.
1566
1567%define BS3_SEL_R3_FIRST 0400h ;;< The first selector in the ring-3 block.
1568%define BS3_SEL_R3_CS16 0400h ;;< ring-3: 16-bit code selector, base 0x10000.
1569%define BS3_SEL_R3_DS16 0408h ;;< ring-3: 16-bit data selector, base 0x23000.
1570%define BS3_SEL_R3_SS16 0410h ;;< ring-3: 16-bit stack selector, base 0x00000.
1571%define BS3_SEL_R3_CS32 0418h ;;< ring-3: 32-bit flat code selector.
1572%define BS3_SEL_R3_DS32 0420h ;;< ring-3: 32-bit flat data selector.
1573%define BS3_SEL_R3_SS32 0428h ;;< ring-3: 32-bit flat stack selector.
1574%define BS3_SEL_R3_CS64 0430h ;;< ring-3: 64-bit flat code selector.
1575%define BS3_SEL_R3_DS64 0438h ;;< ring-3: 64-bit flat data & stack selector.
1576%define BS3_SEL_R3_CS16_EO 0440h ;;< ring-3: 16-bit execute-only code selector, not accessed, 0xfffe limit, CS16 base.
1577%define BS3_SEL_R3_CS16_CNF 0448h ;;< ring-3: 16-bit conforming code selector, not accessed, 0xfffe limit, CS16 base.
1578%define BS3_SEL_R3_CS16_CNF_EO 0450h ;;< ring-3: 16-bit execute-only conforming code selector, not accessed, 0xfffe limit, CS16 base.
1579%define BS3_SEL_R3_CS32_EO 0458h ;;< ring-3: 32-bit execute-only code selector, not accessed, flat.
1580%define BS3_SEL_R3_CS32_CNF 0460h ;;< ring-3: 32-bit conforming code selector, not accessed, flat.
1581%define BS3_SEL_R3_CS32_CNF_EO 0468h ;;< ring-3: 32-bit execute-only conforming code selector, not accessed, flat.
1582%define BS3_SEL_R3_CS64_EO 0470h ;;< ring-3: 64-bit execute-only code selector, not accessed, flat.
1583%define BS3_SEL_R3_CS64_CNF 0478h ;;< ring-3: 64-bit conforming code selector, not accessed, flat.
1584%define BS3_SEL_R3_CS64_CNF_EO 0480h ;;< ring-3: 64-bit execute-only conforming code selector, not accessed, flat.
1585
1586%define BS3_SEL_SPARE_FIRST 0500h ;;< The first selector in the spare block
1587%define BS3_SEL_SPARE_00 0500h ;;< Spare selector number 00h.
1588%define BS3_SEL_SPARE_01 0508h ;;< Spare selector number 01h.
1589%define BS3_SEL_SPARE_02 0510h ;;< Spare selector number 02h.
1590%define BS3_SEL_SPARE_03 0518h ;;< Spare selector number 03h.
1591%define BS3_SEL_SPARE_04 0520h ;;< Spare selector number 04h.
1592%define BS3_SEL_SPARE_05 0528h ;;< Spare selector number 05h.
1593%define BS3_SEL_SPARE_06 0530h ;;< Spare selector number 06h.
1594%define BS3_SEL_SPARE_07 0538h ;;< Spare selector number 07h.
1595%define BS3_SEL_SPARE_08 0540h ;;< Spare selector number 08h.
1596%define BS3_SEL_SPARE_09 0548h ;;< Spare selector number 09h.
1597%define BS3_SEL_SPARE_0a 0550h ;;< Spare selector number 0ah.
1598%define BS3_SEL_SPARE_0b 0558h ;;< Spare selector number 0bh.
1599%define BS3_SEL_SPARE_0c 0560h ;;< Spare selector number 0ch.
1600%define BS3_SEL_SPARE_0d 0568h ;;< Spare selector number 0dh.
1601%define BS3_SEL_SPARE_0e 0570h ;;< Spare selector number 0eh.
1602%define BS3_SEL_SPARE_0f 0578h ;;< Spare selector number 0fh.
1603%define BS3_SEL_SPARE_10 0580h ;;< Spare selector number 10h.
1604%define BS3_SEL_SPARE_11 0588h ;;< Spare selector number 11h.
1605%define BS3_SEL_SPARE_12 0590h ;;< Spare selector number 12h.
1606%define BS3_SEL_SPARE_13 0598h ;;< Spare selector number 13h.
1607%define BS3_SEL_SPARE_14 05a0h ;;< Spare selector number 14h.
1608%define BS3_SEL_SPARE_15 05a8h ;;< Spare selector number 15h.
1609%define BS3_SEL_SPARE_16 05b0h ;;< Spare selector number 16h.
1610%define BS3_SEL_SPARE_17 05b8h ;;< Spare selector number 17h.
1611%define BS3_SEL_SPARE_18 05c0h ;;< Spare selector number 18h.
1612%define BS3_SEL_SPARE_19 05c8h ;;< Spare selector number 19h.
1613%define BS3_SEL_SPARE_1a 05d0h ;;< Spare selector number 1ah.
1614%define BS3_SEL_SPARE_1b 05d8h ;;< Spare selector number 1bh.
1615%define BS3_SEL_SPARE_1c 05e0h ;;< Spare selector number 1ch.
1616%define BS3_SEL_SPARE_1d 05e8h ;;< Spare selector number 1dh.
1617%define BS3_SEL_SPARE_1e 05f0h ;;< Spare selector number 1eh.
1618%define BS3_SEL_SPARE_1f 05f8h ;;< Spare selector number 1fh.
1619
1620%define BS3_SEL_TILED 0600h ;;< 16-bit data tiling: First - base=0x00000000, limit=64KB, DPL=3.
1621%define BS3_SEL_TILED_LAST 0df8h ;;< 16-bit data tiling: Last - base=0x00ff0000, limit=64KB, DPL=3.
1622%define BS3_SEL_TILED_AREA_SIZE 001000000h ;;< 16-bit data tiling: Size of addressable area, in bytes. (16 MB)
1623
1624%define BS3_SEL_FREE_PART1 0e00h ;;< Free selector space - part \%1.
1625%define BS3_SEL_FREE_PART1_LAST 0ff8h ;;< Free selector space - part \%1, last entry.
1626
1627%define BS3_SEL_TEXT16 1000h ;;< The BS3TEXT16 selector.
1628
1629%define BS3_SEL_FREE_PART2 1008h ;;< Free selector space - part \#2.
1630%define BS3_SEL_FREE_PART2_LAST 17f8h ;;< Free selector space - part \#2, last entry.
1631
1632%define BS3_SEL_TILED_R0 1800h ;;< 16-bit data/stack tiling: First - base=0x00000000, limit=64KB, DPL=0.
1633%define BS3_SEL_TILED_R0_LAST 1ff8h ;;< 16-bit data/stack tiling: Last - base=0x00ff0000, limit=64KB, DPL=0.
1634
1635%define BS3_SEL_SYSTEM16 2000h ;;< The BS3SYSTEM16 selector.
1636
1637%define BS3_SEL_FREE_PART3 2008h ;;< Free selector space - part \%3.
1638%define BS3_SEL_FREE_PART3_LAST 28f8h ;;< Free selector space - part \%3, last entry.
1639
1640%define BS3_SEL_DATA16 2900h ;;< The BS3DATA16/BS3KIT_GRPNM_DATA16 selector.
1641
1642%define BS3_SEL_FREE_PART4 2908h ;;< Free selector space - part \#4.
1643%define BS3_SEL_FREE_PART4_LAST 2f98h ;;< Free selector space - part \#4, last entry.
1644
1645%define BS3_SEL_PRE_TEST_PAGE_08 2fa0h ;;< Selector located 8 selectors before the test page.
1646%define BS3_SEL_PRE_TEST_PAGE_07 2fa8h ;;< Selector located 7 selectors before the test page.
1647%define BS3_SEL_PRE_TEST_PAGE_06 2fb0h ;;< Selector located 6 selectors before the test page.
1648%define BS3_SEL_PRE_TEST_PAGE_05 2fb8h ;;< Selector located 5 selectors before the test page.
1649%define BS3_SEL_PRE_TEST_PAGE_04 2fc0h ;;< Selector located 4 selectors before the test page.
1650%define BS3_SEL_PRE_TEST_PAGE_03 2fc8h ;;< Selector located 3 selectors before the test page.
1651%define BS3_SEL_PRE_TEST_PAGE_02 2fd0h ;;< Selector located 2 selectors before the test page.
1652%define BS3_SEL_PRE_TEST_PAGE_01 2fd8h ;;< Selector located 1 selector before the test page.
1653%define BS3_SEL_TEST_PAGE 2fe0h ;;< Start of the test page intended for playing around with paging and GDT.
1654%define BS3_SEL_TEST_PAGE_00 2fe0h ;;< Test page selector number 00h (convenience).
1655%define BS3_SEL_TEST_PAGE_01 2fe8h ;;< Test page selector number 01h (convenience).
1656%define BS3_SEL_TEST_PAGE_02 2ff0h ;;< Test page selector number 02h (convenience).
1657%define BS3_SEL_TEST_PAGE_03 2ff8h ;;< Test page selector number 03h (convenience).
1658%define BS3_SEL_TEST_PAGE_04 3000h ;;< Test page selector number 04h (convenience).
1659%define BS3_SEL_TEST_PAGE_05 3008h ;;< Test page selector number 05h (convenience).
1660%define BS3_SEL_TEST_PAGE_06 3010h ;;< Test page selector number 06h (convenience).
1661%define BS3_SEL_TEST_PAGE_07 3018h ;;< Test page selector number 07h (convenience).
1662%define BS3_SEL_TEST_PAGE_LAST 3fd0h ;;< The last selector in the spare page.
1663
1664%define BS3_SEL_GDT_LIMIT 3fd8h ;;< The GDT limit.
1665
1666;; @}
1667
1668
1669;
1670; Sanity checks.
1671;
1672%if BS3_ADDR_BS3TEXT16 != BS3_ADDR_LOAD
1673 %error "BS3_ADDR_BS3TEXT16 and BS3_ADDR_LOAD are out of sync"
1674%endif
1675%if (BS3_ADDR_BS3TEXT16 / 16) != BS3_SEL_TEXT16
1676 %error "BS3_ADDR_BS3TEXT16 and BS3_SEL_TEXT16 are out of sync"
1677%endif
1678%if (BS3_ADDR_BS3DATA16 / 16) != BS3_SEL_DATA16
1679 %error "BS3_ADDR_BS3DATA16 and BS3_SEL_DATA16 are out of sync"
1680%endif
1681%if (BS3_ADDR_BS3SYSTEM16 / 16) != BS3_SEL_SYSTEM16
1682 %error "BS3_ADDR_BS3SYSTEM16 and BS3_SEL_SYSTEM16 are out of sync"
1683%endif
1684
1685
1686;; @name BS3CPU_XXX - Bs3CpuDetect_mmm return value and g_bBs3CpuDetected.
1687;; @{
1688%define BS3CPU_8086 0x0001
1689%define BS3CPU_V20 0x0002
1690%define BS3CPU_80186 0x0003
1691%define BS3CPU_80286 0x0004
1692%define BS3CPU_80386 0x0005
1693%define BS3CPU_80486 0x0006
1694%define BS3CPU_Pentium 0x0007
1695%define BS3CPU_PPro 0x0008
1696%define BS3CPU_PProOrNewer 0x0009
1697%define BS3CPU_TYPE_MASK 0x00ff
1698%define BS3CPU_F_CPUID 0x0100
1699%define BS3CPU_F_CPUID_EXT_LEAVES 0x0200
1700%define BS3CPU_F_PAE 0x0400
1701%define BS3CPU_F_PAE_BIT 10
1702%define BS3CPU_F_PSE 0x0800
1703%define BS3CPU_F_PSE_BIT 11
1704%define BS3CPU_F_LONG_MODE 0x1000
1705;; @}
1706
1707
1708%endif
1709
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