cidet.h@ 53579

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1	/* $Id: cidet.h 53579 2014-12-19 19:24:09Z vboxsync $ */
2	/** @file
3	* CPU Instruction Decoding & Execution Tests - C/C++ Header.
4	*/
5
6	/*
7	* Copyright (C) 2014 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* The contents of this file may alternatively be used under the terms
18	* of the Common Development and Distribution License Version 1.0
19	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20	* VirtualBox OSE distribution, in which case the provisions of the
21	* CDDL are applicable instead of those of the GPL.
22	*
23	* You may elect to license modified versions of this file under the
24	* terms and conditions of either the GPL or the CDDL or both.
25	*/
26
27
28	#ifndef ___cidet_h___
29	#define ___cidet_h___
30
31	#include <iprt/types.h>
32	#include <iprt/x86.h>
33
34
35	/** @name CIDET - Operand flags.
36	* @{ */
37	#define CIDET_OF_FIXED_MASK UINT32_C(0x0000001f) /*< Fixed register/whatever mask. /
38
39	#define CIDET_OF_Z_SHIFT 8 /*< Size shift. /
40	#define CIDET_OF_Z_MASK UINT32_C(0x00000f00) /*< Size mask. /
41	#define CIDET_OF_Z_NONE UINT32_C(0x00000000) /*< Unused zero value. /
42	#define CIDET_OF_Z_BYTE UINT32_C(0x00000100) /*< Byte size. /
43	#define CIDET_OF_Z_WORD UINT32_C(0x00000200) /*< Word (2 bytes) size. /
44	#define CIDET_OF_Z_DWORD UINT32_C(0x00000300) /*< Double word (4 bytes) size. /
45	#define CIDET_OF_Z_QWORD UINT32_C(0x00000400) /*< Quad word (8 bytes) size. /
46	#define CIDET_OF_Z_TBYTE UINT32_C(0x00000500) /*< Ten byte (10 bytes) size - aka TWORD. /
47	#define CIDET_OF_Z_OWORD UINT32_C(0x00000600) /*< Octa word (16 bytes) size - aka DQWORD. /
48	#define CIDET_OF_Z_YWORD UINT32_C(0x00000700) /*< Yxx sized, i.e. 32 bytes. /
49	#define CIDET_OF_Z_ZWORD UINT32_C(0x00000800) /*< Zxx sized, i.e. 64 bytes. /
50	#define CIDET_OF_Z_VAR_WDQ UINT32_C(0x00000900) /*< Variable size depending on size prefix (2, 4, or 8 bytes). /
51	#define CIDET_OF_Z_SPECIAL UINT32_C(0x00000f00) /*< Special size, see instruction flags or smth. /
52
53	#define CIDET_OF_K_MASK UINT32_C(0x0000f000) /*< Kind of operand. /
54	#define CIDET_OF_K_NONE UINT32_C(0x00000000) /*< Unused zero value. /
55	#define CIDET_OF_K_GPR UINT32_C(0x00001000) /*< General purpose register. Includes memory when used with CIDET_OF_M_RM. /
56	#define CIDET_OF_K_SREG UINT32_C(0x00002000) /*< Segment register. /
57	#define CIDET_OF_K_CR UINT32_C(0x00003000) /*< Control register. /
58	#define CIDET_OF_K_SSE UINT32_C(0x00004000) /*< SSE register. /
59	#define CIDET_OF_K_AVX UINT32_C(0x00005000) /*< AVX register. /
60	#define CIDET_OF_K_AVX512 UINT32_C(0x00006000) /*< AVX-512 register. /
61	#define CIDET_OF_K_AVXFUTURE UINT32_C(0x00007000) /*< Reserved for future AVX register set. /
62	#define CIDET_OF_K_VRX_TST_MASK UINT32_C(0x0000c000) /*< Used for testing for VRX register kind, see CIDET_OF_K_IS_VRX. /
63	#define CIDET_OF_K_VRX_TST_RES UINT32_C(0x00004000) /*< Used for testing for VRX register kind, see CIDET_OF_K_IS_VRX. /
64	#define CIDET_OF_K_FPU UINT32_C(0x00008000) /*< FPU register. /
65	#define CIDET_OF_K_MMX UINT32_C(0x00009000) /*< MMX register. /
66	#define CIDET_OF_K_TEST UINT32_C(0x0000a000) /*< Test register. /
67	#define CIDET_OF_K_IMM UINT32_C(0x0000d000) /*< Immediate. /
68	#define CIDET_OF_K_MEM UINT32_C(0x0000e000) /*< Memory. /
69	#define CIDET_OF_K_SPECIAL UINT32_C(0x0000f000) /*< Special. /
70	/** Check if @a a_fOp is a general purpose register. */
71	#define CIDET_OF_K_IS_GPR(a_fOp) ( ((a_fOp) & CIDET_OF_K_MASK) == CIDET_OF_K_GPR )
72	/** Check if @a a_fOp is a XMM (SSE), YMM (AVX), ZMM (AVX-512) or similar register. */
73	#define CIDET_OF_K_IS_VRX(a_fOp) ( ((a_fOp) & CIDET_OF_K_VRX_TST_MASK) == CIDET_OF_K_VRX_TST_RES )
74	/** Check if @a a_fOp1 and @a a_fOp2 specify the same kind of register,
75	* treating SSE, AVX, AVX-512 and AVX-future as the same kind and ignoring the
76	* special register kind. */
77	#define CIDET_OF_K_IS_SAME(a_fOp1, a_fOp2) \
78	( ((a_fOp1) & CIDET_OF_K_MASK) == ((a_fOp2) & CIDET_OF_K_MASK) \
79	? ((a_fOp1) & CIDET_OF_K_MASK) != CIDET_OF_K_SPECIAL \
80	: (CIDET_OF_K_IS_VRX(a_fOp1) && CIDET_OF_K_IS_VRX(a_fOp2)) )
81
82	#define CIDET_OF_M_RM_ONLY_R UINT32_C(0x00010000)
83	#define CIDET_OF_M_RM_ONLY_M UINT32_C(0x00020000)
84	#define CIDET_OF_M_RM (CIDET_OF_M_RM_ONLY_R \| CIDET_OF_M_RM_ONLY_M)
85	#define CIDET_OF_M_REG UINT32_C(0x00040000)
86
87	#define CIDET_OF_A_R UINT32_C(0x00080000) /*< Read access. /
88	#define CIDET_OF_A_W UINT32_C(0x00100000) /*< Write access. /
89	#define CIDET_OF_A_RW UINT32_C(0x00180000) /*< Read & write access. /
90
91	/** The operand defaults to 64-bit width in 64-bit mode, making 32-bit width
92	* inaccessible. */
93	#define CIDET_OF_DEFAULT_64BIT UINT32_C(0x40000000)
94	/** Operand always uses the ES segment for memory accesses. */
95	#define CIDET_OF_ALWAYS_SEG_ES UINT32_C(0x80000000)
96	/** @} */
97
98
99	/** @name CIDET - Instruction flags.
100	* @{ */
101	#define CIDET_IF_MODRM RT_BIT_64(0) /*< ModR/M encoded. /
102	#define CIDET_IF_PRIVILEGED RT_BIT_64(1) /*< Privileged. /
103	/** @} */
104
105
106	/**
107	* Callback function for setting up the input and expected output CPU contexts.
108	*
109	* @returns VBox status.
110	* @retval VINF_EOF when static test data wraps (first entry is returned).
111	* @retval VERR_NO_DATA if @a fInvalid is set and there are no invalid operand
112	* values for this instruction.
113	* @retval VERR_NOT_SUPPORTED if something in the setup prevents us from
114	* comming up with working set of inputs and outputs.
115	*
116	* @param pThis The core CIDET state structure. The InCtx
117	* and ExpectedCtx members will be modified.
118	* @param fInvalid When set, get the next invalid operands that will
119	* cause exceptions/faults.
120	*/
121	typedef int FNCIDETSETUPINOUT(struct CIDETCORE *pThis, bool fInvalid);
122	/** Pointer to a FNCIDETSETUPINOUT function. */
123	typedef FNCIDETSETUPINOUT *PFNCIDETSETUPINOUT;
124
125
126	/**
127	* Instruction test descriptor.
128	*/
129	typedef struct CIDETINSTR
130	{
131	/** The mnemonic (kind of). */
132	const char *pszMnemonic;
133	/** Setup input and outputs. */
134	PFNCIDETSETUPINOUT pfnSetupInOut;
135	/** Number of opcode bytes. */
136	uint8_t cbOpcode;
137	/** Opcode byte(s). */
138	uint8_t abOpcode[3];
139	/** Mandatory prefix (zero if not applicable). */
140	uint8_t bMandatoryPrefix;
141	/** Number of operands. */
142	uint8_t cOperands;
143	/** Operand flags. */
144	uint32_t afOperands[4];
145	/** Flags. */
146	uint64_t fFlags;
147	} CIDETINSTR;
148	/** Pointer to an instruction test descriptor. */
149	typedef CIDETINSTR const *PCCIDETINSTR;
150
151
152	/**
153	* CPU Context with a few extra bits for expectations and results.
154	*/
155	typedef struct CIDETCPUCTX
156	{
157	uint64_t rip;
158	uint64_t rfl;
159	uint64_t aGRegs[16];
160	uint16_t aSRegs[6];
161
162	uint16_t tr;
163	uint16_t ldtr;
164	uint64_t cr0;
165	uint64_t cr2;
166	uint64_t cr3;
167	uint64_t cr4;
168	uint64_t cr8;
169	uint64_t dr0;
170	uint64_t dr1;
171	uint64_t dr2;
172	uint64_t dr3;
173	uint64_t dr6;
174	uint64_t dr7;
175
176	uint64_t uErr; /*< Exception error code. UINT64_MAX if not applicable. (Not for input context.) /
177	uint32_t uXcpt; /*< Exception number. UINT32_MAX if no exception. (Not for input context.) /
178
179	uint32_t fIgnoredRFlags; /*< Only for expected result. /
180	bool fTrickyStack; /*< Set if the stack might be bad. May come at the cost of accurate flags (32-bit). /
181	} CIDETCPUCTX;
182	typedef CIDETCPUCTX *PCIDETCPUCTX;
183	typedef CIDETCPUCTX const *PCCIDETCPUCTX;
184
185	/** Number of bytes of CIDETCPUCTX that can be compared quickly using memcmp.
186	* Anything following these bytes are not relevant to the compare. */
187	#define CIDETCPUCTX_COMPARE_SIZE RT_UOFFSETOF(CIDETCPUCTX, fIgnoredRFlags)
188
189
190	/** @name CPU mode + bits + environment.
191	* @{ */
192	#define CIDETMODE_BIT_MASK UINT8_C(0x0e) /*< The instruction bit count. Results in byte size when masked. /
193	#define CIDETMODE_BIT_16 UINT8_C(0x02) /*< 16-bit instructions. /
194	#define CIDETMODE_BIT_32 UINT8_C(0x04) /*< 32-bit instructions. /
195	#define CIDETMODE_BIT_64 UINT8_C(0x08) /*< 64-bit instructions. /
196	#define CIDETMODE_MODE_MASK UINT8_C(0x70) /*< CPU mode mask. /
197	#define CIDETMODE_MODE_RM UINT8_C(0x00) /*< Real mode. /
198	#define CIDETMODE_MODE_PE UINT8_C(0x10) /*< Protected mode without paging. /
199	#define CIDETMODE_MODE_PP UINT8_C(0x20) /*< Paged protected mode. /
200	#define CIDETMODE_MODE_PAE UINT8_C(0x30) /*< PAE protected mode (paged). /
201	#define CIDETMODE_MODE_LM UINT8_C(0x40) /*< Long mode (paged). /
202	#define CIDETMODE_ENV_MASK UINT8_C(0x81) /*< Execution environment. /
203	#define CIDETMODE_ENV_NORMAL UINT8_C(0x01) /*< Normal environment. /
204	#define CIDETMODE_ENV_V86 UINT8_C(0x80) /*< V8086 environment. /
205	#define CIDETMODE_RM (CIDETMODE_MODE_RM \| CIDETMODE_BIT_16 \| CIDETMODE_ENV_NORMAL)
206	#define CIDETMODE_PE_16 (CIDETMODE_MODE_PE \| CIDETMODE_BIT_16 \| CIDETMODE_ENV_NORMAL)
207	#define CIDETMODE_PE_32 (CIDETMODE_MODE_PE \| CIDETMODE_BIT_32 \| CIDETMODE_ENV_NORMAL)
208	#define CIDETMODE_PE_V86 (CIDETMODE_MODE_PE \| CIDETMODE_BIT_16 \| CIDETMODE_ENV_V86)
209	#define CIDETMODE_PP_16 (CIDETMODE_MODE_PP \| CIDETMODE_BIT_16 \| CIDETMODE_ENV_NORMAL)
210	#define CIDETMODE_PP_32 (CIDETMODE_MODE_PP \| CIDETMODE_BIT_32 \| CIDETMODE_ENV_NORMAL)
211	#define CIDETMODE_PP_V86 (CIDETMODE_MODE_PP \| CIDETMODE_BIT_16 \| CIDETMODE_ENV_V86)
212	#define CIDETMODE_PAE_16 (CIDETMODE_MODE_PAE \| CIDETMODE_BIT_16 \| CIDETMODE_ENV_NORMAL)
213	#define CIDETMODE_PAE_32 (CIDETMODE_MODE_PAE \| CIDETMODE_BIT_32 \| CIDETMODE_ENV_NORMAL)
214	#define CIDETMODE_PAE_V86 (CIDETMODE_MODE_PAE \| CIDETMODE_BIT_16 \| CIDETMODE_ENV_V86)
215	#define CIDETMODE_LM_16 (CIDETMODE_MODE_LM \| CIDETMODE_BIT_16 \| CIDETMODE_ENV_NORMAL)
216	#define CIDETMODE_LM_32 (CIDETMODE_MODE_LM \| CIDETMODE_BIT_32 \| CIDETMODE_ENV_NORMAL)
217	#define CIDETMODE_LM_64 (CIDETMODE_MODE_LM \| CIDETMODE_BIT_64 \| CIDETMODE_ENV_NORMAL)
218	/** Test if @a a_bMode is a 16-bit mode. */
219	#define CIDETMODE_IS_16BIT(a_bMode) ( ((a_bMode) & CIDETMODE_BIT_MASK) == CIDETMODE_BIT_16 )
220	/** Test if @a a_bMode is a 32-bit mode. */
221	#define CIDETMODE_IS_32BIT(a_bMode) ( ((a_bMode) & CIDETMODE_BIT_MASK) == CIDETMODE_BIT_32 )
222	/** Test if @a a_bMode is a 64-bit mode. */
223	#define CIDETMODE_IS_64BIT(a_bMode) ( ((a_bMode) & CIDETMODE_BIT_MASK) == CIDETMODE_BIT_64 )
224	/** Get the instruction bit count. */
225	#define CIDETMODE_GET_BIT_COUNT(a_bMode) ( CIDETMODE_GET_BYTE_COUNT(a_bMode) * 8 )
226	/** Get the instruction byte count. */
227	#define CIDETMODE_GET_BYTE_COUNT(a_bMode) ( (a_bMode) & CIDETMODE_BIT_MASK )
228	/** Test if @a a_bMode long mode. */
229	#define CIDETMODE_IS_LM(a_bMode) ( ((a_bMode) & CIDETMODE_MODE_MASK) == CIDETMODE_MODE_LM )
230	/** Test if @a a_bMode some kind of protected mode. */
231	#define CIDETMODE_IS_PROT(a_bMode) ( ((a_bMode) & CIDETMODE_MODE_MASK) >= CIDETMODE_MODE_PE )
232
233	/** @} */
234
235
236	/** @name Test Configuration Flags.
237	* @{ */
238	#define CIDET_TESTCFG_SEG_PRF_CS UINT64_C(0x0000000000000001)
239	#define CIDET_TESTCFG_SEG_PRF_SS UINT64_C(0x0000000000000002)
240	#define CIDET_TESTCFG_SEG_PRF_DS UINT64_C(0x0000000000000004)
241	#define CIDET_TESTCFG_SEG_PRF_ES UINT64_C(0x0000000000000008)
242	#define CIDET_TESTCFG_SEG_PRF_FS UINT64_C(0x0000000000000010)
243	#define CIDET_TESTCFG_SEG_PRF_GS UINT64_C(0x0000000000000020)
244	#define CIDET_TESTCFG_SEG_PRF_MASK UINT64_C(0x000000000000003f)
245	/** @} */
246
247	/** */
248	typedef enum CIDETREG
249	{
250	kCidetReg_Gpr_Invalid = 0,
251
252	kCidetReg_Gpr_al,
253	kCidetReg_Gpr_cl,
254	kCidetReg_Gpr_dl,
255	kCidetReg_Gpr_bl,
256	kCidetReg_Gpr_spl,
257	kCidetReg_Gpr_bpl,
258	kCidetReg_Gpr_sil,
259	kCidetReg_Gpr_dil,
260	kCidetReg_Gpr_r8b,
261	kCidetReg_Gpr_r9b,
262	kCidetReg_Gpr_r10b,
263	kCidetReg_Gpr_r11b,
264	kCidetReg_Gpr_r12b,
265	kCidetReg_Gpr_r13b,
266	kCidetReg_Gpr_r14b,
267	kCidetReg_Gpr_r15b,
268	kCidetReg_Gpr_ah,
269	kCidetReg_Gpr_ch,
270	kCidetReg_Gpr_dh,
271	kCidetReg_Gpr_bh,
272	#define kCidetReg_Gpr_Byte_First kCidetReg_Gpr_al
273	#define kCidetReg_Gpr_Byte_First_Upper kCidetReg_Gpr_ah
274	#define kCidetReg_Gpr_Byte_Last kCidetReg_Gpr_bh
275
276	kCidetReg_Gpr_ax,
277	kCidetReg_Gpr_cx,
278	kCidetReg_Gpr_dx,
279	kCidetReg_Gpr_bx,
280	kCidetReg_Gpr_sp,
281	kCidetReg_Gpr_bp,
282	kCidetReg_Gpr_si,
283	kCidetReg_Gpr_di,
284	kCidetReg_Gpr_r8w,
285	kCidetReg_Gpr_r9w,
286	kCidetReg_Gpr_r10w,
287	kCidetReg_Gpr_r11w,
288	kCidetReg_Gpr_r12w,
289	kCidetReg_Gpr_r13w,
290	kCidetReg_Gpr_r14w,
291	kCidetReg_Gpr_r15w,
292	#define kCidetReg_Gpr_Word_First kCidetReg_Gpr_ax
293	#define kCidetReg_Gpr_Word_Last kCidetReg_Gpr_r15w
294
295	kCidetReg_Gpr_eax,
296	kCidetReg_Gpr_ecx,
297	kCidetReg_Gpr_edx,
298	kCidetReg_Gpr_ebx,
299	kCidetReg_Gpr_esp,
300	kCidetReg_Gpr_ebp,
301	kCidetReg_Gpr_esi,
302	kCidetReg_Gpr_edi,
303	kCidetReg_Gpr_r8d,
304	kCidetReg_Gpr_r9d,
305	kCidetReg_Gpr_r10d,
306	kCidetReg_Gpr_r11d,
307	kCidetReg_Gpr_r12d,
308	kCidetReg_Gpr_r13d,
309	kCidetReg_Gpr_r14d,
310	kCidetReg_Gpr_r15d,
311	#define kCidetReg_Gpr_DWord_First kCidetReg_Gpr_eax
312	#define kCidetReg_Gpr_DWord_Last kCidetReg_Gpr_r15d
313
314	kCidetReg_Gpr_rax,
315	kCidetReg_Gpr_rcx,
316	kCidetReg_Gpr_rdx,
317	kCidetReg_Gpr_rbx,
318	kCidetReg_Gpr_rsp,
319	kCidetReg_Gpr_rbp,
320	kCidetReg_Gpr_rsi,
321	kCidetReg_Gpr_rdi,
322	kCidetReg_Gpr_r8,
323	kCidetReg_Gpr_r9,
324	kCidetReg_Gpr_r10,
325	kCidetReg_Gpr_r11,
326	kCidetReg_Gpr_r12,
327	kCidetReg_Gpr_r13,
328	kCidetReg_Gpr_r14,
329	kCidetReg_Gpr_r15,
330	#define kCidetReg_Gpr_QWord_First kCidetReg_Gpr_rax
331	#define kCidetReg_Gpr_QWord_Last kCidetReg_Gpr_r15
332
333	kCidetReg_Seg_es,
334	kCidetReg_Seg_cs,
335	kCidetReg_Seg_ss,
336	kCidetReg_Seg_ds,
337	kCidetReg_Seg_fs,
338	kCidetReg_Seg_gs,
339	kCidetReg_Seg_Inv6,
340	kCidetReg_Seg_Inv7,
341	#define kCidetReg_Seg_First kCidetReg_Seg_es
342	#define kCidetReg_Seg_Last kCidetReg_Seg_gs
343	#define kCidetReg_Seg_Last_Inv kCidetReg_Seg_Inv7
344
345	kCidetReg_Misc_ip,
346	kCidetReg_Misc_eip,
347	kCidetReg_Misc_rip,
348	kCidetReg_Misc_flags,
349	kCidetReg_Misc_eflags,
350	kCidetReg_Misc_rflags,
351	kCidetReg_Misc_tr,
352	kCidetReg_Misc_ldtr,
353	kCidetReg_Misc_gdtr,
354	kCidetReg_Misc_idtr,
355
356	kCidetReg_Ctrl_cr0,
357	kCidetReg_Ctrl_cr1,
358	kCidetReg_Ctrl_cr2,
359	kCidetReg_Ctrl_cr3,
360	kCidetReg_Ctrl_cr4,
361	kCidetReg_Ctrl_cr5,
362	kCidetReg_Ctrl_cr6,
363	kCidetReg_Ctrl_cr7,
364	kCidetReg_Ctrl_cr8,
365	kCidetReg_Ctrl_cr9,
366	kCidetReg_Ctrl_cr10,
367	kCidetReg_Ctrl_cr11,
368	kCidetReg_Ctrl_cr12,
369	kCidetReg_Ctrl_cr13,
370	kCidetReg_Ctrl_cr14,
371	kCidetReg_Ctrl_cr15,
372	#define kCidetReg_Ctrl_First kCidetReg_Ctrl_cr0
373	#define kCidetReg_Ctrl_Last kCidetReg_Ctrl_cr15
374	#define CIDETREG_CTRL_IS_VALID(a_iReg) ( (a_iReg) == kCidetReg_Ctrl_cr0 \
375	&& (a_iReg) == kCidetReg_Ctrl_cr2 \
376	&& (a_iReg) == kCidetReg_Ctrl_cr3 \
377	&& (a_iReg) == kCidetReg_Ctrl_cr4 \
378	&& (a_iReg) == kCidetReg_Ctrl_cr8 )
379
380	kCidetReg_Dbg_dr0,
381	kCidetReg_Dbg_dr1,
382	kCidetReg_Dbg_dr2,
383	kCidetReg_Dbg_dr3,
384	kCidetReg_Dbg_dr4,
385	kCidetReg_Dbg_dr5,
386	kCidetReg_Dbg_dr6,
387	kCidetReg_Dbg_dr7,
388	kCidetReg_Dbg_dr8,
389	kCidetReg_Dbg_dr9,
390	kCidetReg_Dbg_dr10,
391	kCidetReg_Dbg_dr11,
392	kCidetReg_Dbg_dr12,
393	kCidetReg_Dbg_dr13,
394	kCidetReg_Dbg_dr14,
395	kCidetReg_Dbg_dr15,
396	#define kCidetReg_Dbg_First kCidetReg_Dbg_dr0
397	#define kCidetReg_Dbg_Last kCidetReg_Dbg_dr15
398	#define CIDETREG_DBG_IS_VALID(a_iReg) ((a_iReg) < kCidetReg_Dbg_dr8 && (a_iReg) >= kCidetReg_Dbg_First)
399
400	kCidetReg_Test_tr0,
401	kCidetReg_Test_tr1,
402	kCidetReg_Test_tr2,
403	kCidetReg_Test_tr3,
404	kCidetReg_Test_tr4,
405	kCidetReg_Test_tr5,
406	kCidetReg_Test_tr6,
407	kCidetReg_Test_tr7,
408	kCidetReg_Test_tr8,
409	kCidetReg_Test_tr9,
410	kCidetReg_Test_tr10,
411	kCidetReg_Test_tr11,
412	kCidetReg_Test_tr12,
413	kCidetReg_Test_tr13,
414	kCidetReg_Test_tr14,
415	kCidetReg_Test_tr15,
416	#define kCidetReg_Test_First kCidetReg_Test_tr0
417	#define kCidetReg_Test_Last kCidetReg_Test_tr15
418
419	kCidetReg_Fpu_st0,
420	kCidetReg_Fpu_st1,
421	kCidetReg_Fpu_st2,
422	kCidetReg_Fpu_st3,
423	kCidetReg_Fpu_st4,
424	kCidetReg_Fpu_st5,
425	kCidetReg_Fpu_st6,
426	kCidetReg_Fpu_st7,
427	#define kCidetReg_Fpu_First kCidetReg_Mmx_st0
428	#define kCidetReg_Fpu_Last kCidetReg_Mmx_st7
429
430	kCidetReg_FpuMisc_cs,
431	kCidetReg_FpuMisc_ip,
432	kCidetReg_FpuMisc_ds,
433	kCidetReg_FpuMisc_dp,
434	kCidetReg_FpuMisc_fop,
435	kCidetReg_FpuMisc_ftw,
436	kCidetReg_FpuMisc_fsw,
437	kCidetReg_FpuMisc_fcw,
438	kCidetReg_FpuMisc_mxcsr_mask,
439	kCidetReg_FpuMisc_mxcsr,
440
441	kCidetReg_Mmx_mm0,
442	kCidetReg_Mmx_mm1,
443	kCidetReg_Mmx_mm2,
444	kCidetReg_Mmx_mm3,
445	kCidetReg_Mmx_mm4,
446	kCidetReg_Mmx_mm5,
447	kCidetReg_Mmx_mm6,
448	kCidetReg_Mmx_mm7,
449	#define kCidetReg_Mmx_First kCidetReg_Mmx_mm0
450	#define kCidetReg_Mmx_Last kCidetReg_Mmx_mm7
451
452	kCidetReg_Sse_xmm0,
453	kCidetReg_Sse_xmm1,
454	kCidetReg_Sse_xmm2,
455	kCidetReg_Sse_xmm3,
456	kCidetReg_Sse_xmm4,
457	kCidetReg_Sse_xmm5,
458	kCidetReg_Sse_xmm6,
459	kCidetReg_Sse_xmm7,
460	kCidetReg_Sse_xmm8,
461	kCidetReg_Sse_xmm9,
462	kCidetReg_Sse_xmm10,
463	kCidetReg_Sse_xmm11,
464	kCidetReg_Sse_xmm12,
465	kCidetReg_Sse_xmm13,
466	kCidetReg_Sse_xmm14,
467	kCidetReg_Sse_xmm15,
468	kCidetReg_Sse_xmm16,
469	kCidetReg_Sse_xmm17,
470	kCidetReg_Sse_xmm18,
471	kCidetReg_Sse_xmm19,
472	kCidetReg_Sse_xmm20,
473	kCidetReg_Sse_xmm21,
474	kCidetReg_Sse_xmm22,
475	kCidetReg_Sse_xmm23,
476	kCidetReg_Sse_xmm24,
477	kCidetReg_Sse_xmm25,
478	kCidetReg_Sse_xmm26,
479	kCidetReg_Sse_xmm27,
480	kCidetReg_Sse_xmm28,
481	kCidetReg_Sse_xmm29,
482	kCidetReg_Sse_xmm30,
483	kCidetReg_Sse_xmm31,
484	#define kCidetReg_Sse_First kCidetReg_Mmx_Xmm0
485	#define kCidetReg_Sse_Last kCidetReg_Mmx_Xmm15
486	#define kCidetReg_Sse_Last_Avx512 kCidetReg_Mmx_Xmm31
487
488	kCidetReg_Avx_Ymm0,
489	kCidetReg_Avx_Ymm1,
490	kCidetReg_Avx_Ymm2,
491	kCidetReg_Avx_Ymm3,
492	kCidetReg_Avx_Ymm4,
493	kCidetReg_Avx_Ymm5,
494	kCidetReg_Avx_Ymm6,
495	kCidetReg_Avx_Ymm7,
496	kCidetReg_Avx_Ymm8,
497	kCidetReg_Avx_Ymm9,
498	kCidetReg_Avx_Ymm10,
499	kCidetReg_Avx_Ymm11,
500	kCidetReg_Avx_Ymm12,
501	kCidetReg_Avx_Ymm13,
502	kCidetReg_Avx_Ymm14,
503	kCidetReg_Avx_Ymm15,
504	kCidetReg_Avx_Ymm16,
505	kCidetReg_Avx_Ymm17,
506	kCidetReg_Avx_Ymm18,
507	kCidetReg_Avx_Ymm19,
508	kCidetReg_Avx_Ymm20,
509	kCidetReg_Avx_Ymm21,
510	kCidetReg_Avx_Ymm22,
511	kCidetReg_Avx_Ymm23,
512	kCidetReg_Avx_Ymm24,
513	kCidetReg_Avx_Ymm25,
514	kCidetReg_Avx_Ymm26,
515	kCidetReg_Avx_Ymm27,
516	kCidetReg_Avx_Ymm28,
517	kCidetReg_Avx_Ymm29,
518	kCidetReg_Avx_Ymm30,
519	kCidetReg_Avx_Ymm31,
520	#define kCidetReg_Avx_First kCidetReg_Avx_Ymm0
521	#define kCidetReg_Avx_Last kCidetReg_Avx_Ymm15
522	#define kCidetReg_Avx_Last_Avx512 kCidetReg_Avx_Ymm31
523
524	kCidetReg_Avx512_Zmm0,
525	kCidetReg_Avx512_Zmm1,
526	kCidetReg_Avx512_Zmm2,
527	kCidetReg_Avx512_Zmm3,
528	kCidetReg_Avx512_Zmm4,
529	kCidetReg_Avx512_Zmm5,
530	kCidetReg_Avx512_Zmm6,
531	kCidetReg_Avx512_Zmm7,
532	kCidetReg_Avx512_Zmm8,
533	kCidetReg_Avx512_Zmm9,
534	kCidetReg_Avx512_Zmm10,
535	kCidetReg_Avx512_Zmm11,
536	kCidetReg_Avx512_Zmm12,
537	kCidetReg_Avx512_Zmm13,
538	kCidetReg_Avx512_Zmm14,
539	kCidetReg_Avx512_Zmm15,
540	kCidetReg_Avx512_Zmm16,
541	kCidetReg_Avx512_Zmm17,
542	kCidetReg_Avx512_Zmm18,
543	kCidetReg_Avx512_Zmm19,
544	kCidetReg_Avx512_Zmm20,
545	kCidetReg_Avx512_Zmm21,
546	kCidetReg_Avx512_Zmm22,
547	kCidetReg_Avx512_Zmm23,
548	kCidetReg_Avx512_Zmm24,
549	kCidetReg_Avx512_Zmm25,
550	kCidetReg_Avx512_Zmm26,
551	kCidetReg_Avx512_Zmm27,
552	kCidetReg_Avx512_Zmm28,
553	kCidetReg_Avx512_Zmm29,
554	kCidetReg_Avx512_Zmm30,
555	kCidetReg_Avx512_Zmm31,
556	#define kCidetReg_Avx512_First kCidetReg_Avx512_Zmm0
557	#define kCidetReg_Avx512_Last kCidetReg_Avx512_Zmm31
558
559	kCidetReg_End
560	} CIDETREG;
561
562
563	/** @name CIDETBUF_XXX - buffer flags.
564	* @{ */
565	#define CIDETBUF_PROT_MASK UINT32_C(0x0000000f) /*< Page protection mask. /
566	#define CIDETBUF_PROT_RWX UINT32_C(0x00000001) /*< Read + write + execute. /
567	#define CIDETBUF_PROT_RWNX UINT32_C(0x00000002) /*< Read + write + no execute. /
568	#define CIDETBUF_PROT_RX UINT32_C(0x00000003) /*< Read + execute. /
569	#define CIDETBUF_PROT_RNX UINT32_C(0x00000004) /*< Read + no execute. /
570	#define CIDETBUF_PROT_RWX_1NP UINT32_C(0x00000005) /*< Read + write + execute; 1 page not present. /
571	#define CIDETBUF_PROT_RWX_1RWNX UINT32_C(0x00000006) /*< Read + write + execute; 1 page read + write + no execute. /
572	#define CIDETBUF_PROT_RWX_1RNX UINT32_C(0x00000007) /*< Read + write + execute; 1 page read + no execute. /
573	#define CIDETBUF_PROT_RWX_1RWXS UINT32_C(0x00000008) /*< Read + write + execute; 1 page read + execute + supervisor. /
574
575	#define CIDETBUF_LOC_MASK UINT32_C(0x000000f0) /*< Location mask. /
576	/** Buffer located at top and start of the 32-bit address space. */
577	#define CIDETBUF_LOC_32BIT_WRAP UINT32_C(0x00000010)
578	/** Buffer located at the low canonical boundrary (AMD64). */
579	#define CIDETBUF_LOC_CANON_LO UINT32_C(0x00000020)
580	/** Buffer located at the high canonical boundrary (AMD64). */
581	#define CIDETBUF_LOC_CANON_HI UINT32_C(0x00000030)
582
583	/** Segment protection mask. */
584	#define CIDETBUF_SEG_MASK UINT32_C(0x00000f00)
585	#define CIDETBUF_SEG_EO UINT32_C(0x00000100) /*< Execute only /
586	#define CIDETBUF_SEG_ER UINT32_C(0x00000200) /*< Execute + read /
587	#define CIDETBUF_SEG_EO_CONF UINT32_C(0x00000300) /*< Execute only + conforming. /
588	#define CIDETBUF_SEG_ER_CONF UINT32_C(0x00000400) /*< Execute + read + conforming. /
589	#define CIDETBUF_SEG_RO UINT32_C(0x00000500) /*< Read only. /
590	#define CIDETBUF_SEG_RW UINT32_C(0x00000600) /*< Read + write. /
591	#define CIDETBUF_SEG_RO_DOWN UINT32_C(0x00000700) /*< Read only + expand down. /
592	#define CIDETBUF_SEG_RW_DOWN UINT32_C(0x00000800) /*< Read + write + expand down. /
593
594	#define CIDETBUF_DPL_MASK UINT32_C(0x00003000) /*< DPL mask. /
595	#define CIDETBUF_DPL_0 UINT32_C(0x00000000) /*< DPL=0. /
596	#define CIDETBUF_DPL_1 UINT32_C(0x00001000) /*< DPL=1. /
597	#define CIDETBUF_DPL_2 UINT32_C(0x00002000) /*< DPL=2. /
598	#define CIDETBUF_DPL_3 UINT32_C(0x00003000) /*< DPL=3. /
599	#define CIDETBUF_DPL_SAME UINT32_C(0x00004000) /*< Same DPL as the execution environment. /
600
601	#define CIDETBUF_SEG_LIMIT_BASE_CAP UINT32_C(0x00008000) /*< Capability to change segment limit and base. /
602
603	#define CIDETBUF_KIND_DATA UINT32_C(0x00000000) /*< Data buffer. /
604	#define CIDETBUF_KIND_CODE UINT32_C(0x80000000) /*< Code buffer. /
605	/** Checks if @a a_fFlags describes a code buffer. */
606	#define CIDETBUF_IS_CODE(a_fFlags) (((a_fFlags) & CIDETBUF_KIND_CODE) != 0)
607	/** Checks if @a a_fFlags describes a data buffer. */
608	#define CIDETBUF_IS_DATA(a_fFlags) (((a_fFlags) & CIDETBUF_KIND_CODE) == 0)
609	/** @} */
610
611	/** Code buffer size. (At least two pages.) */
612	#define CIDET_CODE_BUF_SIZE (PAGE_SIZE * 2)
613	/** Data buffer size. (At least two pages.) */
614	#define CIDET_DATA_BUF_SIZE (PAGE_SIZE * 3)
615
616
617	/**
618	* Detailed expected exception.
619	*
620	* This is used to internally in the core to calculate the expected exception
621	* considering all the things that may cause exceptions.
622	*/
623	typedef enum CIDETEXPECTXCPT
624	{
625	kCidetExpectXcpt_Invalid = 0,
626	/** No exception expected. */
627	kCidetExpectXcpt_None,
628
629	/** Page not present. */
630	kCidetExpectXcpt_PageNotPresent,
631	/** Write access to a non-writable page. */
632	kCidetExpectXcpt_PageNotWritable,
633	/** Executable access to a non-executable page. */
634	kCidetExpectXcpt_PageNotExecutable,
635	/** Access to supervisor page from user mode code. */
636	kCidetExpectXcpt_PagePrivileged,
637	#define kCidetExpectXcpt_First_PageFault kCidetExpectXcpt_PageNotPresent
638	#define kCidetExpectXcpt_Last_PageFault kCidetExpectXcpt_PagePrivileged
639
640	/** Read or write access to an execute only segment. */
641	kCidetExpectXcpt_SegExecuteOnly,
642	/** Write to a read only or execute+read segment. */
643	kCidetExpectXcpt_SegNotWritable,
644	/** Exceeded the limit of a non-stack access. */
645	kCidetExpectXcpt_SegExceededLimit,
646	/** Non-canonical address via any segment other than the stack. */
647	kCidetExpectXcpt_AddrNotCanonical,
648	/** Misaligned 16 or 32 byte SSE or AVX operand. */
649	kCidetExpectXcpt_MisalignedSseAvx,
650	/** Privileged instruction. */
651	kCidetExpectXcpt_PrivilegedInstruction,
652	#define kCidetExpectXcpt_First_GeneralProtectionFault kCidetExpectXcpt_SegExecuteOnly
653	#define kCidetExpectXcpt_Last_GeneralProtectionFault kCidetExpectXcpt_PrivilegedInstruction
654
655	/** Exceeded the limit of a stack access. */
656	kCidetExpectXcpt_StackExceededLimit,
657	/** Non-canonical stack address. */
658	kCidetExpectXcpt_StackAddrNotCanonical,
659	#define kCidetExpectXcpt_First_StackFault kCidetExpectXcpt_StackExceededLimit
660	#define kCidetExpectXcpt_Last_StackFault kCidetExpectXcpt_StackAddrNotCanonical
661
662	/** Misaligned memory operand (and alignment checking is in effect) if AC is
663	* enabled (executing in ring-3). */
664	kCidetExpectXcpt_MisalignedIfAcEnabled,
665	/** Misaligned 16 byte memory operand resulting in \#AC if ring-3 and
666	* enable, otherwise \#GP(0). */
667	kCidetExpectXcpt_Misaligned16ByteAcEnabledOrGp,
668	#define kCidetExpectXcpt_First_AlignmentCheckFault kCidetExpectXcpt_MisalignedIfAcEnabled
669	#define kCidetExpectXcpt_Last_AlignmentCheckFault kCidetExpectXcpt_Misaligned16ByteAcEnabledOrGp
670
671	kCidetExpectXcpt_End
672	} CIDETEXPECTXCPT;
673
674
675	/**
676	* Buffer configuration.
677	*/
678	typedef struct CIDETBUFCFG
679	{
680	/** The name of this buffer configuration. */
681	const char *pszName;
682	/** The buffer flags (CIDETBUF_XXX) */
683	uint32_t fFlags;
684	} CIDETBUFCFG;
685	/** Pointer to a constant buffer configuration. */
686	typedef CIDETBUFCFG const *PCCIDETBUFCFG;
687
688
689	/**
690	* CIDET buffer for code or data.
691	*
692	* ASSUMES page aligned buffers.
693	*/
694	typedef struct CIDETBUF
695	{
696	/** @name Owned & modified by the front end.
697	* @{ */
698	/** Effective buffer address. */
699	uint64_t uEffBufAddr;
700	/** The segment base address. */
701	uint64_t uSegBase;
702	/** The active segment limit (see also cbSegLimit). UINT64_MAX if flat. */
703	uint64_t cbActiveSegLimit;
704	/** This specifies the selector to use if a non-flat segment limit or special
705	* segment flags was requested via pfnSetupBuf. UINT32_MAX if any segment is
706	* selector works. */
707	uint32_t uSeg;
708	/** The off value at the last pfnReinitBuf call. */
709	uint16_t offActive;
710	/** The cb value at the last pfnReinitBuf call. */
711	uint16_t cbActive;
712	/** Prologue (or front fence) size. */
713	uint16_t cbPrologue;
714	/** Epilogue (or tail fence) size. */
715	uint16_t cbEpilogue;
716	/** @} */
717
718	/** @name Set by the core before pfnReinitBuf call.
719	* @{ */
720	/** Pointer to the buffer config. */
721	PCCIDETBUFCFG pCfg;
722	/** The configuration index. */
723	uint32_t idxCfg;
724	/** The offset into the buffer of the data / code. */
725	uint16_t off;
726	/** The number of bytes of data / code. */
727	uint16_t cb;
728	/** The segment limit relative to the start of the buffer (last byte included
729	* in count). UINT16_MAX if maximum segment size should be used. */
730	uint16_t cbSegLimit;
731	/** Desired segment base offset.
732	* This is for checking where the alignment checks are performed. */
733	uint8_t offSegBase;
734
735	/** Set if this buffer is actively being used. */
736	bool fActive : 1;
737	/** The operand index (if data), 7 if not active. */
738	uint8_t idxOp : 3;
739	/** Code: Set if the expected exception is supposed to occur on the
740	* following insturction, not the instruction unter test. */
741	bool fXcptAfterInstruction : 1;
742	/** Set if the instruction will read from the buffer. */
743	bool fRead : 1;
744	/** Set if the instruction will write to the buffer. */
745	bool fWrite : 1;
746	/** The expected exception. */
747	CIDETEXPECTXCPT enmExpectXcpt;
748	/** @} */
749	} CIDETBUF;
750	/** Pointer to a CIDET buffer for code or data. */
751	typedef CIDETBUF *PCIDETBUF;
752
753
754	/**
755	* CPU Instruction Decoding & Execution Testing (CIDET) state.
756	*/
757	typedef struct CIDETCORE
758	{
759	/** Magic number (CIDETCORE_MAGIC). */
760	uint32_t u32Magic;
761
762	/** The target CPU mode / environment. */
763	uint8_t bMode;
764	/** The target ring. */
765	uint8_t iRing;
766	/** Unused padding bytes. */
767	uint8_t abPadding1[2];
768
769	/** Test configuration. */
770	uint64_t fTestCfg;
771
772	/** Code buffer configurations to test.
773	* The first buffer must be a normal buffer that does not cause any problems. */
774	PCCIDETBUFCFG paCodeBufConfigs;
775	/** The number of code buffer configurations to test (pafCodeBufConfigs). */
776	uint32_t cCodeBufConfigs;
777	/** The number of data buffer configurations to test (pafDataBufConfigs). */
778	uint32_t cDataBufConfigs;
779	/** Data buffer configurations to test.
780	* The first buffer must be a normal buffer that does not cause any problems. */
781	PCCIDETBUFCFG paDataBufConfigs;
782
783	/** The instruction currently under testing. */
784	PCCIDETINSTR pCurInstr;
785
786	/** Primary data buffer. */
787	CIDETBUF DataBuf;
788	/** Secondary data buffer. */
789	CIDETBUF DataBuf2;
790
791	/** Handle to the random number source. */
792	RTRAND hRand;
793
794	/**
795	* Re-initializes one of the data buffers.
796	*
797	* @returns true on succes, false if the request cannot be satisfied.
798	* @param pThis The core state.
799	* @param pBuf Pointer to the buffer structure.
800	*/
801	DECLCALLBACKMEMBER(bool, pfnReInitDataBuf)(struct CIDETCORE *pThis, PCIDETBUF pBuf);
802
803	/**
804	* Copies bytes into the data buffer and sets it up for execution.
805	*
806	* @returns true on succes, false if the request cannot be satisfied.
807	* @param pThis The core state.
808	* @param pBuf Pointer to the buffer structure.
809	* @param pvSrc The source bytes (size and destination offset
810	* given in pfnReinitBuf call).
811	*/
812	DECLCALLBACKMEMBER(bool, pfnSetupDataBuf)(struct CIDETCORE pThis, PCIDETBUF pBuf, void const pvSrc);
813
814	/**
815	* Compares buffer content after test execution.
816	*
817	* This also checks any fill bytes in the buffer that the front end may
818	* have put up. The front end will double buffer the content of supposedly
819	* inaccessible pages as well as non-existing pages to simplify things for
820	* the core code.
821	*
822	* @returns true if equal, false if not.
823	* @param pThis The core state.
824	* @param pBuf Pointer to the buffer structure.
825	* @param pvExpected Pointer to the expected source bytes (size and
826	* buffer offset given in pfnReinitBuf call).
827	*/
828	DECLCALLBACKMEMBER(bool, pfnIsBufEqual)(struct CIDETCORE pThis, struct CIDETBUF pBuf, void const *pvExpected);
829
830	/**
831	* Re-initializes the code buffer.
832	*
833	* @returns true on succes, false if the request cannot be satisfied.
834	* @param pThis The core state.
835	* @param pBuf Pointer to the CodeBuf member. The off and cb
836	* members represent what the core wants to
837	* execute.
838	*/
839	DECLCALLBACKMEMBER(bool, pfnReInitCodeBuf)(struct CIDETCORE *pThis, PCIDETBUF pBuf);
840
841	/**
842	* Emit code into the code buffer, making everything ready for pfnExecute.
843	*
844	* @returns VBox status code.
845	* @param pThis Pointer to the core structure.
846	* @param pBuf Pointer to the CodeBuf member.
847	* @param pvInstr Pointer to the encoded instruction bytes.
848	*/
849	DECLCALLBACKMEMBER(bool, pfnSetupCodeBuf)(struct CIDETCORE pThis, PCIDETBUF pBuf, void const pvInstr);
850
851	/**
852	* Executes the code indicated by InCtx, returning the result in ActualCtx.
853	*
854	* @returns true if execute, false if skipped.
855	* @param pThis Pointer to the core structure.
856	*/
857	DECLCALLBACKMEMBER(bool, pfnExecute)(struct CIDETCORE *pThis);
858
859	/**
860	* Report a test failure.
861	*
862	* @param pThis Pointer to the core structure.
863	* @param pszFormat Format string containing failure details.
864	* @param va Arguments referenced in @a pszFormat.
865	*/
866	DECLCALLBACKMEMBER(void, pfnFailure)(struct CIDETCORE pThis, const char pszFormat, va_list va);
867
868	/** Variable that's incremented each time the FNCIDETSETUPINOUT is called
869	* for an instruction. Reset when changing instruction or switching
870	* between valid and invalid inputs. */
871	uint32_t iInOut;
872
873	/** @name Copyied and extracted instruction information.
874	* @{ */
875	/** The flags (CIDET_OF_XXX) for the MODRM.REG operand, 0 if not applicable. */
876	uint32_t fMrmRegOp;
877	/** The flags (CIDET_OF_XXX) for the MODRM.RM operand, 0 if not applicable. */
878	uint32_t fMrmRmOp;
879	/** Instruction flags (CIDETINSTR::fFlags). */
880	uint64_t fInstrFlags;
881	/** Number of operands (CIDETINSTR::cOperands). */
882	uint8_t cOperands;
883	/** Number of memory operands (set by CidetCoreSetupFirstMemoryOperandConfig). */
884	uint8_t cMemoryOperands : 3;
885	/** Set if we're working on a MOD R/M byte. */
886	bool fUsesModRm : 1;
887	/** The index of the MODRM.REG operand, 7 if not applicable. */
888	uint8_t idxMrmRegOp : 3;
889	/** The index of the MODRM.RM operand, 7 if not applicable. */
890	uint8_t idxMrmRmOp : 3;
891	/** Set if the SIB byte uses VEX registers for indexing. */
892	bool fUsesVexIndexRegs : 1;
893	/** @} */
894
895	/** @name Basic encoding knobs, wheels and indicators.
896	* @{ */
897	/** Set if we're working on a SIB byte. */
898	bool fSib : 1;
899	/** Required segment prefix (X86_SREG_XXX), X86_SREG_COUNT if not. */
900	uint8_t uSegPrf : 3;
901	/** The address size prefix. */
902	bool fAddrSizePrf : 1;
903	/** The operand size prefix. */
904	bool fOpSizePrf : 1;
905	/** The REX.W prefix value. */
906	bool fRexW : 1;
907	/** The REX.R prefix value. */
908	bool fRexR : 1;
909	/** The REX.X prefix value. */
910	bool fRexX : 1;
911	/** The REX.B prefix value. */
912	bool fRexB : 1;
913	/** Set if a REX prefix is required with or without flags (for byte regs). */
914	bool fRex : 1;
915	/** Use VEX encoding. */
916	bool fVex : 1;
917	/** Use EVEX encoding. */
918	bool fEvex : 1;
919	/** Indicator: Effective addressing mode in bytes (2, 4, 8). */
920	uint8_t cbAddrMode : 4;
921	/** Indicator: Set if there is an operand accessing memory. */
922	bool fHasMemoryOperand : 1;
923	/** Indicator: Set if a register is used in two or more operands, and one of
924	* them being for addressing. */
925	bool fHasRegCollisionMem : 1;
926	/** Indicator: Helper indicator for tracking SIB.BASE collision. */
927	bool fHasRegCollisionMemBase : 1;
928	/** Indicator: Helper indicator for tracking SIB.INDEX collision. */
929	bool fHasRegCollisionMemIndex : 1;
930	/** Indicator: Set if a register is used directly in more than one operand. */
931	bool fHasRegCollisionDirect : 1;
932
933	/** Indicator: Set if MODRM.REG is the stack register. */
934	bool fHasStackRegInMrmReg : 1;
935	/** Indicator: Set if MODRM.RM or SIB.BASE is the stack register. */
936	bool fHasStackRegInMrmRmBase: 1;
937
938	/** Indicator: High byte-register specified by MODRM.REG. */
939	bool fHasHighByteRegInMrmReg : 1;
940	/** Indicator: High byte-register specified by MODRM.RM. */
941	bool fHasHighByteRegInMrmRm : 1;
942	/** Indicator: Set if REX prefixes are incompatible with the byte-register
943	* specified by MODRM.REG. */
944	bool fNoRexPrefixMrmReg : 1;
945	/** Indicator: Set if REX prefixes are incompatible with the byte-register
946	* specified by MODRM.RM. */
947	bool fNoRexPrefixMrmRm : 1;
948	/** Indicator: fNoRexPrefixMrmReg \|\| fNoRexPrefixMrmMr. */
949	bool fNoRexPrefix : 1;
950	/** The MOD R/M byte we're working on (if fUsesModRm is set). */
951	uint8_t bModRm;
952	/** The SIB/VSIB byte we're working on (if fSib is set). */
953	uint8_t bSib;
954	/** @} */
955
956	/** The effective instruction address. (See InCtx.rip and InCtx.cs for the
957	* rest of the instruction addressing stuff.) */
958	uint64_t uInstrEffAddr;
959
960	/** Operand information, mainly for the FNCIDETSETUPINOUT and similar. */
961	struct
962	{
963	/** The operand flags copied from (CIDETINSTR::afOperands). */
964	uint32_t fFlags;
965	/** The encoded register number, if register, UINT8_MAX if not. */
966	uint8_t iReg;
967	/** The actual operand size (encoded). */
968	uint8_t cb;
969	/** Set if immediate value. */
970	bool fIsImmediate : 1;
971	/** Set if memory access. */
972	bool fIsMem : 1;
973	/** Set if addressing is relative to RIP. */
974	bool fIsRipRelative : 1;
975	/** Set if it's a high byte register. */
976	bool fIsHighByteRegister : 1;
977	/** Size of the disposition, 0 if none. */
978	uint8_t cbMemDisp;
979	/** Base register, UINT8_MAX if not applicable. */
980	uint8_t iMemBaseReg;
981	/** Index register, UINT8_MAX if not applicable. */
982	uint8_t iMemIndexReg;
983	/** Index register, 1 if not applicable. */
984	uint8_t uMemScale;
985	/** Effective segment register, UINT8_MAX if not memory access. */
986	uint8_t iEffSeg;
987	/** Segment offset if memory access. Undefined if not memory access. */
988	uint64_t offSeg;
989	/** The effective address if memory access. */
990	uint64_t uEffAddr;
991	/** Immediate or displacement value. */
992	uint64_t uImmDispValue;
993	/** Base register value, undefined if irrelevant. */
994	uint64_t uMemBaseRegValue;
995	/** Index register value, undefined if irrelevant. */
996	uint64_t uMemIndexRegValue;
997	/** Points to where the input data for this operand should be placed,
998	* when possible. In the fIsMem = true case, it either points directly
999	* to the input buffer or to a temporary one. While in the other case,
1000	* it'll point into InCtx when possible. */
1001	RTPTRUNION In;
1002	/** Points to where the expected output data for this operand should be
1003	* stored, when possible. In the fIsMem = false case, it'll point into
1004	* ExpectedCtx when possible. */
1005	RTPTRUNION Expected;
1006	/** Pointer to the data buffer for this operand. */
1007	PCIDETBUF pDataBuf;
1008	} aOperands[4];
1009
1010	/** Buffer where we assemble the instruction. */
1011	uint8_t abInstr[45];
1012	/** The size of the instruction in abInstr. */
1013	uint8_t cbInstr;
1014	/** Offset of the instruction into the buffer. */
1015	uint16_t offInstr;
1016	/** Current code buffer. */
1017	CIDETBUF CodeBuf;
1018
1019	/** The input context. Initalized by driver and FNCIDETSETUPINOUT. */
1020	CIDETCPUCTX InCtx;
1021	/** The expected output context. */
1022	CIDETCPUCTX ExpectedCtx;
1023	/** The actual output context. */
1024	CIDETCPUCTX ActualCtx;
1025	/** Template input context, initialized when setting the mode. */
1026	CIDETCPUCTX InTemplateCtx;
1027
1028	/** Input and expected output temporary memory buffers. */
1029	uint8_t abBuf[0x2000];
1030
1031
1032	/** Number of skipped tests because of pfnSetupInOut failures. */
1033	uint32_t cSkippedSetupInOut;
1034	/** Number of skipped tests because of pfnReInitDataBuf failures. */
1035	uint32_t cSkippedReInitDataBuf;
1036	/** Number of skipped tests because of pfnSetupDataBuf failures. */
1037	uint32_t cSkippedSetupDataBuf;
1038	/** Number of skipped tests because RIP relative addressing constraints. */
1039	uint32_t cSkippedDataBufWrtRip;
1040	/** Number of skipped tests because of assemble failures. */
1041	uint32_t cSkippedAssemble;
1042	/** Number of skipped tests because of pfnReInitCodeBuf failures. */
1043	uint32_t cSkippedReInitCodeBuf;
1044	/** Number of skipped tests because of pfnSetupCodeBuf failures. */
1045	uint32_t cSkippedSetupCodeBuf;
1046	/** Number of skipped tests because the base and index registers are the same
1047	* one and there was a remainder when trying to point to the data buffer. */
1048	uint32_t cSkippedSameBaseIndexRemainder;
1049	/** Number of skipped tests because index-only addressing left a remainder. */
1050	uint32_t cSkippedOnlyIndexRemainder;
1051	/** Number of skipped tests because of direct addressing overflowed. */
1052	uint32_t cSkippedDirectAddressingOverflow;
1053
1054
1055	} CIDETCORE;
1056	/** Pointer to the CIDET core state. */
1057	typedef CIDETCORE *PCIDETCORE;
1058
1059	/** Magic number for CIDETCORE (Lee Konitz). */
1060	#define CIDETCORE_MAGIC UINT32_C(0x19271013)
1061
1062
1063	int CidetCoreInit(PCIDETCORE pThis, RTRAND hRand);
1064	void CidetCoreDelete(PCIDETCORE pThis);
1065	int CidetCoreSetTargetMode(PCIDETCORE pThis, uint8_t bMode);
1066	uint32_t CidetCoreGetOperandSize(PCIDETCORE pThis, uint8_t iOp);
1067	bool CidetCoreTestInstruction(PCIDETCORE pThis, PCCIDETINSTR pInstr);
1068
1069
1070	extern const CIDETINSTR g_aCidetInstructions1[];
1071	extern const uint32_t g_cCidetInstructions1;
1072
1073	#endif
1074

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source: vbox/trunk/src/VBox/ValidationKit/utils/cpu/cidet.h@ 53579

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