| 1 | #! /usr/bin/env perl
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| 2 | # Copyright 2014-2016 The OpenSSL Project Authors. All Rights Reserved.
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| 3 | #
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| 4 | # Licensed under the OpenSSL license (the "License"). You may not use
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| 5 | # this file except in compliance with the License. You can obtain a copy
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| 6 | # in the file LICENSE in the source distribution or at
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| 7 | # https://www.openssl.org/source/license.html
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| 8 |
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| 9 | #
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| 10 | # ====================================================================
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| 11 | # Written by Andy Polyakov <[email protected]> for the OpenSSL
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| 12 | # project. The module is, however, dual licensed under OpenSSL and
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| 13 | # CRYPTOGAMS licenses depending on where you obtain it. For further
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| 14 | # details see http://www.openssl.org/~appro/cryptogams/.
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| 15 | # ====================================================================
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| 16 | #
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| 17 | # GHASH for ARMv8 Crypto Extension, 64-bit polynomial multiplication.
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| 18 | #
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| 19 | # June 2014
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| 20 | #
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| 21 | # Initial version was developed in tight cooperation with Ard
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| 22 | # Biesheuvel <[email protected]> from bits-n-pieces from
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| 23 | # other assembly modules. Just like aesv8-armx.pl this module
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| 24 | # supports both AArch32 and AArch64 execution modes.
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| 25 | #
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| 26 | # July 2014
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| 27 | #
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| 28 | # Implement 2x aggregated reduction [see ghash-x86.pl for background
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| 29 | # information].
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| 30 | #
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| 31 | # Current performance in cycles per processed byte:
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| 32 | #
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| 33 | # PMULL[2] 32-bit NEON(*)
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| 34 | # Apple A7 0.92 5.62
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| 35 | # Cortex-A53 1.01 8.39
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| 36 | # Cortex-A57 1.17 7.61
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| 37 | # Denver 0.71 6.02
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| 38 | # Mongoose 1.10 8.06
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| 39 | #
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| 40 | # (*) presented for reference/comparison purposes;
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| 41 |
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| 42 | $flavour = shift;
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| 43 | $output = shift;
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| 44 |
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| 45 | $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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| 46 | ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
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| 47 | ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
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| 48 | die "can't locate arm-xlate.pl";
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| 49 |
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| 50 | open OUT,"| \"$^X\" $xlate $flavour $output";
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| 51 | *STDOUT=*OUT;
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| 52 |
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| 53 | $Xi="x0"; # argument block
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| 54 | $Htbl="x1";
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| 55 | $inp="x2";
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| 56 | $len="x3";
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| 57 |
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| 58 | $inc="x12";
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| 59 |
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| 60 | {
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| 61 | my ($Xl,$Xm,$Xh,$IN)=map("q$_",(0..3));
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| 62 | my ($t0,$t1,$t2,$xC2,$H,$Hhl,$H2)=map("q$_",(8..14));
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| 63 |
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| 64 | $code=<<___;
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| 65 | #include "arm_arch.h"
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| 66 |
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| 67 | .text
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| 68 | ___
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| 69 | $code.=".arch armv8-a+crypto\n" if ($flavour =~ /64/);
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| 70 | $code.=<<___ if ($flavour !~ /64/);
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| 71 | .fpu neon
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| 72 | .code 32
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| 73 | #undef __thumb2__
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| 74 | ___
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| 75 |
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| 76 | ################################################################################
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| 77 | # void gcm_init_v8(u128 Htable[16],const u64 H[2]);
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| 78 | #
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| 79 | # input: 128-bit H - secret parameter E(K,0^128)
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| 80 | # output: precomputed table filled with degrees of twisted H;
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| 81 | # H is twisted to handle reverse bitness of GHASH;
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| 82 | # only few of 16 slots of Htable[16] are used;
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| 83 | # data is opaque to outside world (which allows to
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| 84 | # optimize the code independently);
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| 85 | #
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| 86 | $code.=<<___;
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| 87 | .global gcm_init_v8
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| 88 | .type gcm_init_v8,%function
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| 89 | .align 4
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| 90 | gcm_init_v8:
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| 91 | vld1.64 {$t1},[x1] @ load input H
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| 92 | vmov.i8 $xC2,#0xe1
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| 93 | vshl.i64 $xC2,$xC2,#57 @ 0xc2.0
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| 94 | vext.8 $IN,$t1,$t1,#8
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| 95 | vshr.u64 $t2,$xC2,#63
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| 96 | vdup.32 $t1,${t1}[1]
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| 97 | vext.8 $t0,$t2,$xC2,#8 @ t0=0xc2....01
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| 98 | vshr.u64 $t2,$IN,#63
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| 99 | vshr.s32 $t1,$t1,#31 @ broadcast carry bit
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| 100 | vand $t2,$t2,$t0
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| 101 | vshl.i64 $IN,$IN,#1
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| 102 | vext.8 $t2,$t2,$t2,#8
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| 103 | vand $t0,$t0,$t1
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| 104 | vorr $IN,$IN,$t2 @ H<<<=1
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| 105 | veor $H,$IN,$t0 @ twisted H
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| 106 | vst1.64 {$H},[x0],#16 @ store Htable[0]
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| 107 |
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| 108 | @ calculate H^2
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| 109 | vext.8 $t0,$H,$H,#8 @ Karatsuba pre-processing
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| 110 | vpmull.p64 $Xl,$H,$H
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| 111 | veor $t0,$t0,$H
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| 112 | vpmull2.p64 $Xh,$H,$H
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| 113 | vpmull.p64 $Xm,$t0,$t0
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| 114 |
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| 115 | vext.8 $t1,$Xl,$Xh,#8 @ Karatsuba post-processing
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| 116 | veor $t2,$Xl,$Xh
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| 117 | veor $Xm,$Xm,$t1
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| 118 | veor $Xm,$Xm,$t2
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| 119 | vpmull.p64 $t2,$Xl,$xC2 @ 1st phase
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| 120 |
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| 121 | vmov $Xh#lo,$Xm#hi @ Xh|Xm - 256-bit result
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| 122 | vmov $Xm#hi,$Xl#lo @ Xm is rotated Xl
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| 123 | veor $Xl,$Xm,$t2
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| 124 |
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| 125 | vext.8 $t2,$Xl,$Xl,#8 @ 2nd phase
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| 126 | vpmull.p64 $Xl,$Xl,$xC2
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| 127 | veor $t2,$t2,$Xh
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| 128 | veor $H2,$Xl,$t2
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| 129 |
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| 130 | vext.8 $t1,$H2,$H2,#8 @ Karatsuba pre-processing
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| 131 | veor $t1,$t1,$H2
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| 132 | vext.8 $Hhl,$t0,$t1,#8 @ pack Karatsuba pre-processed
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| 133 | vst1.64 {$Hhl-$H2},[x0] @ store Htable[1..2]
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| 134 |
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| 135 | ret
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| 136 | .size gcm_init_v8,.-gcm_init_v8
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| 137 | ___
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| 138 | ################################################################################
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| 139 | # void gcm_gmult_v8(u64 Xi[2],const u128 Htable[16]);
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| 140 | #
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| 141 | # input: Xi - current hash value;
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| 142 | # Htable - table precomputed in gcm_init_v8;
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| 143 | # output: Xi - next hash value Xi;
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| 144 | #
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| 145 | $code.=<<___;
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| 146 | .global gcm_gmult_v8
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| 147 | .type gcm_gmult_v8,%function
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| 148 | .align 4
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| 149 | gcm_gmult_v8:
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| 150 | vld1.64 {$t1},[$Xi] @ load Xi
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| 151 | vmov.i8 $xC2,#0xe1
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| 152 | vld1.64 {$H-$Hhl},[$Htbl] @ load twisted H, ...
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| 153 | vshl.u64 $xC2,$xC2,#57
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| 154 | #ifndef __ARMEB__
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| 155 | vrev64.8 $t1,$t1
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| 156 | #endif
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| 157 | vext.8 $IN,$t1,$t1,#8
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| 158 |
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| 159 | vpmull.p64 $Xl,$H,$IN @ H.lo·Xi.lo
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| 160 | veor $t1,$t1,$IN @ Karatsuba pre-processing
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| 161 | vpmull2.p64 $Xh,$H,$IN @ H.hi·Xi.hi
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| 162 | vpmull.p64 $Xm,$Hhl,$t1 @ (H.lo+H.hi)·(Xi.lo+Xi.hi)
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| 163 |
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| 164 | vext.8 $t1,$Xl,$Xh,#8 @ Karatsuba post-processing
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| 165 | veor $t2,$Xl,$Xh
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| 166 | veor $Xm,$Xm,$t1
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| 167 | veor $Xm,$Xm,$t2
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| 168 | vpmull.p64 $t2,$Xl,$xC2 @ 1st phase of reduction
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| 169 |
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| 170 | vmov $Xh#lo,$Xm#hi @ Xh|Xm - 256-bit result
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| 171 | vmov $Xm#hi,$Xl#lo @ Xm is rotated Xl
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| 172 | veor $Xl,$Xm,$t2
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| 173 |
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| 174 | vext.8 $t2,$Xl,$Xl,#8 @ 2nd phase of reduction
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| 175 | vpmull.p64 $Xl,$Xl,$xC2
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| 176 | veor $t2,$t2,$Xh
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| 177 | veor $Xl,$Xl,$t2
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| 178 |
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| 179 | #ifndef __ARMEB__
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| 180 | vrev64.8 $Xl,$Xl
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| 181 | #endif
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| 182 | vext.8 $Xl,$Xl,$Xl,#8
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| 183 | vst1.64 {$Xl},[$Xi] @ write out Xi
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| 184 |
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| 185 | ret
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| 186 | .size gcm_gmult_v8,.-gcm_gmult_v8
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| 187 | ___
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| 188 | ################################################################################
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| 189 | # void gcm_ghash_v8(u64 Xi[2],const u128 Htable[16],const u8 *inp,size_t len);
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| 190 | #
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| 191 | # input: table precomputed in gcm_init_v8;
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| 192 | # current hash value Xi;
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| 193 | # pointer to input data;
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| 194 | # length of input data in bytes, but divisible by block size;
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| 195 | # output: next hash value Xi;
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| 196 | #
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| 197 | $code.=<<___;
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| 198 | .global gcm_ghash_v8
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| 199 | .type gcm_ghash_v8,%function
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| 200 | .align 4
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| 201 | gcm_ghash_v8:
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| 202 | ___
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| 203 | $code.=<<___ if ($flavour !~ /64/);
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| 204 | vstmdb sp!,{d8-d15} @ 32-bit ABI says so
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| 205 | ___
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| 206 | $code.=<<___;
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| 207 | vld1.64 {$Xl},[$Xi] @ load [rotated] Xi
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| 208 | @ "[rotated]" means that
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| 209 | @ loaded value would have
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| 210 | @ to be rotated in order to
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| 211 | @ make it appear as in
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| 212 | @ alorithm specification
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| 213 | subs $len,$len,#32 @ see if $len is 32 or larger
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| 214 | mov $inc,#16 @ $inc is used as post-
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| 215 | @ increment for input pointer;
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| 216 | @ as loop is modulo-scheduled
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| 217 | @ $inc is zeroed just in time
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| 218 | @ to preclude oversteping
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| 219 | @ inp[len], which means that
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| 220 | @ last block[s] are actually
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| 221 | @ loaded twice, but last
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| 222 | @ copy is not processed
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| 223 | vld1.64 {$H-$Hhl},[$Htbl],#32 @ load twisted H, ..., H^2
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| 224 | vmov.i8 $xC2,#0xe1
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| 225 | vld1.64 {$H2},[$Htbl]
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| 226 | cclr $inc,eq @ is it time to zero $inc?
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| 227 | vext.8 $Xl,$Xl,$Xl,#8 @ rotate Xi
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| 228 | vld1.64 {$t0},[$inp],#16 @ load [rotated] I[0]
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| 229 | vshl.u64 $xC2,$xC2,#57 @ compose 0xc2.0 constant
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| 230 | #ifndef __ARMEB__
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| 231 | vrev64.8 $t0,$t0
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| 232 | vrev64.8 $Xl,$Xl
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| 233 | #endif
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| 234 | vext.8 $IN,$t0,$t0,#8 @ rotate I[0]
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| 235 | b.lo .Lodd_tail_v8 @ $len was less than 32
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| 236 | ___
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| 237 | { my ($Xln,$Xmn,$Xhn,$In) = map("q$_",(4..7));
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| 238 | #######
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| 239 | # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
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| 240 | # [(H*Ii+1) + (H*Xi+1)] mod P =
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| 241 | # [(H*Ii+1) + H^2*(Ii+Xi)] mod P
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| 242 | #
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| 243 | $code.=<<___;
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| 244 | vld1.64 {$t1},[$inp],$inc @ load [rotated] I[1]
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| 245 | #ifndef __ARMEB__
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| 246 | vrev64.8 $t1,$t1
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| 247 | #endif
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| 248 | vext.8 $In,$t1,$t1,#8
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| 249 | veor $IN,$IN,$Xl @ I[i]^=Xi
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| 250 | vpmull.p64 $Xln,$H,$In @ H·Ii+1
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| 251 | veor $t1,$t1,$In @ Karatsuba pre-processing
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| 252 | vpmull2.p64 $Xhn,$H,$In
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| 253 | b .Loop_mod2x_v8
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| 254 |
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| 255 | .align 4
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| 256 | .Loop_mod2x_v8:
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| 257 | vext.8 $t2,$IN,$IN,#8
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| 258 | subs $len,$len,#32 @ is there more data?
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| 259 | vpmull.p64 $Xl,$H2,$IN @ H^2.lo·Xi.lo
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| 260 | cclr $inc,lo @ is it time to zero $inc?
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| 261 |
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| 262 | vpmull.p64 $Xmn,$Hhl,$t1
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| 263 | veor $t2,$t2,$IN @ Karatsuba pre-processing
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| 264 | vpmull2.p64 $Xh,$H2,$IN @ H^2.hi·Xi.hi
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| 265 | veor $Xl,$Xl,$Xln @ accumulate
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| 266 | vpmull2.p64 $Xm,$Hhl,$t2 @ (H^2.lo+H^2.hi)·(Xi.lo+Xi.hi)
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| 267 | vld1.64 {$t0},[$inp],$inc @ load [rotated] I[i+2]
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| 268 |
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| 269 | veor $Xh,$Xh,$Xhn
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| 270 | cclr $inc,eq @ is it time to zero $inc?
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| 271 | veor $Xm,$Xm,$Xmn
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| 272 |
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| 273 | vext.8 $t1,$Xl,$Xh,#8 @ Karatsuba post-processing
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| 274 | veor $t2,$Xl,$Xh
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| 275 | veor $Xm,$Xm,$t1
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| 276 | vld1.64 {$t1},[$inp],$inc @ load [rotated] I[i+3]
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| 277 | #ifndef __ARMEB__
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| 278 | vrev64.8 $t0,$t0
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| 279 | #endif
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| 280 | veor $Xm,$Xm,$t2
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| 281 | vpmull.p64 $t2,$Xl,$xC2 @ 1st phase of reduction
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| 282 |
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| 283 | #ifndef __ARMEB__
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| 284 | vrev64.8 $t1,$t1
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| 285 | #endif
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| 286 | vmov $Xh#lo,$Xm#hi @ Xh|Xm - 256-bit result
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| 287 | vmov $Xm#hi,$Xl#lo @ Xm is rotated Xl
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| 288 | vext.8 $In,$t1,$t1,#8
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| 289 | vext.8 $IN,$t0,$t0,#8
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| 290 | veor $Xl,$Xm,$t2
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| 291 | vpmull.p64 $Xln,$H,$In @ H·Ii+1
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| 292 | veor $IN,$IN,$Xh @ accumulate $IN early
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| 293 |
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| 294 | vext.8 $t2,$Xl,$Xl,#8 @ 2nd phase of reduction
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| 295 | vpmull.p64 $Xl,$Xl,$xC2
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| 296 | veor $IN,$IN,$t2
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| 297 | veor $t1,$t1,$In @ Karatsuba pre-processing
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| 298 | veor $IN,$IN,$Xl
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| 299 | vpmull2.p64 $Xhn,$H,$In
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| 300 | b.hs .Loop_mod2x_v8 @ there was at least 32 more bytes
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| 301 |
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| 302 | veor $Xh,$Xh,$t2
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| 303 | vext.8 $IN,$t0,$t0,#8 @ re-construct $IN
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| 304 | adds $len,$len,#32 @ re-construct $len
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| 305 | veor $Xl,$Xl,$Xh @ re-construct $Xl
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| 306 | b.eq .Ldone_v8 @ is $len zero?
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| 307 | ___
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| 308 | }
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| 309 | $code.=<<___;
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| 310 | .Lodd_tail_v8:
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| 311 | vext.8 $t2,$Xl,$Xl,#8
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| 312 | veor $IN,$IN,$Xl @ inp^=Xi
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| 313 | veor $t1,$t0,$t2 @ $t1 is rotated inp^Xi
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| 314 |
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| 315 | vpmull.p64 $Xl,$H,$IN @ H.lo·Xi.lo
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| 316 | veor $t1,$t1,$IN @ Karatsuba pre-processing
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| 317 | vpmull2.p64 $Xh,$H,$IN @ H.hi·Xi.hi
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| 318 | vpmull.p64 $Xm,$Hhl,$t1 @ (H.lo+H.hi)·(Xi.lo+Xi.hi)
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| 319 |
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| 320 | vext.8 $t1,$Xl,$Xh,#8 @ Karatsuba post-processing
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| 321 | veor $t2,$Xl,$Xh
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| 322 | veor $Xm,$Xm,$t1
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| 323 | veor $Xm,$Xm,$t2
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| 324 | vpmull.p64 $t2,$Xl,$xC2 @ 1st phase of reduction
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| 325 |
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| 326 | vmov $Xh#lo,$Xm#hi @ Xh|Xm - 256-bit result
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| 327 | vmov $Xm#hi,$Xl#lo @ Xm is rotated Xl
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| 328 | veor $Xl,$Xm,$t2
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| 329 |
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| 330 | vext.8 $t2,$Xl,$Xl,#8 @ 2nd phase of reduction
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| 331 | vpmull.p64 $Xl,$Xl,$xC2
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| 332 | veor $t2,$t2,$Xh
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| 333 | veor $Xl,$Xl,$t2
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| 334 |
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| 335 | .Ldone_v8:
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| 336 | #ifndef __ARMEB__
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| 337 | vrev64.8 $Xl,$Xl
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| 338 | #endif
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| 339 | vext.8 $Xl,$Xl,$Xl,#8
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| 340 | vst1.64 {$Xl},[$Xi] @ write out Xi
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| 341 |
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| 342 | ___
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| 343 | $code.=<<___ if ($flavour !~ /64/);
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| 344 | vldmia sp!,{d8-d15} @ 32-bit ABI says so
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| 345 | ___
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| 346 | $code.=<<___;
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| 347 | ret
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| 348 | .size gcm_ghash_v8,.-gcm_ghash_v8
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| 349 | ___
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| 350 | }
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| 351 | $code.=<<___;
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| 352 | .asciz "GHASH for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
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| 353 | .align 2
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| 354 | ___
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| 355 |
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| 356 | if ($flavour =~ /64/) { ######## 64-bit code
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| 357 | sub unvmov {
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| 358 | my $arg=shift;
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| 359 |
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| 360 | $arg =~ m/q([0-9]+)#(lo|hi),\s*q([0-9]+)#(lo|hi)/o &&
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| 361 | sprintf "ins v%d.d[%d],v%d.d[%d]",$1,($2 eq "lo")?0:1,$3,($4 eq "lo")?0:1;
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| 362 | }
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| 363 | foreach(split("\n",$code)) {
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| 364 | s/cclr\s+([wx])([^,]+),\s*([a-z]+)/csel $1$2,$1zr,$1$2,$3/o or
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| 365 | s/vmov\.i8/movi/o or # fix up legacy mnemonics
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| 366 | s/vmov\s+(.*)/unvmov($1)/geo or
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| 367 | s/vext\.8/ext/o or
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| 368 | s/vshr\.s/sshr\.s/o or
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| 369 | s/vshr/ushr/o or
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| 370 | s/^(\s+)v/$1/o or # strip off v prefix
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| 371 | s/\bbx\s+lr\b/ret/o;
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| 372 |
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| 373 | s/\bq([0-9]+)\b/"v".($1<8?$1:$1+8).".16b"/geo; # old->new registers
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| 374 | s/@\s/\/\//o; # old->new style commentary
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| 375 |
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| 376 | # fix up remainig legacy suffixes
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| 377 | s/\.[ui]?8(\s)/$1/o;
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| 378 | s/\.[uis]?32//o and s/\.16b/\.4s/go;
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| 379 | m/\.p64/o and s/\.16b/\.1q/o; # 1st pmull argument
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| 380 | m/l\.p64/o and s/\.16b/\.1d/go; # 2nd and 3rd pmull arguments
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| 381 | s/\.[uisp]?64//o and s/\.16b/\.2d/go;
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| 382 | s/\.[42]([sd])\[([0-3])\]/\.$1\[$2\]/o;
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| 383 |
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| 384 | print $_,"\n";
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| 385 | }
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| 386 | } else { ######## 32-bit code
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| 387 | sub unvdup32 {
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| 388 | my $arg=shift;
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| 389 |
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| 390 | $arg =~ m/q([0-9]+),\s*q([0-9]+)\[([0-3])\]/o &&
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| 391 | sprintf "vdup.32 q%d,d%d[%d]",$1,2*$2+($3>>1),$3&1;
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| 392 | }
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| 393 | sub unvpmullp64 {
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| 394 | my ($mnemonic,$arg)=@_;
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| 395 |
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| 396 | if ($arg =~ m/q([0-9]+),\s*q([0-9]+),\s*q([0-9]+)/o) {
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| 397 | my $word = 0xf2a00e00|(($1&7)<<13)|(($1&8)<<19)
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| 398 | |(($2&7)<<17)|(($2&8)<<4)
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| 399 | |(($3&7)<<1) |(($3&8)<<2);
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| 400 | $word |= 0x00010001 if ($mnemonic =~ "2");
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| 401 | # since ARMv7 instructions are always encoded little-endian.
|
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| 402 | # correct solution is to use .inst directive, but older
|
|---|
| 403 | # assemblers don't implement it:-(
|
|---|
| 404 | sprintf ".byte\t0x%02x,0x%02x,0x%02x,0x%02x\t@ %s %s",
|
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| 405 | $word&0xff,($word>>8)&0xff,
|
|---|
| 406 | ($word>>16)&0xff,($word>>24)&0xff,
|
|---|
| 407 | $mnemonic,$arg;
|
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| 408 | }
|
|---|
| 409 | }
|
|---|
| 410 |
|
|---|
| 411 | foreach(split("\n",$code)) {
|
|---|
| 412 | s/\b[wx]([0-9]+)\b/r$1/go; # new->old registers
|
|---|
| 413 | s/\bv([0-9])\.[12468]+[bsd]\b/q$1/go; # new->old registers
|
|---|
| 414 | s/\/\/\s?/@ /o; # new->old style commentary
|
|---|
| 415 |
|
|---|
| 416 | # fix up remainig new-style suffixes
|
|---|
| 417 | s/\],#[0-9]+/]!/o;
|
|---|
| 418 |
|
|---|
| 419 | s/cclr\s+([^,]+),\s*([a-z]+)/mov$2 $1,#0/o or
|
|---|
| 420 | s/vdup\.32\s+(.*)/unvdup32($1)/geo or
|
|---|
| 421 | s/v?(pmull2?)\.p64\s+(.*)/unvpmullp64($1,$2)/geo or
|
|---|
| 422 | s/\bq([0-9]+)#(lo|hi)/sprintf "d%d",2*$1+($2 eq "hi")/geo or
|
|---|
| 423 | s/^(\s+)b\./$1b/o or
|
|---|
| 424 | s/^(\s+)ret/$1bx\tlr/o;
|
|---|
| 425 |
|
|---|
| 426 | print $_,"\n";
|
|---|
| 427 | }
|
|---|
| 428 | }
|
|---|
| 429 |
|
|---|
| 430 | close STDOUT; # enforce flush
|
|---|
