| 1 | #! /usr/bin/env perl
|
|---|
| 2 | # Copyright 2005-2016 The OpenSSL Project Authors. All Rights Reserved.
|
|---|
| 3 | #
|
|---|
| 4 | # Licensed under the OpenSSL license (the "License"). You may not use
|
|---|
| 5 | # this file except in compliance with the License. You can obtain a copy
|
|---|
| 6 | # in the file LICENSE in the source distribution or at
|
|---|
| 7 | # https://www.openssl.org/source/license.html
|
|---|
| 8 |
|
|---|
| 9 | #
|
|---|
| 10 | # ====================================================================
|
|---|
| 11 | # Written by Andy Polyakov <[email protected]> for the OpenSSL
|
|---|
| 12 | # project. The module is, however, dual licensed under OpenSSL and
|
|---|
| 13 | # CRYPTOGAMS licenses depending on where you obtain it. For further
|
|---|
| 14 | # details see http://www.openssl.org/~appro/cryptogams/.
|
|---|
| 15 | # ====================================================================
|
|---|
| 16 | #
|
|---|
| 17 | # July 2004
|
|---|
| 18 | #
|
|---|
| 19 | # 2.22x RC4 tune-up:-) It should be noted though that my hand [as in
|
|---|
| 20 | # "hand-coded assembler"] doesn't stand for the whole improvement
|
|---|
| 21 | # coefficient. It turned out that eliminating RC4_CHAR from config
|
|---|
| 22 | # line results in ~40% improvement (yes, even for C implementation).
|
|---|
| 23 | # Presumably it has everything to do with AMD cache architecture and
|
|---|
| 24 | # RAW or whatever penalties. Once again! The module *requires* config
|
|---|
| 25 | # line *without* RC4_CHAR! As for coding "secret," I bet on partial
|
|---|
| 26 | # register arithmetics. For example instead of 'inc %r8; and $255,%r8'
|
|---|
| 27 | # I simply 'inc %r8b'. Even though optimization manual discourages
|
|---|
| 28 | # to operate on partial registers, it turned out to be the best bet.
|
|---|
| 29 | # At least for AMD... How IA32E would perform remains to be seen...
|
|---|
| 30 |
|
|---|
| 31 | # November 2004
|
|---|
| 32 | #
|
|---|
| 33 | # As was shown by Marc Bevand reordering of couple of load operations
|
|---|
| 34 | # results in even higher performance gain of 3.3x:-) At least on
|
|---|
| 35 | # Opteron... For reference, 1x in this case is RC4_CHAR C-code
|
|---|
| 36 | # compiled with gcc 3.3.2, which performs at ~54MBps per 1GHz clock.
|
|---|
| 37 | # Latter means that if you want to *estimate* what to expect from
|
|---|
| 38 | # *your* Opteron, then multiply 54 by 3.3 and clock frequency in GHz.
|
|---|
| 39 |
|
|---|
| 40 | # November 2004
|
|---|
| 41 | #
|
|---|
| 42 | # Intel P4 EM64T core was found to run the AMD64 code really slow...
|
|---|
| 43 | # The only way to achieve comparable performance on P4 was to keep
|
|---|
| 44 | # RC4_CHAR. Kind of ironic, huh? As it's apparently impossible to
|
|---|
| 45 | # compose blended code, which would perform even within 30% marginal
|
|---|
| 46 | # on either AMD and Intel platforms, I implement both cases. See
|
|---|
| 47 | # rc4_skey.c for further details...
|
|---|
| 48 |
|
|---|
| 49 | # April 2005
|
|---|
| 50 | #
|
|---|
| 51 | # P4 EM64T core appears to be "allergic" to 64-bit inc/dec. Replacing
|
|---|
| 52 | # those with add/sub results in 50% performance improvement of folded
|
|---|
| 53 | # loop...
|
|---|
| 54 |
|
|---|
| 55 | # May 2005
|
|---|
| 56 | #
|
|---|
| 57 | # As was shown by Zou Nanhai loop unrolling can improve Intel EM64T
|
|---|
| 58 | # performance by >30% [unlike P4 32-bit case that is]. But this is
|
|---|
| 59 | # provided that loads are reordered even more aggressively! Both code
|
|---|
| 60 | # paths, AMD64 and EM64T, reorder loads in essentially same manner
|
|---|
| 61 | # as my IA-64 implementation. On Opteron this resulted in modest 5%
|
|---|
| 62 | # improvement [I had to test it], while final Intel P4 performance
|
|---|
| 63 | # achieves respectful 432MBps on 2.8GHz processor now. For reference.
|
|---|
| 64 | # If executed on Xeon, current RC4_CHAR code-path is 2.7x faster than
|
|---|
| 65 | # RC4_INT code-path. While if executed on Opteron, it's only 25%
|
|---|
| 66 | # slower than the RC4_INT one [meaning that if CPU µ-arch detection
|
|---|
| 67 | # is not implemented, then this final RC4_CHAR code-path should be
|
|---|
| 68 | # preferred, as it provides better *all-round* performance].
|
|---|
| 69 |
|
|---|
| 70 | # March 2007
|
|---|
| 71 | #
|
|---|
| 72 | # Intel Core2 was observed to perform poorly on both code paths:-( It
|
|---|
| 73 | # apparently suffers from some kind of partial register stall, which
|
|---|
| 74 | # occurs in 64-bit mode only [as virtually identical 32-bit loop was
|
|---|
| 75 | # observed to outperform 64-bit one by almost 50%]. Adding two movzb to
|
|---|
| 76 | # cloop1 boosts its performance by 80%! This loop appears to be optimal
|
|---|
| 77 | # fit for Core2 and therefore the code was modified to skip cloop8 on
|
|---|
| 78 | # this CPU.
|
|---|
| 79 |
|
|---|
| 80 | # May 2010
|
|---|
| 81 | #
|
|---|
| 82 | # Intel Westmere was observed to perform suboptimally. Adding yet
|
|---|
| 83 | # another movzb to cloop1 improved performance by almost 50%! Core2
|
|---|
| 84 | # performance is improved too, but nominally...
|
|---|
| 85 |
|
|---|
| 86 | # May 2011
|
|---|
| 87 | #
|
|---|
| 88 | # The only code path that was not modified is P4-specific one. Non-P4
|
|---|
| 89 | # Intel code path optimization is heavily based on submission by Maxim
|
|---|
| 90 | # Perminov, Maxim Locktyukhin and Jim Guilford of Intel. I've used
|
|---|
| 91 | # some of the ideas even in attempt to optmize the original RC4_INT
|
|---|
| 92 | # code path... Current performance in cycles per processed byte (less
|
|---|
| 93 | # is better) and improvement coefficients relative to previous
|
|---|
| 94 | # version of this module are:
|
|---|
| 95 | #
|
|---|
| 96 | # Opteron 5.3/+0%(*)
|
|---|
| 97 | # P4 6.5
|
|---|
| 98 | # Core2 6.2/+15%(**)
|
|---|
| 99 | # Westmere 4.2/+60%
|
|---|
| 100 | # Sandy Bridge 4.2/+120%
|
|---|
| 101 | # Atom 9.3/+80%
|
|---|
| 102 | # VIA Nano 6.4/+4%
|
|---|
| 103 | # Ivy Bridge 4.1/+30%
|
|---|
| 104 | # Bulldozer 4.5/+30%(*)
|
|---|
| 105 | #
|
|---|
| 106 | # (*) But corresponding loop has less instructions, which should have
|
|---|
| 107 | # positive effect on upcoming Bulldozer, which has one less ALU.
|
|---|
| 108 | # For reference, Intel code runs at 6.8 cpb rate on Opteron.
|
|---|
| 109 | # (**) Note that Core2 result is ~15% lower than corresponding result
|
|---|
| 110 | # for 32-bit code, meaning that it's possible to improve it,
|
|---|
| 111 | # but more than likely at the cost of the others (see rc4-586.pl
|
|---|
| 112 | # to get the idea)...
|
|---|
| 113 |
|
|---|
| 114 | $flavour = shift;
|
|---|
| 115 | $output = shift;
|
|---|
| 116 | if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
|
|---|
| 117 |
|
|---|
| 118 | $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
|
|---|
| 119 |
|
|---|
| 120 | $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
|
|---|
| 121 | ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
|
|---|
| 122 | ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
|
|---|
| 123 | die "can't locate x86_64-xlate.pl";
|
|---|
| 124 |
|
|---|
| 125 | open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\"";
|
|---|
| 126 | *STDOUT=*OUT;
|
|---|
| 127 |
|
|---|
| 128 | $dat="%rdi"; # arg1
|
|---|
| 129 | $len="%rsi"; # arg2
|
|---|
| 130 | $inp="%rdx"; # arg3
|
|---|
| 131 | $out="%rcx"; # arg4
|
|---|
| 132 |
|
|---|
| 133 | {
|
|---|
| 134 | $code=<<___;
|
|---|
| 135 | .text
|
|---|
| 136 | .extern OPENSSL_ia32cap_P
|
|---|
| 137 |
|
|---|
| 138 | .globl RC4
|
|---|
| 139 | .type RC4,\@function,4
|
|---|
| 140 | .align 16
|
|---|
| 141 | RC4: or $len,$len
|
|---|
| 142 | jne .Lentry
|
|---|
| 143 | ret
|
|---|
| 144 | .Lentry:
|
|---|
| 145 | push %rbx
|
|---|
| 146 | push %r12
|
|---|
| 147 | push %r13
|
|---|
| 148 | .Lprologue:
|
|---|
| 149 | mov $len,%r11
|
|---|
| 150 | mov $inp,%r12
|
|---|
| 151 | mov $out,%r13
|
|---|
| 152 | ___
|
|---|
| 153 | my $len="%r11"; # reassign input arguments
|
|---|
| 154 | my $inp="%r12";
|
|---|
| 155 | my $out="%r13";
|
|---|
| 156 |
|
|---|
| 157 | my @XX=("%r10","%rsi");
|
|---|
| 158 | my @TX=("%rax","%rbx");
|
|---|
| 159 | my $YY="%rcx";
|
|---|
| 160 | my $TY="%rdx";
|
|---|
| 161 |
|
|---|
| 162 | $code.=<<___;
|
|---|
| 163 | xor $XX[0],$XX[0]
|
|---|
| 164 | xor $YY,$YY
|
|---|
| 165 |
|
|---|
| 166 | lea 8($dat),$dat
|
|---|
| 167 | mov -8($dat),$XX[0]#b
|
|---|
| 168 | mov -4($dat),$YY#b
|
|---|
| 169 | cmpl \$-1,256($dat)
|
|---|
| 170 | je .LRC4_CHAR
|
|---|
| 171 | mov OPENSSL_ia32cap_P(%rip),%r8d
|
|---|
| 172 | xor $TX[1],$TX[1]
|
|---|
| 173 | inc $XX[0]#b
|
|---|
| 174 | sub $XX[0],$TX[1]
|
|---|
| 175 | sub $inp,$out
|
|---|
| 176 | movl ($dat,$XX[0],4),$TX[0]#d
|
|---|
| 177 | test \$-16,$len
|
|---|
| 178 | jz .Lloop1
|
|---|
| 179 | bt \$30,%r8d # Intel CPU?
|
|---|
| 180 | jc .Lintel
|
|---|
| 181 | and \$7,$TX[1]
|
|---|
| 182 | lea 1($XX[0]),$XX[1]
|
|---|
| 183 | jz .Loop8
|
|---|
| 184 | sub $TX[1],$len
|
|---|
| 185 | .Loop8_warmup:
|
|---|
| 186 | add $TX[0]#b,$YY#b
|
|---|
| 187 | movl ($dat,$YY,4),$TY#d
|
|---|
| 188 | movl $TX[0]#d,($dat,$YY,4)
|
|---|
| 189 | movl $TY#d,($dat,$XX[0],4)
|
|---|
| 190 | add $TY#b,$TX[0]#b
|
|---|
| 191 | inc $XX[0]#b
|
|---|
| 192 | movl ($dat,$TX[0],4),$TY#d
|
|---|
| 193 | movl ($dat,$XX[0],4),$TX[0]#d
|
|---|
| 194 | xorb ($inp),$TY#b
|
|---|
| 195 | movb $TY#b,($out,$inp)
|
|---|
| 196 | lea 1($inp),$inp
|
|---|
| 197 | dec $TX[1]
|
|---|
| 198 | jnz .Loop8_warmup
|
|---|
| 199 |
|
|---|
| 200 | lea 1($XX[0]),$XX[1]
|
|---|
| 201 | jmp .Loop8
|
|---|
| 202 | .align 16
|
|---|
| 203 | .Loop8:
|
|---|
| 204 | ___
|
|---|
| 205 | for ($i=0;$i<8;$i++) {
|
|---|
| 206 | $code.=<<___ if ($i==7);
|
|---|
| 207 | add \$8,$XX[1]#b
|
|---|
| 208 | ___
|
|---|
| 209 | $code.=<<___;
|
|---|
| 210 | add $TX[0]#b,$YY#b
|
|---|
| 211 | movl ($dat,$YY,4),$TY#d
|
|---|
| 212 | movl $TX[0]#d,($dat,$YY,4)
|
|---|
| 213 | movl `4*($i==7?-1:$i)`($dat,$XX[1],4),$TX[1]#d
|
|---|
| 214 | ror \$8,%r8 # ror is redundant when $i=0
|
|---|
| 215 | movl $TY#d,4*$i($dat,$XX[0],4)
|
|---|
| 216 | add $TX[0]#b,$TY#b
|
|---|
| 217 | movb ($dat,$TY,4),%r8b
|
|---|
| 218 | ___
|
|---|
| 219 | push(@TX,shift(@TX)); #push(@XX,shift(@XX)); # "rotate" registers
|
|---|
| 220 | }
|
|---|
| 221 | $code.=<<___;
|
|---|
| 222 | add \$8,$XX[0]#b
|
|---|
| 223 | ror \$8,%r8
|
|---|
| 224 | sub \$8,$len
|
|---|
| 225 |
|
|---|
| 226 | xor ($inp),%r8
|
|---|
| 227 | mov %r8,($out,$inp)
|
|---|
| 228 | lea 8($inp),$inp
|
|---|
| 229 |
|
|---|
| 230 | test \$-8,$len
|
|---|
| 231 | jnz .Loop8
|
|---|
| 232 | cmp \$0,$len
|
|---|
| 233 | jne .Lloop1
|
|---|
| 234 | jmp .Lexit
|
|---|
| 235 |
|
|---|
| 236 | .align 16
|
|---|
| 237 | .Lintel:
|
|---|
| 238 | test \$-32,$len
|
|---|
| 239 | jz .Lloop1
|
|---|
| 240 | and \$15,$TX[1]
|
|---|
| 241 | jz .Loop16_is_hot
|
|---|
| 242 | sub $TX[1],$len
|
|---|
| 243 | .Loop16_warmup:
|
|---|
| 244 | add $TX[0]#b,$YY#b
|
|---|
| 245 | movl ($dat,$YY,4),$TY#d
|
|---|
| 246 | movl $TX[0]#d,($dat,$YY,4)
|
|---|
| 247 | movl $TY#d,($dat,$XX[0],4)
|
|---|
| 248 | add $TY#b,$TX[0]#b
|
|---|
| 249 | inc $XX[0]#b
|
|---|
| 250 | movl ($dat,$TX[0],4),$TY#d
|
|---|
| 251 | movl ($dat,$XX[0],4),$TX[0]#d
|
|---|
| 252 | xorb ($inp),$TY#b
|
|---|
| 253 | movb $TY#b,($out,$inp)
|
|---|
| 254 | lea 1($inp),$inp
|
|---|
| 255 | dec $TX[1]
|
|---|
| 256 | jnz .Loop16_warmup
|
|---|
| 257 |
|
|---|
| 258 | mov $YY,$TX[1]
|
|---|
| 259 | xor $YY,$YY
|
|---|
| 260 | mov $TX[1]#b,$YY#b
|
|---|
| 261 |
|
|---|
| 262 | .Loop16_is_hot:
|
|---|
| 263 | lea ($dat,$XX[0],4),$XX[1]
|
|---|
| 264 | ___
|
|---|
| 265 | sub RC4_loop {
|
|---|
| 266 | my $i=shift;
|
|---|
| 267 | my $j=$i<0?0:$i;
|
|---|
| 268 | my $xmm="%xmm".($j&1);
|
|---|
| 269 |
|
|---|
| 270 | $code.=" add \$16,$XX[0]#b\n" if ($i==15);
|
|---|
| 271 | $code.=" movdqu ($inp),%xmm2\n" if ($i==15);
|
|---|
| 272 | $code.=" add $TX[0]#b,$YY#b\n" if ($i<=0);
|
|---|
| 273 | $code.=" movl ($dat,$YY,4),$TY#d\n";
|
|---|
| 274 | $code.=" pxor %xmm0,%xmm2\n" if ($i==0);
|
|---|
| 275 | $code.=" psllq \$8,%xmm1\n" if ($i==0);
|
|---|
| 276 | $code.=" pxor $xmm,$xmm\n" if ($i<=1);
|
|---|
| 277 | $code.=" movl $TX[0]#d,($dat,$YY,4)\n";
|
|---|
| 278 | $code.=" add $TY#b,$TX[0]#b\n";
|
|---|
| 279 | $code.=" movl `4*($j+1)`($XX[1]),$TX[1]#d\n" if ($i<15);
|
|---|
| 280 | $code.=" movz $TX[0]#b,$TX[0]#d\n";
|
|---|
| 281 | $code.=" movl $TY#d,4*$j($XX[1])\n";
|
|---|
| 282 | $code.=" pxor %xmm1,%xmm2\n" if ($i==0);
|
|---|
| 283 | $code.=" lea ($dat,$XX[0],4),$XX[1]\n" if ($i==15);
|
|---|
| 284 | $code.=" add $TX[1]#b,$YY#b\n" if ($i<15);
|
|---|
| 285 | $code.=" pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n";
|
|---|
| 286 | $code.=" movdqu %xmm2,($out,$inp)\n" if ($i==0);
|
|---|
| 287 | $code.=" lea 16($inp),$inp\n" if ($i==0);
|
|---|
| 288 | $code.=" movl ($XX[1]),$TX[1]#d\n" if ($i==15);
|
|---|
| 289 | }
|
|---|
| 290 | RC4_loop(-1);
|
|---|
| 291 | $code.=<<___;
|
|---|
| 292 | jmp .Loop16_enter
|
|---|
| 293 | .align 16
|
|---|
| 294 | .Loop16:
|
|---|
| 295 | ___
|
|---|
| 296 |
|
|---|
| 297 | for ($i=0;$i<16;$i++) {
|
|---|
| 298 | $code.=".Loop16_enter:\n" if ($i==1);
|
|---|
| 299 | RC4_loop($i);
|
|---|
| 300 | push(@TX,shift(@TX)); # "rotate" registers
|
|---|
| 301 | }
|
|---|
| 302 | $code.=<<___;
|
|---|
| 303 | mov $YY,$TX[1]
|
|---|
| 304 | xor $YY,$YY # keyword to partial register
|
|---|
| 305 | sub \$16,$len
|
|---|
| 306 | mov $TX[1]#b,$YY#b
|
|---|
| 307 | test \$-16,$len
|
|---|
| 308 | jnz .Loop16
|
|---|
| 309 |
|
|---|
| 310 | psllq \$8,%xmm1
|
|---|
| 311 | pxor %xmm0,%xmm2
|
|---|
| 312 | pxor %xmm1,%xmm2
|
|---|
| 313 | movdqu %xmm2,($out,$inp)
|
|---|
| 314 | lea 16($inp),$inp
|
|---|
| 315 |
|
|---|
| 316 | cmp \$0,$len
|
|---|
| 317 | jne .Lloop1
|
|---|
| 318 | jmp .Lexit
|
|---|
| 319 |
|
|---|
| 320 | .align 16
|
|---|
| 321 | .Lloop1:
|
|---|
| 322 | add $TX[0]#b,$YY#b
|
|---|
| 323 | movl ($dat,$YY,4),$TY#d
|
|---|
| 324 | movl $TX[0]#d,($dat,$YY,4)
|
|---|
| 325 | movl $TY#d,($dat,$XX[0],4)
|
|---|
| 326 | add $TY#b,$TX[0]#b
|
|---|
| 327 | inc $XX[0]#b
|
|---|
| 328 | movl ($dat,$TX[0],4),$TY#d
|
|---|
| 329 | movl ($dat,$XX[0],4),$TX[0]#d
|
|---|
| 330 | xorb ($inp),$TY#b
|
|---|
| 331 | movb $TY#b,($out,$inp)
|
|---|
| 332 | lea 1($inp),$inp
|
|---|
| 333 | dec $len
|
|---|
| 334 | jnz .Lloop1
|
|---|
| 335 | jmp .Lexit
|
|---|
| 336 |
|
|---|
| 337 | .align 16
|
|---|
| 338 | .LRC4_CHAR:
|
|---|
| 339 | add \$1,$XX[0]#b
|
|---|
| 340 | movzb ($dat,$XX[0]),$TX[0]#d
|
|---|
| 341 | test \$-8,$len
|
|---|
| 342 | jz .Lcloop1
|
|---|
| 343 | jmp .Lcloop8
|
|---|
| 344 | .align 16
|
|---|
| 345 | .Lcloop8:
|
|---|
| 346 | mov ($inp),%r8d
|
|---|
| 347 | mov 4($inp),%r9d
|
|---|
| 348 | ___
|
|---|
| 349 | # unroll 2x4-wise, because 64-bit rotates kill Intel P4...
|
|---|
| 350 | for ($i=0;$i<4;$i++) {
|
|---|
| 351 | $code.=<<___;
|
|---|
| 352 | add $TX[0]#b,$YY#b
|
|---|
| 353 | lea 1($XX[0]),$XX[1]
|
|---|
| 354 | movzb ($dat,$YY),$TY#d
|
|---|
| 355 | movzb $XX[1]#b,$XX[1]#d
|
|---|
| 356 | movzb ($dat,$XX[1]),$TX[1]#d
|
|---|
| 357 | movb $TX[0]#b,($dat,$YY)
|
|---|
| 358 | cmp $XX[1],$YY
|
|---|
| 359 | movb $TY#b,($dat,$XX[0])
|
|---|
| 360 | jne .Lcmov$i # Intel cmov is sloooow...
|
|---|
| 361 | mov $TX[0],$TX[1]
|
|---|
| 362 | .Lcmov$i:
|
|---|
| 363 | add $TX[0]#b,$TY#b
|
|---|
| 364 | xor ($dat,$TY),%r8b
|
|---|
| 365 | ror \$8,%r8d
|
|---|
| 366 | ___
|
|---|
| 367 | push(@TX,shift(@TX)); push(@XX,shift(@XX)); # "rotate" registers
|
|---|
| 368 | }
|
|---|
| 369 | for ($i=4;$i<8;$i++) {
|
|---|
| 370 | $code.=<<___;
|
|---|
| 371 | add $TX[0]#b,$YY#b
|
|---|
| 372 | lea 1($XX[0]),$XX[1]
|
|---|
| 373 | movzb ($dat,$YY),$TY#d
|
|---|
| 374 | movzb $XX[1]#b,$XX[1]#d
|
|---|
| 375 | movzb ($dat,$XX[1]),$TX[1]#d
|
|---|
| 376 | movb $TX[0]#b,($dat,$YY)
|
|---|
| 377 | cmp $XX[1],$YY
|
|---|
| 378 | movb $TY#b,($dat,$XX[0])
|
|---|
| 379 | jne .Lcmov$i # Intel cmov is sloooow...
|
|---|
| 380 | mov $TX[0],$TX[1]
|
|---|
| 381 | .Lcmov$i:
|
|---|
| 382 | add $TX[0]#b,$TY#b
|
|---|
| 383 | xor ($dat,$TY),%r9b
|
|---|
| 384 | ror \$8,%r9d
|
|---|
| 385 | ___
|
|---|
| 386 | push(@TX,shift(@TX)); push(@XX,shift(@XX)); # "rotate" registers
|
|---|
| 387 | }
|
|---|
| 388 | $code.=<<___;
|
|---|
| 389 | lea -8($len),$len
|
|---|
| 390 | mov %r8d,($out)
|
|---|
| 391 | lea 8($inp),$inp
|
|---|
| 392 | mov %r9d,4($out)
|
|---|
| 393 | lea 8($out),$out
|
|---|
| 394 |
|
|---|
| 395 | test \$-8,$len
|
|---|
| 396 | jnz .Lcloop8
|
|---|
| 397 | cmp \$0,$len
|
|---|
| 398 | jne .Lcloop1
|
|---|
| 399 | jmp .Lexit
|
|---|
| 400 | ___
|
|---|
| 401 | $code.=<<___;
|
|---|
| 402 | .align 16
|
|---|
| 403 | .Lcloop1:
|
|---|
| 404 | add $TX[0]#b,$YY#b
|
|---|
| 405 | movzb $YY#b,$YY#d
|
|---|
| 406 | movzb ($dat,$YY),$TY#d
|
|---|
| 407 | movb $TX[0]#b,($dat,$YY)
|
|---|
| 408 | movb $TY#b,($dat,$XX[0])
|
|---|
| 409 | add $TX[0]#b,$TY#b
|
|---|
| 410 | add \$1,$XX[0]#b
|
|---|
| 411 | movzb $TY#b,$TY#d
|
|---|
| 412 | movzb $XX[0]#b,$XX[0]#d
|
|---|
| 413 | movzb ($dat,$TY),$TY#d
|
|---|
| 414 | movzb ($dat,$XX[0]),$TX[0]#d
|
|---|
| 415 | xorb ($inp),$TY#b
|
|---|
| 416 | lea 1($inp),$inp
|
|---|
| 417 | movb $TY#b,($out)
|
|---|
| 418 | lea 1($out),$out
|
|---|
| 419 | sub \$1,$len
|
|---|
| 420 | jnz .Lcloop1
|
|---|
| 421 | jmp .Lexit
|
|---|
| 422 |
|
|---|
| 423 | .align 16
|
|---|
| 424 | .Lexit:
|
|---|
| 425 | sub \$1,$XX[0]#b
|
|---|
| 426 | movl $XX[0]#d,-8($dat)
|
|---|
| 427 | movl $YY#d,-4($dat)
|
|---|
| 428 |
|
|---|
| 429 | mov (%rsp),%r13
|
|---|
| 430 | mov 8(%rsp),%r12
|
|---|
| 431 | mov 16(%rsp),%rbx
|
|---|
| 432 | add \$24,%rsp
|
|---|
| 433 | .Lepilogue:
|
|---|
| 434 | ret
|
|---|
| 435 | .size RC4,.-RC4
|
|---|
| 436 | ___
|
|---|
| 437 | }
|
|---|
| 438 |
|
|---|
| 439 | $idx="%r8";
|
|---|
| 440 | $ido="%r9";
|
|---|
| 441 |
|
|---|
| 442 | $code.=<<___;
|
|---|
| 443 | .globl RC4_set_key
|
|---|
| 444 | .type RC4_set_key,\@function,3
|
|---|
| 445 | .align 16
|
|---|
| 446 | RC4_set_key:
|
|---|
| 447 | lea 8($dat),$dat
|
|---|
| 448 | lea ($inp,$len),$inp
|
|---|
| 449 | neg $len
|
|---|
| 450 | mov $len,%rcx
|
|---|
| 451 | xor %eax,%eax
|
|---|
| 452 | xor $ido,$ido
|
|---|
| 453 | xor %r10,%r10
|
|---|
| 454 | xor %r11,%r11
|
|---|
| 455 |
|
|---|
| 456 | mov OPENSSL_ia32cap_P(%rip),$idx#d
|
|---|
| 457 | bt \$20,$idx#d # RC4_CHAR?
|
|---|
| 458 | jc .Lc1stloop
|
|---|
| 459 | jmp .Lw1stloop
|
|---|
| 460 |
|
|---|
| 461 | .align 16
|
|---|
| 462 | .Lw1stloop:
|
|---|
| 463 | mov %eax,($dat,%rax,4)
|
|---|
| 464 | add \$1,%al
|
|---|
| 465 | jnc .Lw1stloop
|
|---|
| 466 |
|
|---|
| 467 | xor $ido,$ido
|
|---|
| 468 | xor $idx,$idx
|
|---|
| 469 | .align 16
|
|---|
| 470 | .Lw2ndloop:
|
|---|
| 471 | mov ($dat,$ido,4),%r10d
|
|---|
| 472 | add ($inp,$len,1),$idx#b
|
|---|
| 473 | add %r10b,$idx#b
|
|---|
| 474 | add \$1,$len
|
|---|
| 475 | mov ($dat,$idx,4),%r11d
|
|---|
| 476 | cmovz %rcx,$len
|
|---|
| 477 | mov %r10d,($dat,$idx,4)
|
|---|
| 478 | mov %r11d,($dat,$ido,4)
|
|---|
| 479 | add \$1,$ido#b
|
|---|
| 480 | jnc .Lw2ndloop
|
|---|
| 481 | jmp .Lexit_key
|
|---|
| 482 |
|
|---|
| 483 | .align 16
|
|---|
| 484 | .Lc1stloop:
|
|---|
| 485 | mov %al,($dat,%rax)
|
|---|
| 486 | add \$1,%al
|
|---|
| 487 | jnc .Lc1stloop
|
|---|
| 488 |
|
|---|
| 489 | xor $ido,$ido
|
|---|
| 490 | xor $idx,$idx
|
|---|
| 491 | .align 16
|
|---|
| 492 | .Lc2ndloop:
|
|---|
| 493 | mov ($dat,$ido),%r10b
|
|---|
| 494 | add ($inp,$len),$idx#b
|
|---|
| 495 | add %r10b,$idx#b
|
|---|
| 496 | add \$1,$len
|
|---|
| 497 | mov ($dat,$idx),%r11b
|
|---|
| 498 | jnz .Lcnowrap
|
|---|
| 499 | mov %rcx,$len
|
|---|
| 500 | .Lcnowrap:
|
|---|
| 501 | mov %r10b,($dat,$idx)
|
|---|
| 502 | mov %r11b,($dat,$ido)
|
|---|
| 503 | add \$1,$ido#b
|
|---|
| 504 | jnc .Lc2ndloop
|
|---|
| 505 | movl \$-1,256($dat)
|
|---|
| 506 |
|
|---|
| 507 | .align 16
|
|---|
| 508 | .Lexit_key:
|
|---|
| 509 | xor %eax,%eax
|
|---|
| 510 | mov %eax,-8($dat)
|
|---|
| 511 | mov %eax,-4($dat)
|
|---|
| 512 | ret
|
|---|
| 513 | .size RC4_set_key,.-RC4_set_key
|
|---|
| 514 |
|
|---|
| 515 | .globl RC4_options
|
|---|
| 516 | .type RC4_options,\@abi-omnipotent
|
|---|
| 517 | .align 16
|
|---|
| 518 | RC4_options:
|
|---|
| 519 | lea .Lopts(%rip),%rax
|
|---|
| 520 | mov OPENSSL_ia32cap_P(%rip),%edx
|
|---|
| 521 | bt \$20,%edx
|
|---|
| 522 | jc .L8xchar
|
|---|
| 523 | bt \$30,%edx
|
|---|
| 524 | jnc .Ldone
|
|---|
| 525 | add \$25,%rax
|
|---|
| 526 | ret
|
|---|
| 527 | .L8xchar:
|
|---|
| 528 | add \$12,%rax
|
|---|
| 529 | .Ldone:
|
|---|
| 530 | ret
|
|---|
| 531 | .align 64
|
|---|
| 532 | .Lopts:
|
|---|
| 533 | .asciz "rc4(8x,int)"
|
|---|
| 534 | .asciz "rc4(8x,char)"
|
|---|
| 535 | .asciz "rc4(16x,int)"
|
|---|
| 536 | .asciz "RC4 for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
|
|---|
| 537 | .align 64
|
|---|
| 538 | .size RC4_options,.-RC4_options
|
|---|
| 539 | ___
|
|---|
| 540 |
|
|---|
| 541 | # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
|
|---|
| 542 | # CONTEXT *context,DISPATCHER_CONTEXT *disp)
|
|---|
| 543 | if ($win64) {
|
|---|
| 544 | $rec="%rcx";
|
|---|
| 545 | $frame="%rdx";
|
|---|
| 546 | $context="%r8";
|
|---|
| 547 | $disp="%r9";
|
|---|
| 548 |
|
|---|
| 549 | $code.=<<___;
|
|---|
| 550 | .extern __imp_RtlVirtualUnwind
|
|---|
| 551 | .type stream_se_handler,\@abi-omnipotent
|
|---|
| 552 | .align 16
|
|---|
| 553 | stream_se_handler:
|
|---|
| 554 | push %rsi
|
|---|
| 555 | push %rdi
|
|---|
| 556 | push %rbx
|
|---|
| 557 | push %rbp
|
|---|
| 558 | push %r12
|
|---|
| 559 | push %r13
|
|---|
| 560 | push %r14
|
|---|
| 561 | push %r15
|
|---|
| 562 | pushfq
|
|---|
| 563 | sub \$64,%rsp
|
|---|
| 564 |
|
|---|
| 565 | mov 120($context),%rax # pull context->Rax
|
|---|
| 566 | mov 248($context),%rbx # pull context->Rip
|
|---|
| 567 |
|
|---|
| 568 | lea .Lprologue(%rip),%r10
|
|---|
| 569 | cmp %r10,%rbx # context->Rip<prologue label
|
|---|
| 570 | jb .Lin_prologue
|
|---|
| 571 |
|
|---|
| 572 | mov 152($context),%rax # pull context->Rsp
|
|---|
| 573 |
|
|---|
| 574 | lea .Lepilogue(%rip),%r10
|
|---|
| 575 | cmp %r10,%rbx # context->Rip>=epilogue label
|
|---|
| 576 | jae .Lin_prologue
|
|---|
| 577 |
|
|---|
| 578 | lea 24(%rax),%rax
|
|---|
| 579 |
|
|---|
| 580 | mov -8(%rax),%rbx
|
|---|
| 581 | mov -16(%rax),%r12
|
|---|
| 582 | mov -24(%rax),%r13
|
|---|
| 583 | mov %rbx,144($context) # restore context->Rbx
|
|---|
| 584 | mov %r12,216($context) # restore context->R12
|
|---|
| 585 | mov %r13,224($context) # restore context->R13
|
|---|
| 586 |
|
|---|
| 587 | .Lin_prologue:
|
|---|
| 588 | mov 8(%rax),%rdi
|
|---|
| 589 | mov 16(%rax),%rsi
|
|---|
| 590 | mov %rax,152($context) # restore context->Rsp
|
|---|
| 591 | mov %rsi,168($context) # restore context->Rsi
|
|---|
| 592 | mov %rdi,176($context) # restore context->Rdi
|
|---|
| 593 |
|
|---|
| 594 | jmp .Lcommon_seh_exit
|
|---|
| 595 | .size stream_se_handler,.-stream_se_handler
|
|---|
| 596 |
|
|---|
| 597 | .type key_se_handler,\@abi-omnipotent
|
|---|
| 598 | .align 16
|
|---|
| 599 | key_se_handler:
|
|---|
| 600 | push %rsi
|
|---|
| 601 | push %rdi
|
|---|
| 602 | push %rbx
|
|---|
| 603 | push %rbp
|
|---|
| 604 | push %r12
|
|---|
| 605 | push %r13
|
|---|
| 606 | push %r14
|
|---|
| 607 | push %r15
|
|---|
| 608 | pushfq
|
|---|
| 609 | sub \$64,%rsp
|
|---|
| 610 |
|
|---|
| 611 | mov 152($context),%rax # pull context->Rsp
|
|---|
| 612 | mov 8(%rax),%rdi
|
|---|
| 613 | mov 16(%rax),%rsi
|
|---|
| 614 | mov %rsi,168($context) # restore context->Rsi
|
|---|
| 615 | mov %rdi,176($context) # restore context->Rdi
|
|---|
| 616 |
|
|---|
| 617 | .Lcommon_seh_exit:
|
|---|
| 618 |
|
|---|
| 619 | mov 40($disp),%rdi # disp->ContextRecord
|
|---|
| 620 | mov $context,%rsi # context
|
|---|
| 621 | mov \$154,%ecx # sizeof(CONTEXT)
|
|---|
| 622 | .long 0xa548f3fc # cld; rep movsq
|
|---|
| 623 |
|
|---|
| 624 | mov $disp,%rsi
|
|---|
| 625 | xor %rcx,%rcx # arg1, UNW_FLAG_NHANDLER
|
|---|
| 626 | mov 8(%rsi),%rdx # arg2, disp->ImageBase
|
|---|
| 627 | mov 0(%rsi),%r8 # arg3, disp->ControlPc
|
|---|
| 628 | mov 16(%rsi),%r9 # arg4, disp->FunctionEntry
|
|---|
| 629 | mov 40(%rsi),%r10 # disp->ContextRecord
|
|---|
| 630 | lea 56(%rsi),%r11 # &disp->HandlerData
|
|---|
| 631 | lea 24(%rsi),%r12 # &disp->EstablisherFrame
|
|---|
| 632 | mov %r10,32(%rsp) # arg5
|
|---|
| 633 | mov %r11,40(%rsp) # arg6
|
|---|
| 634 | mov %r12,48(%rsp) # arg7
|
|---|
| 635 | mov %rcx,56(%rsp) # arg8, (NULL)
|
|---|
| 636 | call *__imp_RtlVirtualUnwind(%rip)
|
|---|
| 637 |
|
|---|
| 638 | mov \$1,%eax # ExceptionContinueSearch
|
|---|
| 639 | add \$64,%rsp
|
|---|
| 640 | popfq
|
|---|
| 641 | pop %r15
|
|---|
| 642 | pop %r14
|
|---|
| 643 | pop %r13
|
|---|
| 644 | pop %r12
|
|---|
| 645 | pop %rbp
|
|---|
| 646 | pop %rbx
|
|---|
| 647 | pop %rdi
|
|---|
| 648 | pop %rsi
|
|---|
| 649 | ret
|
|---|
| 650 | .size key_se_handler,.-key_se_handler
|
|---|
| 651 |
|
|---|
| 652 | .section .pdata
|
|---|
| 653 | .align 4
|
|---|
| 654 | .rva .LSEH_begin_RC4
|
|---|
| 655 | .rva .LSEH_end_RC4
|
|---|
| 656 | .rva .LSEH_info_RC4
|
|---|
| 657 |
|
|---|
| 658 | .rva .LSEH_begin_RC4_set_key
|
|---|
| 659 | .rva .LSEH_end_RC4_set_key
|
|---|
| 660 | .rva .LSEH_info_RC4_set_key
|
|---|
| 661 |
|
|---|
| 662 | .section .xdata
|
|---|
| 663 | .align 8
|
|---|
| 664 | .LSEH_info_RC4:
|
|---|
| 665 | .byte 9,0,0,0
|
|---|
| 666 | .rva stream_se_handler
|
|---|
| 667 | .LSEH_info_RC4_set_key:
|
|---|
| 668 | .byte 9,0,0,0
|
|---|
| 669 | .rva key_se_handler
|
|---|
| 670 | ___
|
|---|
| 671 | }
|
|---|
| 672 |
|
|---|
| 673 | sub reg_part {
|
|---|
| 674 | my ($reg,$conv)=@_;
|
|---|
| 675 | if ($reg =~ /%r[0-9]+/) { $reg .= $conv; }
|
|---|
| 676 | elsif ($conv eq "b") { $reg =~ s/%[er]([^x]+)x?/%$1l/; }
|
|---|
| 677 | elsif ($conv eq "w") { $reg =~ s/%[er](.+)/%$1/; }
|
|---|
| 678 | elsif ($conv eq "d") { $reg =~ s/%[er](.+)/%e$1/; }
|
|---|
| 679 | return $reg;
|
|---|
| 680 | }
|
|---|
| 681 |
|
|---|
| 682 | $code =~ s/(%[a-z0-9]+)#([bwd])/reg_part($1,$2)/gem;
|
|---|
| 683 | $code =~ s/\`([^\`]*)\`/eval $1/gem;
|
|---|
| 684 |
|
|---|
| 685 | print $code;
|
|---|
| 686 |
|
|---|
| 687 | close STDOUT;
|
|---|
