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source: vbox/trunk/src/libs/openssl-1.1.1f/crypto/sha/asm/sha512-armv8.pl@ 83531

Last change on this file since 83531 was 83531, checked in by vboxsync, 5 years ago

setting svn:sync-process=export for openssl-1.1.1f, all files except tests

File size: 23.6 KB
Line 
1#! /usr/bin/env perl
2# Copyright 2014-2020 The OpenSSL Project Authors. All Rights Reserved.
3#
4# Licensed under the OpenSSL license (the "License"). You may not use
5# this file except in compliance with the License. You can obtain a copy
6# in the file LICENSE in the source distribution or at
7# https://www.openssl.org/source/license.html
8
9# ====================================================================
10# Written by Andy Polyakov <[email protected]> for the OpenSSL
11# project. The module is, however, dual licensed under OpenSSL and
12# CRYPTOGAMS licenses depending on where you obtain it. For further
13# details see http://www.openssl.org/~appro/cryptogams/.
14#
15# Permission to use under GPLv2 terms is granted.
16# ====================================================================
17#
18# SHA256/512 for ARMv8.
19#
20# Performance in cycles per processed byte and improvement coefficient
21# over code generated with "default" compiler:
22#
23# SHA256-hw SHA256(*) SHA512
24# Apple A7 1.97 10.5 (+33%) 6.73 (-1%(**))
25# Cortex-A53 2.38 15.5 (+115%) 10.0 (+150%(***))
26# Cortex-A57 2.31 11.6 (+86%) 7.51 (+260%(***))
27# Denver 2.01 10.5 (+26%) 6.70 (+8%)
28# X-Gene 20.0 (+100%) 12.8 (+300%(***))
29# Mongoose 2.36 13.0 (+50%) 8.36 (+33%)
30# Kryo 1.92 17.4 (+30%) 11.2 (+8%)
31#
32# (*) Software SHA256 results are of lesser relevance, presented
33# mostly for informational purposes.
34# (**) The result is a trade-off: it's possible to improve it by
35# 10% (or by 1 cycle per round), but at the cost of 20% loss
36# on Cortex-A53 (or by 4 cycles per round).
37# (***) Super-impressive coefficients over gcc-generated code are
38# indication of some compiler "pathology", most notably code
39# generated with -mgeneral-regs-only is significantly faster
40# and the gap is only 40-90%.
41#
42# October 2016.
43#
44# Originally it was reckoned that it makes no sense to implement NEON
45# version of SHA256 for 64-bit processors. This is because performance
46# improvement on most wide-spread Cortex-A5x processors was observed
47# to be marginal, same on Cortex-A53 and ~10% on A57. But then it was
48# observed that 32-bit NEON SHA256 performs significantly better than
49# 64-bit scalar version on *some* of the more recent processors. As
50# result 64-bit NEON version of SHA256 was added to provide best
51# all-round performance. For example it executes ~30% faster on X-Gene
52# and Mongoose. [For reference, NEON version of SHA512 is bound to
53# deliver much less improvement, likely *negative* on Cortex-A5x.
54# Which is why NEON support is limited to SHA256.]
55
56$output=pop;
57$flavour=pop;
58
59if ($flavour && $flavour ne "void") {
60 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
61 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
62 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
63 die "can't locate arm-xlate.pl";
64
65 open OUT,"| \"$^X\" $xlate $flavour $output";
66 *STDOUT=*OUT;
67} else {
68 open STDOUT,">$output";
69}
70
71if ($output =~ /512/) {
72 $BITS=512;
73 $SZ=8;
74 @Sigma0=(28,34,39);
75 @Sigma1=(14,18,41);
76 @sigma0=(1, 8, 7);
77 @sigma1=(19,61, 6);
78 $rounds=80;
79 $reg_t="x";
80} else {
81 $BITS=256;
82 $SZ=4;
83 @Sigma0=( 2,13,22);
84 @Sigma1=( 6,11,25);
85 @sigma0=( 7,18, 3);
86 @sigma1=(17,19,10);
87 $rounds=64;
88 $reg_t="w";
89}
90
91$func="sha${BITS}_block_data_order";
92
93($ctx,$inp,$num,$Ktbl)=map("x$_",(0..2,30));
94
95@X=map("$reg_t$_",(3..15,0..2));
96@V=($A,$B,$C,$D,$E,$F,$G,$H)=map("$reg_t$_",(20..27));
97($t0,$t1,$t2,$t3)=map("$reg_t$_",(16,17,19,28));
98
99sub BODY_00_xx {
100my ($i,$a,$b,$c,$d,$e,$f,$g,$h)=@_;
101my $j=($i+1)&15;
102my ($T0,$T1,$T2)=(@X[($i-8)&15],@X[($i-9)&15],@X[($i-10)&15]);
103 $T0=@X[$i+3] if ($i<11);
104
105$code.=<<___ if ($i<16);
106#ifndef __AARCH64EB__
107 rev @X[$i],@X[$i] // $i
108#endif
109___
110$code.=<<___ if ($i<13 && ($i&1));
111 ldp @X[$i+1],@X[$i+2],[$inp],#2*$SZ
112___
113$code.=<<___ if ($i==13);
114 ldp @X[14],@X[15],[$inp]
115___
116$code.=<<___ if ($i>=14);
117 ldr @X[($i-11)&15],[sp,#`$SZ*(($i-11)%4)`]
118___
119$code.=<<___ if ($i>0 && $i<16);
120 add $a,$a,$t1 // h+=Sigma0(a)
121___
122$code.=<<___ if ($i>=11);
123 str @X[($i-8)&15],[sp,#`$SZ*(($i-8)%4)`]
124___
125# While ARMv8 specifies merged rotate-n-logical operation such as
126# 'eor x,y,z,ror#n', it was found to negatively affect performance
127# on Apple A7. The reason seems to be that it requires even 'y' to
128# be available earlier. This means that such merged instruction is
129# not necessarily best choice on critical path... On the other hand
130# Cortex-A5x handles merged instructions much better than disjoint
131# rotate and logical... See (**) footnote above.
132$code.=<<___ if ($i<15);
133 ror $t0,$e,#$Sigma1[0]
134 add $h,$h,$t2 // h+=K[i]
135 eor $T0,$e,$e,ror#`$Sigma1[2]-$Sigma1[1]`
136 and $t1,$f,$e
137 bic $t2,$g,$e
138 add $h,$h,@X[$i&15] // h+=X[i]
139 orr $t1,$t1,$t2 // Ch(e,f,g)
140 eor $t2,$a,$b // a^b, b^c in next round
141 eor $t0,$t0,$T0,ror#$Sigma1[1] // Sigma1(e)
142 ror $T0,$a,#$Sigma0[0]
143 add $h,$h,$t1 // h+=Ch(e,f,g)
144 eor $t1,$a,$a,ror#`$Sigma0[2]-$Sigma0[1]`
145 add $h,$h,$t0 // h+=Sigma1(e)
146 and $t3,$t3,$t2 // (b^c)&=(a^b)
147 add $d,$d,$h // d+=h
148 eor $t3,$t3,$b // Maj(a,b,c)
149 eor $t1,$T0,$t1,ror#$Sigma0[1] // Sigma0(a)
150 add $h,$h,$t3 // h+=Maj(a,b,c)
151 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round
152 //add $h,$h,$t1 // h+=Sigma0(a)
153___
154$code.=<<___ if ($i>=15);
155 ror $t0,$e,#$Sigma1[0]
156 add $h,$h,$t2 // h+=K[i]
157 ror $T1,@X[($j+1)&15],#$sigma0[0]
158 and $t1,$f,$e
159 ror $T2,@X[($j+14)&15],#$sigma1[0]
160 bic $t2,$g,$e
161 ror $T0,$a,#$Sigma0[0]
162 add $h,$h,@X[$i&15] // h+=X[i]
163 eor $t0,$t0,$e,ror#$Sigma1[1]
164 eor $T1,$T1,@X[($j+1)&15],ror#$sigma0[1]
165 orr $t1,$t1,$t2 // Ch(e,f,g)
166 eor $t2,$a,$b // a^b, b^c in next round
167 eor $t0,$t0,$e,ror#$Sigma1[2] // Sigma1(e)
168 eor $T0,$T0,$a,ror#$Sigma0[1]
169 add $h,$h,$t1 // h+=Ch(e,f,g)
170 and $t3,$t3,$t2 // (b^c)&=(a^b)
171 eor $T2,$T2,@X[($j+14)&15],ror#$sigma1[1]
172 eor $T1,$T1,@X[($j+1)&15],lsr#$sigma0[2] // sigma0(X[i+1])
173 add $h,$h,$t0 // h+=Sigma1(e)
174 eor $t3,$t3,$b // Maj(a,b,c)
175 eor $t1,$T0,$a,ror#$Sigma0[2] // Sigma0(a)
176 eor $T2,$T2,@X[($j+14)&15],lsr#$sigma1[2] // sigma1(X[i+14])
177 add @X[$j],@X[$j],@X[($j+9)&15]
178 add $d,$d,$h // d+=h
179 add $h,$h,$t3 // h+=Maj(a,b,c)
180 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round
181 add @X[$j],@X[$j],$T1
182 add $h,$h,$t1 // h+=Sigma0(a)
183 add @X[$j],@X[$j],$T2
184___
185 ($t2,$t3)=($t3,$t2);
186}
187
188$code.=<<___;
189#ifndef __KERNEL__
190# include "arm_arch.h"
191#endif
192
193.text
194
195.extern OPENSSL_armcap_P
196.globl $func
197.type $func,%function
198.align 6
199$func:
200#ifndef __KERNEL__
201# ifdef __ILP32__
202 ldrsw x16,.LOPENSSL_armcap_P
203# else
204 ldr x16,.LOPENSSL_armcap_P
205# endif
206 adr x17,.LOPENSSL_armcap_P
207 add x16,x16,x17
208 ldr w16,[x16]
209___
210$code.=<<___ if ($SZ==4);
211 tst w16,#ARMV8_SHA256
212 b.ne .Lv8_entry
213 tst w16,#ARMV7_NEON
214 b.ne .Lneon_entry
215___
216$code.=<<___ if ($SZ==8);
217 tst w16,#ARMV8_SHA512
218 b.ne .Lv8_entry
219___
220$code.=<<___;
221#endif
222 .inst 0xd503233f // paciasp
223 stp x29,x30,[sp,#-128]!
224 add x29,sp,#0
225
226 stp x19,x20,[sp,#16]
227 stp x21,x22,[sp,#32]
228 stp x23,x24,[sp,#48]
229 stp x25,x26,[sp,#64]
230 stp x27,x28,[sp,#80]
231 sub sp,sp,#4*$SZ
232
233 ldp $A,$B,[$ctx] // load context
234 ldp $C,$D,[$ctx,#2*$SZ]
235 ldp $E,$F,[$ctx,#4*$SZ]
236 add $num,$inp,$num,lsl#`log(16*$SZ)/log(2)` // end of input
237 ldp $G,$H,[$ctx,#6*$SZ]
238 adr $Ktbl,.LK$BITS
239 stp $ctx,$num,[x29,#96]
240
241.Loop:
242 ldp @X[0],@X[1],[$inp],#2*$SZ
243 ldr $t2,[$Ktbl],#$SZ // *K++
244 eor $t3,$B,$C // magic seed
245 str $inp,[x29,#112]
246___
247for ($i=0;$i<16;$i++) { &BODY_00_xx($i,@V); unshift(@V,pop(@V)); }
248$code.=".Loop_16_xx:\n";
249for (;$i<32;$i++) { &BODY_00_xx($i,@V); unshift(@V,pop(@V)); }
250$code.=<<___;
251 cbnz $t2,.Loop_16_xx
252
253 ldp $ctx,$num,[x29,#96]
254 ldr $inp,[x29,#112]
255 sub $Ktbl,$Ktbl,#`$SZ*($rounds+1)` // rewind
256
257 ldp @X[0],@X[1],[$ctx]
258 ldp @X[2],@X[3],[$ctx,#2*$SZ]
259 add $inp,$inp,#14*$SZ // advance input pointer
260 ldp @X[4],@X[5],[$ctx,#4*$SZ]
261 add $A,$A,@X[0]
262 ldp @X[6],@X[7],[$ctx,#6*$SZ]
263 add $B,$B,@X[1]
264 add $C,$C,@X[2]
265 add $D,$D,@X[3]
266 stp $A,$B,[$ctx]
267 add $E,$E,@X[4]
268 add $F,$F,@X[5]
269 stp $C,$D,[$ctx,#2*$SZ]
270 add $G,$G,@X[6]
271 add $H,$H,@X[7]
272 cmp $inp,$num
273 stp $E,$F,[$ctx,#4*$SZ]
274 stp $G,$H,[$ctx,#6*$SZ]
275 b.ne .Loop
276
277 ldp x19,x20,[x29,#16]
278 add sp,sp,#4*$SZ
279 ldp x21,x22,[x29,#32]
280 ldp x23,x24,[x29,#48]
281 ldp x25,x26,[x29,#64]
282 ldp x27,x28,[x29,#80]
283 ldp x29,x30,[sp],#128
284 .inst 0xd50323bf // autiasp
285 ret
286.size $func,.-$func
287
288.align 6
289.type .LK$BITS,%object
290.LK$BITS:
291___
292$code.=<<___ if ($SZ==8);
293 .quad 0x428a2f98d728ae22,0x7137449123ef65cd
294 .quad 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
295 .quad 0x3956c25bf348b538,0x59f111f1b605d019
296 .quad 0x923f82a4af194f9b,0xab1c5ed5da6d8118
297 .quad 0xd807aa98a3030242,0x12835b0145706fbe
298 .quad 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
299 .quad 0x72be5d74f27b896f,0x80deb1fe3b1696b1
300 .quad 0x9bdc06a725c71235,0xc19bf174cf692694
301 .quad 0xe49b69c19ef14ad2,0xefbe4786384f25e3
302 .quad 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
303 .quad 0x2de92c6f592b0275,0x4a7484aa6ea6e483
304 .quad 0x5cb0a9dcbd41fbd4,0x76f988da831153b5
305 .quad 0x983e5152ee66dfab,0xa831c66d2db43210
306 .quad 0xb00327c898fb213f,0xbf597fc7beef0ee4
307 .quad 0xc6e00bf33da88fc2,0xd5a79147930aa725
308 .quad 0x06ca6351e003826f,0x142929670a0e6e70
309 .quad 0x27b70a8546d22ffc,0x2e1b21385c26c926
310 .quad 0x4d2c6dfc5ac42aed,0x53380d139d95b3df
311 .quad 0x650a73548baf63de,0x766a0abb3c77b2a8
312 .quad 0x81c2c92e47edaee6,0x92722c851482353b
313 .quad 0xa2bfe8a14cf10364,0xa81a664bbc423001
314 .quad 0xc24b8b70d0f89791,0xc76c51a30654be30
315 .quad 0xd192e819d6ef5218,0xd69906245565a910
316 .quad 0xf40e35855771202a,0x106aa07032bbd1b8
317 .quad 0x19a4c116b8d2d0c8,0x1e376c085141ab53
318 .quad 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
319 .quad 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
320 .quad 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
321 .quad 0x748f82ee5defb2fc,0x78a5636f43172f60
322 .quad 0x84c87814a1f0ab72,0x8cc702081a6439ec
323 .quad 0x90befffa23631e28,0xa4506cebde82bde9
324 .quad 0xbef9a3f7b2c67915,0xc67178f2e372532b
325 .quad 0xca273eceea26619c,0xd186b8c721c0c207
326 .quad 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
327 .quad 0x06f067aa72176fba,0x0a637dc5a2c898a6
328 .quad 0x113f9804bef90dae,0x1b710b35131c471b
329 .quad 0x28db77f523047d84,0x32caab7b40c72493
330 .quad 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
331 .quad 0x4cc5d4becb3e42b6,0x597f299cfc657e2a
332 .quad 0x5fcb6fab3ad6faec,0x6c44198c4a475817
333 .quad 0 // terminator
334___
335$code.=<<___ if ($SZ==4);
336 .long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
337 .long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
338 .long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
339 .long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
340 .long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
341 .long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
342 .long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
343 .long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
344 .long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
345 .long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
346 .long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
347 .long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070
348 .long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
349 .long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
350 .long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
351 .long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
352 .long 0 //terminator
353___
354$code.=<<___;
355.size .LK$BITS,.-.LK$BITS
356#ifndef __KERNEL__
357.align 3
358.LOPENSSL_armcap_P:
359# ifdef __ILP32__
360 .long OPENSSL_armcap_P-.
361# else
362 .quad OPENSSL_armcap_P-.
363# endif
364#endif
365.asciz "SHA$BITS block transform for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
366.align 2
367___
368
369if ($SZ==4) {
370my $Ktbl="x3";
371
372my ($ABCD,$EFGH,$abcd)=map("v$_.16b",(0..2));
373my @MSG=map("v$_.16b",(4..7));
374my ($W0,$W1)=("v16.4s","v17.4s");
375my ($ABCD_SAVE,$EFGH_SAVE)=("v18.16b","v19.16b");
376
377$code.=<<___;
378#ifndef __KERNEL__
379.type sha256_block_armv8,%function
380.align 6
381sha256_block_armv8:
382.Lv8_entry:
383 stp x29,x30,[sp,#-16]!
384 add x29,sp,#0
385
386 ld1.32 {$ABCD,$EFGH},[$ctx]
387 adr $Ktbl,.LK256
388
389.Loop_hw:
390 ld1 {@MSG[0]-@MSG[3]},[$inp],#64
391 sub $num,$num,#1
392 ld1.32 {$W0},[$Ktbl],#16
393 rev32 @MSG[0],@MSG[0]
394 rev32 @MSG[1],@MSG[1]
395 rev32 @MSG[2],@MSG[2]
396 rev32 @MSG[3],@MSG[3]
397 orr $ABCD_SAVE,$ABCD,$ABCD // offload
398 orr $EFGH_SAVE,$EFGH,$EFGH
399___
400for($i=0;$i<12;$i++) {
401$code.=<<___;
402 ld1.32 {$W1},[$Ktbl],#16
403 add.i32 $W0,$W0,@MSG[0]
404 sha256su0 @MSG[0],@MSG[1]
405 orr $abcd,$ABCD,$ABCD
406 sha256h $ABCD,$EFGH,$W0
407 sha256h2 $EFGH,$abcd,$W0
408 sha256su1 @MSG[0],@MSG[2],@MSG[3]
409___
410 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
411}
412$code.=<<___;
413 ld1.32 {$W1},[$Ktbl],#16
414 add.i32 $W0,$W0,@MSG[0]
415 orr $abcd,$ABCD,$ABCD
416 sha256h $ABCD,$EFGH,$W0
417 sha256h2 $EFGH,$abcd,$W0
418
419 ld1.32 {$W0},[$Ktbl],#16
420 add.i32 $W1,$W1,@MSG[1]
421 orr $abcd,$ABCD,$ABCD
422 sha256h $ABCD,$EFGH,$W1
423 sha256h2 $EFGH,$abcd,$W1
424
425 ld1.32 {$W1},[$Ktbl]
426 add.i32 $W0,$W0,@MSG[2]
427 sub $Ktbl,$Ktbl,#$rounds*$SZ-16 // rewind
428 orr $abcd,$ABCD,$ABCD
429 sha256h $ABCD,$EFGH,$W0
430 sha256h2 $EFGH,$abcd,$W0
431
432 add.i32 $W1,$W1,@MSG[3]
433 orr $abcd,$ABCD,$ABCD
434 sha256h $ABCD,$EFGH,$W1
435 sha256h2 $EFGH,$abcd,$W1
436
437 add.i32 $ABCD,$ABCD,$ABCD_SAVE
438 add.i32 $EFGH,$EFGH,$EFGH_SAVE
439
440 cbnz $num,.Loop_hw
441
442 st1.32 {$ABCD,$EFGH},[$ctx]
443
444 ldr x29,[sp],#16
445 ret
446.size sha256_block_armv8,.-sha256_block_armv8
447#endif
448___
449}
450
451if ($SZ==4) { ######################################### NEON stuff #
452# You'll surely note a lot of similarities with sha256-armv4 module,
453# and of course it's not a coincidence. sha256-armv4 was used as
454# initial template, but was adapted for ARMv8 instruction set and
455# extensively re-tuned for all-round performance.
456
457my @V = ($A,$B,$C,$D,$E,$F,$G,$H) = map("w$_",(3..10));
458my ($t0,$t1,$t2,$t3,$t4) = map("w$_",(11..15));
459my $Ktbl="x16";
460my $Xfer="x17";
461my @X = map("q$_",(0..3));
462my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19));
463my $j=0;
464
465sub AUTOLOAD() # thunk [simplified] x86-style perlasm
466{ my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; $opcode =~ s/_/\./;
467 my $arg = pop;
468 $arg = "#$arg" if ($arg*1 eq $arg);
469 $code .= "\t$opcode\t".join(',',@_,$arg)."\n";
470}
471
472sub Dscalar { shift =~ m|[qv]([0-9]+)|?"d$1":""; }
473sub Dlo { shift =~ m|[qv]([0-9]+)|?"v$1.d[0]":""; }
474sub Dhi { shift =~ m|[qv]([0-9]+)|?"v$1.d[1]":""; }
475
476sub Xupdate()
477{ use integer;
478 my $body = shift;
479 my @insns = (&$body,&$body,&$body,&$body);
480 my ($a,$b,$c,$d,$e,$f,$g,$h);
481
482 &ext_8 ($T0,@X[0],@X[1],4); # X[1..4]
483 eval(shift(@insns));
484 eval(shift(@insns));
485 eval(shift(@insns));
486 &ext_8 ($T3,@X[2],@X[3],4); # X[9..12]
487 eval(shift(@insns));
488 eval(shift(@insns));
489 &mov (&Dscalar($T7),&Dhi(@X[3])); # X[14..15]
490 eval(shift(@insns));
491 eval(shift(@insns));
492 &ushr_32 ($T2,$T0,$sigma0[0]);
493 eval(shift(@insns));
494 &ushr_32 ($T1,$T0,$sigma0[2]);
495 eval(shift(@insns));
496 &add_32 (@X[0],@X[0],$T3); # X[0..3] += X[9..12]
497 eval(shift(@insns));
498 &sli_32 ($T2,$T0,32-$sigma0[0]);
499 eval(shift(@insns));
500 eval(shift(@insns));
501 &ushr_32 ($T3,$T0,$sigma0[1]);
502 eval(shift(@insns));
503 eval(shift(@insns));
504 &eor_8 ($T1,$T1,$T2);
505 eval(shift(@insns));
506 eval(shift(@insns));
507 &sli_32 ($T3,$T0,32-$sigma0[1]);
508 eval(shift(@insns));
509 eval(shift(@insns));
510 &ushr_32 ($T4,$T7,$sigma1[0]);
511 eval(shift(@insns));
512 eval(shift(@insns));
513 &eor_8 ($T1,$T1,$T3); # sigma0(X[1..4])
514 eval(shift(@insns));
515 eval(shift(@insns));
516 &sli_32 ($T4,$T7,32-$sigma1[0]);
517 eval(shift(@insns));
518 eval(shift(@insns));
519 &ushr_32 ($T5,$T7,$sigma1[2]);
520 eval(shift(@insns));
521 eval(shift(@insns));
522 &ushr_32 ($T3,$T7,$sigma1[1]);
523 eval(shift(@insns));
524 eval(shift(@insns));
525 &add_32 (@X[0],@X[0],$T1); # X[0..3] += sigma0(X[1..4])
526 eval(shift(@insns));
527 eval(shift(@insns));
528 &sli_u32 ($T3,$T7,32-$sigma1[1]);
529 eval(shift(@insns));
530 eval(shift(@insns));
531 &eor_8 ($T5,$T5,$T4);
532 eval(shift(@insns));
533 eval(shift(@insns));
534 eval(shift(@insns));
535 &eor_8 ($T5,$T5,$T3); # sigma1(X[14..15])
536 eval(shift(@insns));
537 eval(shift(@insns));
538 eval(shift(@insns));
539 &add_32 (@X[0],@X[0],$T5); # X[0..1] += sigma1(X[14..15])
540 eval(shift(@insns));
541 eval(shift(@insns));
542 eval(shift(@insns));
543 &ushr_32 ($T6,@X[0],$sigma1[0]);
544 eval(shift(@insns));
545 &ushr_32 ($T7,@X[0],$sigma1[2]);
546 eval(shift(@insns));
547 eval(shift(@insns));
548 &sli_32 ($T6,@X[0],32-$sigma1[0]);
549 eval(shift(@insns));
550 &ushr_32 ($T5,@X[0],$sigma1[1]);
551 eval(shift(@insns));
552 eval(shift(@insns));
553 &eor_8 ($T7,$T7,$T6);
554 eval(shift(@insns));
555 eval(shift(@insns));
556 &sli_32 ($T5,@X[0],32-$sigma1[1]);
557 eval(shift(@insns));
558 eval(shift(@insns));
559 &ld1_32 ("{$T0}","[$Ktbl], #16");
560 eval(shift(@insns));
561 &eor_8 ($T7,$T7,$T5); # sigma1(X[16..17])
562 eval(shift(@insns));
563 eval(shift(@insns));
564 &eor_8 ($T5,$T5,$T5);
565 eval(shift(@insns));
566 eval(shift(@insns));
567 &mov (&Dhi($T5), &Dlo($T7));
568 eval(shift(@insns));
569 eval(shift(@insns));
570 eval(shift(@insns));
571 &add_32 (@X[0],@X[0],$T5); # X[2..3] += sigma1(X[16..17])
572 eval(shift(@insns));
573 eval(shift(@insns));
574 eval(shift(@insns));
575 &add_32 ($T0,$T0,@X[0]);
576 while($#insns>=1) { eval(shift(@insns)); }
577 &st1_32 ("{$T0}","[$Xfer], #16");
578 eval(shift(@insns));
579
580 push(@X,shift(@X)); # "rotate" X[]
581}
582
583sub Xpreload()
584{ use integer;
585 my $body = shift;
586 my @insns = (&$body,&$body,&$body,&$body);
587 my ($a,$b,$c,$d,$e,$f,$g,$h);
588
589 eval(shift(@insns));
590 eval(shift(@insns));
591 &ld1_8 ("{@X[0]}","[$inp],#16");
592 eval(shift(@insns));
593 eval(shift(@insns));
594 &ld1_32 ("{$T0}","[$Ktbl],#16");
595 eval(shift(@insns));
596 eval(shift(@insns));
597 eval(shift(@insns));
598 eval(shift(@insns));
599 &rev32 (@X[0],@X[0]);
600 eval(shift(@insns));
601 eval(shift(@insns));
602 eval(shift(@insns));
603 eval(shift(@insns));
604 &add_32 ($T0,$T0,@X[0]);
605 foreach (@insns) { eval; } # remaining instructions
606 &st1_32 ("{$T0}","[$Xfer], #16");
607
608 push(@X,shift(@X)); # "rotate" X[]
609}
610
611sub body_00_15 () {
612 (
613 '($a,$b,$c,$d,$e,$f,$g,$h)=@V;'.
614 '&add ($h,$h,$t1)', # h+=X[i]+K[i]
615 '&add ($a,$a,$t4);'. # h+=Sigma0(a) from the past
616 '&and ($t1,$f,$e)',
617 '&bic ($t4,$g,$e)',
618 '&eor ($t0,$e,$e,"ror#".($Sigma1[1]-$Sigma1[0]))',
619 '&add ($a,$a,$t2)', # h+=Maj(a,b,c) from the past
620 '&orr ($t1,$t1,$t4)', # Ch(e,f,g)
621 '&eor ($t0,$t0,$e,"ror#".($Sigma1[2]-$Sigma1[0]))', # Sigma1(e)
622 '&eor ($t4,$a,$a,"ror#".($Sigma0[1]-$Sigma0[0]))',
623 '&add ($h,$h,$t1)', # h+=Ch(e,f,g)
624 '&ror ($t0,$t0,"#$Sigma1[0]")',
625 '&eor ($t2,$a,$b)', # a^b, b^c in next round
626 '&eor ($t4,$t4,$a,"ror#".($Sigma0[2]-$Sigma0[0]))', # Sigma0(a)
627 '&add ($h,$h,$t0)', # h+=Sigma1(e)
628 '&ldr ($t1,sprintf "[sp,#%d]",4*(($j+1)&15)) if (($j&15)!=15);'.
629 '&ldr ($t1,"[$Ktbl]") if ($j==15);'.
630 '&and ($t3,$t3,$t2)', # (b^c)&=(a^b)
631 '&ror ($t4,$t4,"#$Sigma0[0]")',
632 '&add ($d,$d,$h)', # d+=h
633 '&eor ($t3,$t3,$b)', # Maj(a,b,c)
634 '$j++; unshift(@V,pop(@V)); ($t2,$t3)=($t3,$t2);'
635 )
636}
637
638$code.=<<___;
639#ifdef __KERNEL__
640.globl sha256_block_neon
641#endif
642.type sha256_block_neon,%function
643.align 4
644sha256_block_neon:
645.Lneon_entry:
646 stp x29, x30, [sp, #-16]!
647 mov x29, sp
648 sub sp,sp,#16*4
649
650 adr $Ktbl,.LK256
651 add $num,$inp,$num,lsl#6 // len to point at the end of inp
652
653 ld1.8 {@X[0]},[$inp], #16
654 ld1.8 {@X[1]},[$inp], #16
655 ld1.8 {@X[2]},[$inp], #16
656 ld1.8 {@X[3]},[$inp], #16
657 ld1.32 {$T0},[$Ktbl], #16
658 ld1.32 {$T1},[$Ktbl], #16
659 ld1.32 {$T2},[$Ktbl], #16
660 ld1.32 {$T3},[$Ktbl], #16
661 rev32 @X[0],@X[0] // yes, even on
662 rev32 @X[1],@X[1] // big-endian
663 rev32 @X[2],@X[2]
664 rev32 @X[3],@X[3]
665 mov $Xfer,sp
666 add.32 $T0,$T0,@X[0]
667 add.32 $T1,$T1,@X[1]
668 add.32 $T2,$T2,@X[2]
669 st1.32 {$T0-$T1},[$Xfer], #32
670 add.32 $T3,$T3,@X[3]
671 st1.32 {$T2-$T3},[$Xfer]
672 sub $Xfer,$Xfer,#32
673
674 ldp $A,$B,[$ctx]
675 ldp $C,$D,[$ctx,#8]
676 ldp $E,$F,[$ctx,#16]
677 ldp $G,$H,[$ctx,#24]
678 ldr $t1,[sp,#0]
679 mov $t2,wzr
680 eor $t3,$B,$C
681 mov $t4,wzr
682 b .L_00_48
683
684.align 4
685.L_00_48:
686___
687 &Xupdate(\&body_00_15);
688 &Xupdate(\&body_00_15);
689 &Xupdate(\&body_00_15);
690 &Xupdate(\&body_00_15);
691$code.=<<___;
692 cmp $t1,#0 // check for K256 terminator
693 ldr $t1,[sp,#0]
694 sub $Xfer,$Xfer,#64
695 bne .L_00_48
696
697 sub $Ktbl,$Ktbl,#256 // rewind $Ktbl
698 cmp $inp,$num
699 mov $Xfer, #64
700 csel $Xfer, $Xfer, xzr, eq
701 sub $inp,$inp,$Xfer // avoid SEGV
702 mov $Xfer,sp
703___
704 &Xpreload(\&body_00_15);
705 &Xpreload(\&body_00_15);
706 &Xpreload(\&body_00_15);
707 &Xpreload(\&body_00_15);
708$code.=<<___;
709 add $A,$A,$t4 // h+=Sigma0(a) from the past
710 ldp $t0,$t1,[$ctx,#0]
711 add $A,$A,$t2 // h+=Maj(a,b,c) from the past
712 ldp $t2,$t3,[$ctx,#8]
713 add $A,$A,$t0 // accumulate
714 add $B,$B,$t1
715 ldp $t0,$t1,[$ctx,#16]
716 add $C,$C,$t2
717 add $D,$D,$t3
718 ldp $t2,$t3,[$ctx,#24]
719 add $E,$E,$t0
720 add $F,$F,$t1
721 ldr $t1,[sp,#0]
722 stp $A,$B,[$ctx,#0]
723 add $G,$G,$t2
724 mov $t2,wzr
725 stp $C,$D,[$ctx,#8]
726 add $H,$H,$t3
727 stp $E,$F,[$ctx,#16]
728 eor $t3,$B,$C
729 stp $G,$H,[$ctx,#24]
730 mov $t4,wzr
731 mov $Xfer,sp
732 b.ne .L_00_48
733
734 ldr x29,[x29]
735 add sp,sp,#16*4+16
736 ret
737.size sha256_block_neon,.-sha256_block_neon
738___
739}
740
741if ($SZ==8) {
742my $Ktbl="x3";
743
744my @H = map("v$_.16b",(0..4));
745my ($fg,$de,$m9_10)=map("v$_.16b",(5..7));
746my @MSG=map("v$_.16b",(16..23));
747my ($W0,$W1)=("v24.2d","v25.2d");
748my ($AB,$CD,$EF,$GH)=map("v$_.16b",(26..29));
749
750$code.=<<___;
751#ifndef __KERNEL__
752.type sha512_block_armv8,%function
753.align 6
754sha512_block_armv8:
755.Lv8_entry:
756 stp x29,x30,[sp,#-16]!
757 add x29,sp,#0
758
759 ld1 {@MSG[0]-@MSG[3]},[$inp],#64 // load input
760 ld1 {@MSG[4]-@MSG[7]},[$inp],#64
761
762 ld1.64 {@H[0]-@H[3]},[$ctx] // load context
763 adr $Ktbl,.LK512
764
765 rev64 @MSG[0],@MSG[0]
766 rev64 @MSG[1],@MSG[1]
767 rev64 @MSG[2],@MSG[2]
768 rev64 @MSG[3],@MSG[3]
769 rev64 @MSG[4],@MSG[4]
770 rev64 @MSG[5],@MSG[5]
771 rev64 @MSG[6],@MSG[6]
772 rev64 @MSG[7],@MSG[7]
773 b .Loop_hw
774
775.align 4
776.Loop_hw:
777 ld1.64 {$W0},[$Ktbl],#16
778 subs $num,$num,#1
779 sub x4,$inp,#128
780 orr $AB,@H[0],@H[0] // offload
781 orr $CD,@H[1],@H[1]
782 orr $EF,@H[2],@H[2]
783 orr $GH,@H[3],@H[3]
784 csel $inp,$inp,x4,ne // conditional rewind
785___
786for($i=0;$i<32;$i++) {
787$code.=<<___;
788 add.i64 $W0,$W0,@MSG[0]
789 ld1.64 {$W1},[$Ktbl],#16
790 ext $W0,$W0,$W0,#8
791 ext $fg,@H[2],@H[3],#8
792 ext $de,@H[1],@H[2],#8
793 add.i64 @H[3],@H[3],$W0 // "T1 + H + K512[i]"
794 sha512su0 @MSG[0],@MSG[1]
795 ext $m9_10,@MSG[4],@MSG[5],#8
796 sha512h @H[3],$fg,$de
797 sha512su1 @MSG[0],@MSG[7],$m9_10
798 add.i64 @H[4],@H[1],@H[3] // "D + T1"
799 sha512h2 @H[3],$H[1],@H[0]
800___
801 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
802 @H = (@H[3],@H[0],@H[4],@H[2],@H[1]);
803}
804for(;$i<40;$i++) {
805$code.=<<___ if ($i<39);
806 ld1.64 {$W1},[$Ktbl],#16
807___
808$code.=<<___ if ($i==39);
809 sub $Ktbl,$Ktbl,#$rounds*$SZ // rewind
810___
811$code.=<<___;
812 add.i64 $W0,$W0,@MSG[0]
813 ld1 {@MSG[0]},[$inp],#16 // load next input
814 ext $W0,$W0,$W0,#8
815 ext $fg,@H[2],@H[3],#8
816 ext $de,@H[1],@H[2],#8
817 add.i64 @H[3],@H[3],$W0 // "T1 + H + K512[i]"
818 sha512h @H[3],$fg,$de
819 rev64 @MSG[0],@MSG[0]
820 add.i64 @H[4],@H[1],@H[3] // "D + T1"
821 sha512h2 @H[3],$H[1],@H[0]
822___
823 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
824 @H = (@H[3],@H[0],@H[4],@H[2],@H[1]);
825}
826$code.=<<___;
827 add.i64 @H[0],@H[0],$AB // accumulate
828 add.i64 @H[1],@H[1],$CD
829 add.i64 @H[2],@H[2],$EF
830 add.i64 @H[3],@H[3],$GH
831
832 cbnz $num,.Loop_hw
833
834 st1.64 {@H[0]-@H[3]},[$ctx] // store context
835
836 ldr x29,[sp],#16
837 ret
838.size sha512_block_armv8,.-sha512_block_armv8
839#endif
840___
841}
842
843$code.=<<___;
844#ifndef __KERNEL__
845.comm OPENSSL_armcap_P,4,4
846#endif
847___
848
849{ my %opcode = (
850 "sha256h" => 0x5e004000, "sha256h2" => 0x5e005000,
851 "sha256su0" => 0x5e282800, "sha256su1" => 0x5e006000 );
852
853 sub unsha256 {
854 my ($mnemonic,$arg)=@_;
855
856 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o
857 &&
858 sprintf ".inst\t0x%08x\t//%s %s",
859 $opcode{$mnemonic}|$1|($2<<5)|($3<<16),
860 $mnemonic,$arg;
861 }
862}
863
864{ my %opcode = (
865 "sha512h" => 0xce608000, "sha512h2" => 0xce608400,
866 "sha512su0" => 0xcec08000, "sha512su1" => 0xce608800 );
867
868 sub unsha512 {
869 my ($mnemonic,$arg)=@_;
870
871 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o
872 &&
873 sprintf ".inst\t0x%08x\t//%s %s",
874 $opcode{$mnemonic}|$1|($2<<5)|($3<<16),
875 $mnemonic,$arg;
876 }
877}
878
879open SELF,$0;
880while(<SELF>) {
881 next if (/^#!/);
882 last if (!s/^#/\/\// and !/^$/);
883 print;
884}
885close SELF;
886
887foreach(split("\n",$code)) {
888
889 s/\`([^\`]*)\`/eval($1)/ge;
890
891 s/\b(sha512\w+)\s+([qv].*)/unsha512($1,$2)/ge or
892 s/\b(sha256\w+)\s+([qv].*)/unsha256($1,$2)/ge;
893
894 s/\bq([0-9]+)\b/v$1.16b/g; # old->new registers
895
896 s/\.[ui]?8(\s)/$1/;
897 s/\.\w?64\b// and s/\.16b/\.2d/g or
898 s/\.\w?32\b// and s/\.16b/\.4s/g;
899 m/\bext\b/ and s/\.2d/\.16b/g or
900 m/(ld|st)1[^\[]+\[0\]/ and s/\.4s/\.s/g;
901
902 print $_,"\n";
903}
904
905close STDOUT or die "error closing STDOUT: $!";
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