sha512-ia64.pl@ 90293

Last change on this file since 90293 was 90293, checked in by vboxsync, 4 years ago
openssl-1.1.1k: Applied and adjusted our OpenSSL changes to 1.1.1k. bugref:10072
Property svn:executable set to ``*
File size: 20.9 KB

Line
1	#! /usr/bin/env perl
2	# Copyright 2004-2016 The OpenSSL Project Authors. All Rights Reserved.
3	#
4	# Licensed under the OpenSSL license (the "License"). You may not use
5	# this file except in compliance with the License. You can obtain a copy
6	# in the file LICENSE in the source distribution or at
7	# https://www.openssl.org/source/license.html
8
9	#
10	# ====================================================================
11	# Written by Andy Polyakov <[email protected]> for the OpenSSL
12	# project. The module is, however, dual licensed under OpenSSL and
13	# CRYPTOGAMS licenses depending on where you obtain it. For further
14	# details see http://www.openssl.org/~appro/cryptogams/.
15	# ====================================================================
16	#
17	# SHA256/512_Transform for Itanium.
18	#
19	# sha512_block runs in 1003 cycles on Itanium 2, which is almost 50%
20	# faster than gcc and >60%(!) faster than code generated by HP-UX
21	# compiler (yes, HP-UX is generating slower code, because unlike gcc,
22	# it failed to deploy "shift right pair," 'shrp' instruction, which
23	# substitutes for 64-bit rotate).
24	#
25	# 924 cycles long sha256_block outperforms gcc by over factor of 2(!)
26	# and HP-UX compiler - by >40% (yes, gcc won sha512_block, but lost
27	# this one big time). Note that "formally" 924 is about 100 cycles
28	# too much. I mean it's 64 32-bit rounds vs. 80 virtually identical
29	# 64-bit ones and 1003*64/80 gives 802. Extra cycles, 2 per round,
30	# are spent on extra work to provide for 32-bit rotations. 32-bit
31	# rotations are still handled by 'shrp' instruction and for this
32	# reason lower 32 bits are deposited to upper half of 64-bit register
33	# prior 'shrp' issue. And in order to minimize the amount of such
34	# operations, X[16] values are maintained with copies of lower
35	# halves in upper halves, which is why you'll spot such instructions
36	# as custom 'mux2', "parallel 32-bit add," 'padd4' and "parallel
37	# 32-bit unsigned right shift," 'pshr4.u' instructions here.
38	#
39	# Rules of engagement.
40	#
41	# There is only one integer shifter meaning that if I have two rotate,
42	# deposit or extract instructions in adjacent bundles, they shall
43	# split [at run-time if they have to]. But note that variable and
44	# parallel shifts are performed by multi-media ALU and are pairable
45	# with rotates [and alike]. On the backside MMALU is rather slow: it
46	# takes 2 extra cycles before the result of integer operation is
47	# available to MMALU and 2(*) extra cycles before the result of MM
48	# operation is available "back" to integer ALU, not to mention that
49	# MMALU itself has 2 cycles latency. However! I explicitly scheduled
50	# these MM instructions to avoid MM stalls, so that all these extra
51	# latencies get "hidden" in instruction-level parallelism.
52	#
53	# (*) 2 cycles on Itanium 1 and 1 cycle on Itanium 2. But I schedule
54	# for 2 in order to provide for best overall performance,
55	# because on Itanium 1 stall on MM result is accompanied by
56	# pipeline flush, which takes 6 cycles:-(
57	#
58	# June 2012
59	#
60	# Improve performance by 15-20%. Note about "rules of engagement"
61	# above. Contemporary cores are equipped with additional shifter,
62	# so that they should perform even better than below, presumably
63	# by ~10%.
64	#
65	######################################################################
66	# Current performance in cycles per processed byte for Itanium 2
67	# pre-9000 series [little-endian] system:
68	#
69	# SHA1(*) 5.7
70	# SHA256 12.6
71	# SHA512 6.7
72	#
73	# (*) SHA1 result is presented purely for reference purposes.
74	#
75	# To generate code, pass the file name with either 256 or 512 in its
76	# name and compiler flags.
77
78	$output=pop;
79
80	if ($output =~ /512.*\.[s\|asm]/) {
81	$SZ=8;
82	$BITS=8*$SZ;
83	$LDW="ld8";
84	$STW="st8";
85	$ADD="add";
86	$SHRU="shr.u";
87	$TABLE="K512";
88	$func="sha512_block_data_order";
89	@Sigma0=(28,34,39);
90	@Sigma1=(14,18,41);
91	@sigma0=(1, 8, 7);
92	@sigma1=(19,61, 6);
93	$rounds=80;
94	} elsif ($output =~ /256.*\.[s\|asm]/) {
95	$SZ=4;
96	$BITS=8*$SZ;
97	$LDW="ld4";
98	$STW="st4";
99	$ADD="padd4";
100	$SHRU="pshr4.u";
101	$TABLE="K256";
102	$func="sha256_block_data_order";
103	@Sigma0=( 2,13,22);
104	@Sigma1=( 6,11,25);
105	@sigma0=( 7,18, 3);
106	@sigma1=(17,19,10);
107	$rounds=64;
108	} else { die "nonsense $output"; }
109
110	open STDOUT,">$output" \|\| die "can't open $output: $!";
111
112	if ($^O eq "hpux") {
113	$ADDP="addp4";
114	for (@ARGV) { $ADDP="add" if (/[\+DD\|\-mlp]64/); }
115	} else { $ADDP="add"; }
116	for (@ARGV) { $big_endian=1 if (/\-DB_ENDIAN/);
117	$big_endian=0 if (/\-DL_ENDIAN/); }
118	if (!defined($big_endian))
119	{ $big_endian=(unpack('L',pack('N',1))==1); }
120
121	$code=<<___;
122	.ident \"$output, version 2.0\"
123	.ident \"IA-64 ISA artwork by Andy Polyakov <appro\@openssl.org>\"
124	.explicit
125	.text
126
127	pfssave=r2;
128	lcsave=r3;
129	prsave=r14;
130	K=r15;
131	A_=r16; B_=r17; C_=r18; D_=r19;
132	E_=r20; F_=r21; G_=r22; H_=r23;
133	T1=r24; T2=r25;
134	s0=r26; s1=r27; t0=r28; t1=r29;
135	Ktbl=r30;
136	ctx=r31; // 1st arg
137	input=r56; // 2nd arg
138	num=r57; // 3rd arg
139	sgm0=r58; sgm1=r59; // small constants
140
141	// void $func (SHA_CTX ctx, const void in,size_t num[,int host])
142	.global $func#
143	.proc $func#
144	.align 32
145	.skip 16
146	$func:
147	.prologue
148	.save ar.pfs,pfssave
149	{ .mmi; alloc pfssave=ar.pfs,3,25,0,24
150	$ADDP ctx=0,r32 // 1st arg
151	.save ar.lc,lcsave
152	mov lcsave=ar.lc }
153	{ .mmi; $ADDP input=0,r33 // 2nd arg
154	mov num=r34 // 3rd arg
155	.save pr,prsave
156	mov prsave=pr };;
157
158	.body
159	{ .mib; add r8=0*$SZ,ctx
160	add r9=1*$SZ,ctx }
161	{ .mib; add r10=2*$SZ,ctx
162	add r11=3*$SZ,ctx };;
163
164	// load A-H
165	.Lpic_point:
166	{ .mmi; $LDW A_=[r8],4*$SZ
167	$LDW B_=[r9],4*$SZ
168	mov Ktbl=ip }
169	{ .mmi; $LDW C_=[r10],4*$SZ
170	$LDW D_=[r11],4*$SZ
171	mov sgm0=$sigma0[2] };;
172	{ .mmi; $LDW E_=[r8]
173	$LDW F_=[r9]
174	add Ktbl=($TABLE#-.Lpic_point),Ktbl }
175	{ .mmi; $LDW G_=[r10]
176	$LDW H_=[r11]
177	cmp.ne p0,p16=0,r0 };;
178	___
179	$code.=<<___ if ($BITS==64);
180	{ .mii; and r8=7,input
181	and input=~7,input;;
182	cmp.eq p9,p0=1,r8 }
183	{ .mmi; cmp.eq p10,p0=2,r8
184	cmp.eq p11,p0=3,r8
185	cmp.eq p12,p0=4,r8 }
186	{ .mmi; cmp.eq p13,p0=5,r8
187	cmp.eq p14,p0=6,r8
188	cmp.eq p15,p0=7,r8 };;
189	___
190	$code.=<<___;
191	.L_outer:
192	.rotr R[8],X[16]
193	A=R[0]; B=R[1]; C=R[2]; D=R[3]; E=R[4]; F=R[5]; G=R[6]; H=R[7]
194	{ .mmi; ld1 X[15]=[input],$SZ // eliminated in sha512
195	mov A=A_
196	mov ar.lc=14 }
197	{ .mmi; mov B=B_
198	mov C=C_
199	mov D=D_ }
200	{ .mmi; mov E=E_
201	mov F=F_
202	mov ar.ec=2 };;
203	{ .mmi; mov G=G_
204	mov H=H_
205	mov sgm1=$sigma1[2] }
206	{ .mib; mov r8=0
207	add r9=1-$SZ,input
208	brp.loop.imp .L_first16,.L_first16_end-16 };;
209	___
210	$t0="A", $t1="E", $code.=<<___ if ($BITS==64);
211	// in sha512 case I load whole X[16] at once and take care of alignment...
212	{ .mmi; add r8=1*$SZ,input
213	add r9=2*$SZ,input
214	add r10=3*$SZ,input };;
215	{ .mmb; $LDW X[15]=[input],4*$SZ
216	$LDW X[14]=[r8],4*$SZ
217	(p9) br.cond.dpnt.many .L1byte };;
218	{ .mmb; $LDW X[13]=[r9],4*$SZ
219	$LDW X[12]=[r10],4*$SZ
220	(p10) br.cond.dpnt.many .L2byte };;
221	{ .mmb; $LDW X[11]=[input],4*$SZ
222	$LDW X[10]=[r8],4*$SZ
223	(p11) br.cond.dpnt.many .L3byte };;
224	{ .mmb; $LDW X[ 9]=[r9],4*$SZ
225	$LDW X[ 8]=[r10],4*$SZ
226	(p12) br.cond.dpnt.many .L4byte };;
227	{ .mmb; $LDW X[ 7]=[input],4*$SZ
228	$LDW X[ 6]=[r8],4*$SZ
229	(p13) br.cond.dpnt.many .L5byte };;
230	{ .mmb; $LDW X[ 5]=[r9],4*$SZ
231	$LDW X[ 4]=[r10],4*$SZ
232	(p14) br.cond.dpnt.many .L6byte };;
233	{ .mmb; $LDW X[ 3]=[input],4*$SZ
234	$LDW X[ 2]=[r8],4*$SZ
235	(p15) br.cond.dpnt.many .L7byte };;
236	{ .mmb; $LDW X[ 1]=[r9],4*$SZ
237	$LDW X[ 0]=[r10],4*$SZ }
238	{ .mib; mov r8=0
239	mux1 X[15]=X[15],\@rev // eliminated on big-endian
240	br.many .L_first16 };;
241	.L1byte:
242	{ .mmi; $LDW X[13]=[r9],4*$SZ
243	$LDW X[12]=[r10],4*$SZ
244	shrp X[15]=X[15],X[14],56 };;
245	{ .mmi; $LDW X[11]=[input],4*$SZ
246	$LDW X[10]=[r8],4*$SZ
247	shrp X[14]=X[14],X[13],56 }
248	{ .mmi; $LDW X[ 9]=[r9],4*$SZ
249	$LDW X[ 8]=[r10],4*$SZ
250	shrp X[13]=X[13],X[12],56 };;
251	{ .mmi; $LDW X[ 7]=[input],4*$SZ
252	$LDW X[ 6]=[r8],4*$SZ
253	shrp X[12]=X[12],X[11],56 }
254	{ .mmi; $LDW X[ 5]=[r9],4*$SZ
255	$LDW X[ 4]=[r10],4*$SZ
256	shrp X[11]=X[11],X[10],56 };;
257	{ .mmi; $LDW X[ 3]=[input],4*$SZ
258	$LDW X[ 2]=[r8],4*$SZ
259	shrp X[10]=X[10],X[ 9],56 }
260	{ .mmi; $LDW X[ 1]=[r9],4*$SZ
261	$LDW X[ 0]=[r10],4*$SZ
262	shrp X[ 9]=X[ 9],X[ 8],56 };;
263	{ .mii; $LDW T1=[input]
264	shrp X[ 8]=X[ 8],X[ 7],56
265	shrp X[ 7]=X[ 7],X[ 6],56 }
266	{ .mii; shrp X[ 6]=X[ 6],X[ 5],56
267	shrp X[ 5]=X[ 5],X[ 4],56 };;
268	{ .mii; shrp X[ 4]=X[ 4],X[ 3],56
269	shrp X[ 3]=X[ 3],X[ 2],56 }
270	{ .mii; shrp X[ 2]=X[ 2],X[ 1],56
271	shrp X[ 1]=X[ 1],X[ 0],56 }
272	{ .mib; shrp X[ 0]=X[ 0],T1,56 }
273	{ .mib; mov r8=0
274	mux1 X[15]=X[15],\@rev // eliminated on big-endian
275	br.many .L_first16 };;
276	.L2byte:
277	{ .mmi; $LDW X[11]=[input],4*$SZ
278	$LDW X[10]=[r8],4*$SZ
279	shrp X[15]=X[15],X[14],48 }
280	{ .mmi; $LDW X[ 9]=[r9],4*$SZ
281	$LDW X[ 8]=[r10],4*$SZ
282	shrp X[14]=X[14],X[13],48 };;
283	{ .mmi; $LDW X[ 7]=[input],4*$SZ
284	$LDW X[ 6]=[r8],4*$SZ
285	shrp X[13]=X[13],X[12],48 }
286	{ .mmi; $LDW X[ 5]=[r9],4*$SZ
287	$LDW X[ 4]=[r10],4*$SZ
288	shrp X[12]=X[12],X[11],48 };;
289	{ .mmi; $LDW X[ 3]=[input],4*$SZ
290	$LDW X[ 2]=[r8],4*$SZ
291	shrp X[11]=X[11],X[10],48 }
292	{ .mmi; $LDW X[ 1]=[r9],4*$SZ
293	$LDW X[ 0]=[r10],4*$SZ
294	shrp X[10]=X[10],X[ 9],48 };;
295	{ .mii; $LDW T1=[input]
296	shrp X[ 9]=X[ 9],X[ 8],48
297	shrp X[ 8]=X[ 8],X[ 7],48 }
298	{ .mii; shrp X[ 7]=X[ 7],X[ 6],48
299	shrp X[ 6]=X[ 6],X[ 5],48 };;
300	{ .mii; shrp X[ 5]=X[ 5],X[ 4],48
301	shrp X[ 4]=X[ 4],X[ 3],48 }
302	{ .mii; shrp X[ 3]=X[ 3],X[ 2],48
303	shrp X[ 2]=X[ 2],X[ 1],48 }
304	{ .mii; shrp X[ 1]=X[ 1],X[ 0],48
305	shrp X[ 0]=X[ 0],T1,48 }
306	{ .mib; mov r8=0
307	mux1 X[15]=X[15],\@rev // eliminated on big-endian
308	br.many .L_first16 };;
309	.L3byte:
310	{ .mmi; $LDW X[ 9]=[r9],4*$SZ
311	$LDW X[ 8]=[r10],4*$SZ
312	shrp X[15]=X[15],X[14],40 };;
313	{ .mmi; $LDW X[ 7]=[input],4*$SZ
314	$LDW X[ 6]=[r8],4*$SZ
315	shrp X[14]=X[14],X[13],40 }
316	{ .mmi; $LDW X[ 5]=[r9],4*$SZ
317	$LDW X[ 4]=[r10],4*$SZ
318	shrp X[13]=X[13],X[12],40 };;
319	{ .mmi; $LDW X[ 3]=[input],4*$SZ
320	$LDW X[ 2]=[r8],4*$SZ
321	shrp X[12]=X[12],X[11],40 }
322	{ .mmi; $LDW X[ 1]=[r9],4*$SZ
323	$LDW X[ 0]=[r10],4*$SZ
324	shrp X[11]=X[11],X[10],40 };;
325	{ .mii; $LDW T1=[input]
326	shrp X[10]=X[10],X[ 9],40
327	shrp X[ 9]=X[ 9],X[ 8],40 }
328	{ .mii; shrp X[ 8]=X[ 8],X[ 7],40
329	shrp X[ 7]=X[ 7],X[ 6],40 };;
330	{ .mii; shrp X[ 6]=X[ 6],X[ 5],40
331	shrp X[ 5]=X[ 5],X[ 4],40 }
332	{ .mii; shrp X[ 4]=X[ 4],X[ 3],40
333	shrp X[ 3]=X[ 3],X[ 2],40 }
334	{ .mii; shrp X[ 2]=X[ 2],X[ 1],40
335	shrp X[ 1]=X[ 1],X[ 0],40 }
336	{ .mib; shrp X[ 0]=X[ 0],T1,40 }
337	{ .mib; mov r8=0
338	mux1 X[15]=X[15],\@rev // eliminated on big-endian
339	br.many .L_first16 };;
340	.L4byte:
341	{ .mmi; $LDW X[ 7]=[input],4*$SZ
342	$LDW X[ 6]=[r8],4*$SZ
343	shrp X[15]=X[15],X[14],32 }
344	{ .mmi; $LDW X[ 5]=[r9],4*$SZ
345	$LDW X[ 4]=[r10],4*$SZ
346	shrp X[14]=X[14],X[13],32 };;
347	{ .mmi; $LDW X[ 3]=[input],4*$SZ
348	$LDW X[ 2]=[r8],4*$SZ
349	shrp X[13]=X[13],X[12],32 }
350	{ .mmi; $LDW X[ 1]=[r9],4*$SZ
351	$LDW X[ 0]=[r10],4*$SZ
352	shrp X[12]=X[12],X[11],32 };;
353	{ .mii; $LDW T1=[input]
354	shrp X[11]=X[11],X[10],32
355	shrp X[10]=X[10],X[ 9],32 }
356	{ .mii; shrp X[ 9]=X[ 9],X[ 8],32
357	shrp X[ 8]=X[ 8],X[ 7],32 };;
358	{ .mii; shrp X[ 7]=X[ 7],X[ 6],32
359	shrp X[ 6]=X[ 6],X[ 5],32 }
360	{ .mii; shrp X[ 5]=X[ 5],X[ 4],32
361	shrp X[ 4]=X[ 4],X[ 3],32 }
362	{ .mii; shrp X[ 3]=X[ 3],X[ 2],32
363	shrp X[ 2]=X[ 2],X[ 1],32 }
364	{ .mii; shrp X[ 1]=X[ 1],X[ 0],32
365	shrp X[ 0]=X[ 0],T1,32 }
366	{ .mib; mov r8=0
367	mux1 X[15]=X[15],\@rev // eliminated on big-endian
368	br.many .L_first16 };;
369	.L5byte:
370	{ .mmi; $LDW X[ 5]=[r9],4*$SZ
371	$LDW X[ 4]=[r10],4*$SZ
372	shrp X[15]=X[15],X[14],24 };;
373	{ .mmi; $LDW X[ 3]=[input],4*$SZ
374	$LDW X[ 2]=[r8],4*$SZ
375	shrp X[14]=X[14],X[13],24 }
376	{ .mmi; $LDW X[ 1]=[r9],4*$SZ
377	$LDW X[ 0]=[r10],4*$SZ
378	shrp X[13]=X[13],X[12],24 };;
379	{ .mii; $LDW T1=[input]
380	shrp X[12]=X[12],X[11],24
381	shrp X[11]=X[11],X[10],24 }
382	{ .mii; shrp X[10]=X[10],X[ 9],24
383	shrp X[ 9]=X[ 9],X[ 8],24 };;
384	{ .mii; shrp X[ 8]=X[ 8],X[ 7],24
385	shrp X[ 7]=X[ 7],X[ 6],24 }
386	{ .mii; shrp X[ 6]=X[ 6],X[ 5],24
387	shrp X[ 5]=X[ 5],X[ 4],24 }
388	{ .mii; shrp X[ 4]=X[ 4],X[ 3],24
389	shrp X[ 3]=X[ 3],X[ 2],24 }
390	{ .mii; shrp X[ 2]=X[ 2],X[ 1],24
391	shrp X[ 1]=X[ 1],X[ 0],24 }
392	{ .mib; shrp X[ 0]=X[ 0],T1,24 }
393	{ .mib; mov r8=0
394	mux1 X[15]=X[15],\@rev // eliminated on big-endian
395	br.many .L_first16 };;
396	.L6byte:
397	{ .mmi; $LDW X[ 3]=[input],4*$SZ
398	$LDW X[ 2]=[r8],4*$SZ
399	shrp X[15]=X[15],X[14],16 }
400	{ .mmi; $LDW X[ 1]=[r9],4*$SZ
401	$LDW X[ 0]=[r10],4*$SZ
402	shrp X[14]=X[14],X[13],16 };;
403	{ .mii; $LDW T1=[input]
404	shrp X[13]=X[13],X[12],16
405	shrp X[12]=X[12],X[11],16 }
406	{ .mii; shrp X[11]=X[11],X[10],16
407	shrp X[10]=X[10],X[ 9],16 };;
408	{ .mii; shrp X[ 9]=X[ 9],X[ 8],16
409	shrp X[ 8]=X[ 8],X[ 7],16 }
410	{ .mii; shrp X[ 7]=X[ 7],X[ 6],16
411	shrp X[ 6]=X[ 6],X[ 5],16 }
412	{ .mii; shrp X[ 5]=X[ 5],X[ 4],16
413	shrp X[ 4]=X[ 4],X[ 3],16 }
414	{ .mii; shrp X[ 3]=X[ 3],X[ 2],16
415	shrp X[ 2]=X[ 2],X[ 1],16 }
416	{ .mii; shrp X[ 1]=X[ 1],X[ 0],16
417	shrp X[ 0]=X[ 0],T1,16 }
418	{ .mib; mov r8=0
419	mux1 X[15]=X[15],\@rev // eliminated on big-endian
420	br.many .L_first16 };;
421	.L7byte:
422	{ .mmi; $LDW X[ 1]=[r9],4*$SZ
423	$LDW X[ 0]=[r10],4*$SZ
424	shrp X[15]=X[15],X[14],8 };;
425	{ .mii; $LDW T1=[input]
426	shrp X[14]=X[14],X[13],8
427	shrp X[13]=X[13],X[12],8 }
428	{ .mii; shrp X[12]=X[12],X[11],8
429	shrp X[11]=X[11],X[10],8 };;
430	{ .mii; shrp X[10]=X[10],X[ 9],8
431	shrp X[ 9]=X[ 9],X[ 8],8 }
432	{ .mii; shrp X[ 8]=X[ 8],X[ 7],8
433	shrp X[ 7]=X[ 7],X[ 6],8 }
434	{ .mii; shrp X[ 6]=X[ 6],X[ 5],8
435	shrp X[ 5]=X[ 5],X[ 4],8 }
436	{ .mii; shrp X[ 4]=X[ 4],X[ 3],8
437	shrp X[ 3]=X[ 3],X[ 2],8 }
438	{ .mii; shrp X[ 2]=X[ 2],X[ 1],8
439	shrp X[ 1]=X[ 1],X[ 0],8 }
440	{ .mib; shrp X[ 0]=X[ 0],T1,8 }
441	{ .mib; mov r8=0
442	mux1 X[15]=X[15],\@rev };; // eliminated on big-endian
443
444	.align 32
445	.L_first16:
446	{ .mmi; $LDW K=[Ktbl],$SZ
447	add A=A,r8 // H+=Sigma(0) from the past
448	_rotr r10=$t1,$Sigma1[0] } // ROTR(e,14)
449	{ .mmi; and T1=F,E
450	andcm r8=G,E
451	(p16) mux1 X[14]=X[14],\@rev };; // eliminated on big-endian
452	{ .mmi; and T2=A,B
453	and r9=A,C
454	_rotr r11=$t1,$Sigma1[1] } // ROTR(e,41)
455	{ .mmi; xor T1=T1,r8 // T1=((e & f) ^ (~e & g))
456	and r8=B,C };;
457	___
458	$t0="t0", $t1="t1", $code.=<<___ if ($BITS==32);
459	.align 32
460	.L_first16:
461	{ .mmi; add A=A,r8 // H+=Sigma(0) from the past
462	add r10=2-$SZ,input
463	add r11=3-$SZ,input };;
464	{ .mmi; ld1 r9=[r9]
465	ld1 r10=[r10]
466	dep.z $t1=E,32,32 }
467	{ .mmi; ld1 r11=[r11]
468	$LDW K=[Ktbl],$SZ
469	zxt4 E=E };;
470	{ .mii; or $t1=$t1,E
471	dep X[15]=X[15],r9,8,8
472	mux2 $t0=A,0x44 };; // copy lower half to upper
473	{ .mmi; and T1=F,E
474	andcm r8=G,E
475	dep r11=r10,r11,8,8 };;
476	{ .mmi; and T2=A,B
477	and r9=A,C
478	dep X[15]=X[15],r11,16,16 };;
479	{ .mmi; (p16) ld1 X[15-1]=[input],$SZ // prefetch
480	xor T1=T1,r8 // T1=((e & f) ^ (~e & g))
481	_rotr r10=$t1,$Sigma1[0] } // ROTR(e,14)
482	{ .mmi; and r8=B,C
483	_rotr r11=$t1,$Sigma1[1] };; // ROTR(e,18)
484	___
485	$code.=<<___;
486	{ .mmi; add T1=T1,H // T1=Ch(e,f,g)+h
487	xor r10=r10,r11
488	_rotr r11=$t1,$Sigma1[2] } // ROTR(e,41)
489	{ .mmi; xor T2=T2,r9
490	add K=K,X[15] };;
491	{ .mmi; add T1=T1,K // T1+=K[i]+X[i]
492	xor T2=T2,r8 // T2=((a & b) ^ (a & c) ^ (b & c))
493	_rotr r8=$t0,$Sigma0[0] } // ROTR(a,28)
494	{ .mmi; xor r11=r11,r10 // Sigma1(e)
495	_rotr r9=$t0,$Sigma0[1] };; // ROTR(a,34)
496	{ .mmi; add T1=T1,r11 // T+=Sigma1(e)
497	xor r8=r8,r9
498	_rotr r9=$t0,$Sigma0[2] };; // ROTR(a,39)
499	{ .mmi; xor r8=r8,r9 // Sigma0(a)
500	add D=D,T1
501	mux2 H=X[15],0x44 } // mov H=X[15] in sha512
502	{ .mib; (p16) add r9=1-$SZ,input // not used in sha512
503	add X[15]=T1,T2 // H=T1+Maj(a,b,c)
504	br.ctop.sptk .L_first16 };;
505	.L_first16_end:
506
507	{ .mib; mov ar.lc=$rounds-17
508	brp.loop.imp .L_rest,.L_rest_end-16 }
509	{ .mib; mov ar.ec=1
510	br.many .L_rest };;
511
512	.align 32
513	.L_rest:
514	{ .mmi; $LDW K=[Ktbl],$SZ
515	add A=A,r8 // H+=Sigma0(a) from the past
516	_rotr r8=X[15-1],$sigma0[0] } // ROTR(s0,1)
517	{ .mmi; add X[15]=X[15],X[15-9] // X[i&0xF]+=X[(i+9)&0xF]
518	$SHRU s0=X[15-1],sgm0 };; // s0=X[(i+1)&0xF]>>7
519	{ .mib; and T1=F,E
520	_rotr r9=X[15-1],$sigma0[1] } // ROTR(s0,8)
521	{ .mib; andcm r10=G,E
522	$SHRU s1=X[15-14],sgm1 };; // s1=X[(i+14)&0xF]>>6
523	// Pair of mmi; splits on Itanium 1 and prevents pipeline flush
524	// upon $SHRU output usage
525	{ .mmi; xor T1=T1,r10 // T1=((e & f) ^ (~e & g))
526	xor r9=r8,r9
527	_rotr r10=X[15-14],$sigma1[0] }// ROTR(s1,19)
528	{ .mmi; and T2=A,B
529	and r8=A,C
530	_rotr r11=X[15-14],$sigma1[1] };;// ROTR(s1,61)
531	___
532	$t0="t0", $t1="t1", $code.=<<___ if ($BITS==32);
533	{ .mib; xor s0=s0,r9 // s0=sigma0(X[(i+1)&0xF])
534	dep.z $t1=E,32,32 }
535	{ .mib; xor r10=r11,r10
536	zxt4 E=E };;
537	{ .mii; xor s1=s1,r10 // s1=sigma1(X[(i+14)&0xF])
538	shrp r9=E,$t1,32+$Sigma1[0] // ROTR(e,14)
539	mux2 $t0=A,0x44 };; // copy lower half to upper
540	// Pair of mmi; splits on Itanium 1 and prevents pipeline flush
541	// upon mux2 output usage
542	{ .mmi; xor T2=T2,r8
543	shrp r8=E,$t1,32+$Sigma1[1]} // ROTR(e,18)
544	{ .mmi; and r10=B,C
545	add T1=T1,H // T1=Ch(e,f,g)+h
546	or $t1=$t1,E };;
547	___
548	$t0="A", $t1="E", $code.=<<___ if ($BITS==64);
549	{ .mib; xor s0=s0,r9 // s0=sigma0(X[(i+1)&0xF])
550	_rotr r9=$t1,$Sigma1[0] } // ROTR(e,14)
551	{ .mib; xor r10=r11,r10
552	xor T2=T2,r8 };;
553	{ .mib; xor s1=s1,r10 // s1=sigma1(X[(i+14)&0xF])
554	_rotr r8=$t1,$Sigma1[1] } // ROTR(e,18)
555	{ .mib; and r10=B,C
556	add T1=T1,H };; // T1+=H
557	___
558	$code.=<<___;
559	{ .mib; xor r9=r9,r8
560	_rotr r8=$t1,$Sigma1[2] } // ROTR(e,41)
561	{ .mib; xor T2=T2,r10 // T2=((a & b) ^ (a & c) ^ (b & c))
562	add X[15]=X[15],s0 };; // X[i]+=sigma0(X[i+1])
563	{ .mmi; xor r9=r9,r8 // Sigma1(e)
564	add X[15]=X[15],s1 // X[i]+=sigma0(X[i+14])
565	_rotr r8=$t0,$Sigma0[0] };; // ROTR(a,28)
566	{ .mmi; add K=K,X[15]
567	add T1=T1,r9 // T1+=Sigma1(e)
568	_rotr r9=$t0,$Sigma0[1] };; // ROTR(a,34)
569	{ .mmi; add T1=T1,K // T1+=K[i]+X[i]
570	xor r8=r8,r9
571	_rotr r9=$t0,$Sigma0[2] };; // ROTR(a,39)
572	{ .mib; add D=D,T1
573	mux2 H=X[15],0x44 } // mov H=X[15] in sha512
574	{ .mib; xor r8=r8,r9 // Sigma0(a)
575	add X[15]=T1,T2 // H=T1+Maj(a,b,c)
576	br.ctop.sptk .L_rest };;
577	.L_rest_end:
578
579	{ .mmi; add A=A,r8 };; // H+=Sigma0(a) from the past
580	{ .mmi; add A_=A_,A
581	add B_=B_,B
582	add C_=C_,C }
583	{ .mmi; add D_=D_,D
584	add E_=E_,E
585	cmp.ltu p16,p0=1,num };;
586	{ .mmi; add F_=F_,F
587	add G_=G_,G
588	add H_=H_,H }
589	{ .mmb; add Ktbl=-$SZ*$rounds,Ktbl
590	(p16) add num=-1,num
591	(p16) br.dptk.many .L_outer };;
592
593	{ .mib; add r8=0*$SZ,ctx
594	add r9=1*$SZ,ctx }
595	{ .mib; add r10=2*$SZ,ctx
596	add r11=3*$SZ,ctx };;
597	{ .mmi; $STW [r8]=A_,4*$SZ
598	$STW [r9]=B_,4*$SZ
599	mov ar.lc=lcsave }
600	{ .mmi; $STW [r10]=C_,4*$SZ
601	$STW [r11]=D_,4*$SZ
602	mov pr=prsave,0x1ffff };;
603	{ .mmb; $STW [r8]=E_
604	$STW [r9]=F_ }
605	{ .mmb; $STW [r10]=G_
606	$STW [r11]=H_
607	br.ret.sptk.many b0 };;
608	.endp $func#
609	___
610
611	foreach(split($/,$code)) {
612	s/\`([^\`]*)\`/eval $1/gem;
613	s/_rotr(\s+)([^=]+)=([^,]+),([0-9]+)/shrp$1$2=$3,$3,$4/gm;
614	if ($BITS==64) {
615	s/mux2(\s+)([^=]+)=([^,]+),\S+/mov$1 $2=$3/gm;
616	s/mux1(\s+)\S+/nop.i$1 0x0/gm if ($big_endian);
617	s/(shrp\s+X\[[^=]+)=([^,]+),([^,]+),([1-9]+)/$1=$3,$2,64-$4/gm
618	if (!$big_endian);
619	s/ld1(\s+)X\[\S+/nop.m$1 0x0/gm;
620	}
621
622	print $_,"\n";
623	}
624
625	print<<___ if ($BITS==32);
626	.align 64
627	.type K256#,\@object
628	K256: data4 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
629	data4 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
630	data4 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
631	data4 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
632	data4 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
633	data4 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
634	data4 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
635	data4 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
636	data4 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
637	data4 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
638	data4 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
639	data4 0xd192e819,0xd6990624,0xf40e3585,0x106aa070
640	data4 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
641	data4 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
642	data4 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
643	data4 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
644	.size K256#,$SZ*$rounds
645	stringz "SHA256 block transform for IA64, CRYPTOGAMS by <appro\@openssl.org>"
646	___
647	print<<___ if ($BITS==64);
648	.align 64
649	.type K512#,\@object
650	K512: data8 0x428a2f98d728ae22,0x7137449123ef65cd
651	data8 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
652	data8 0x3956c25bf348b538,0x59f111f1b605d019
653	data8 0x923f82a4af194f9b,0xab1c5ed5da6d8118
654	data8 0xd807aa98a3030242,0x12835b0145706fbe
655	data8 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
656	data8 0x72be5d74f27b896f,0x80deb1fe3b1696b1
657	data8 0x9bdc06a725c71235,0xc19bf174cf692694
658	data8 0xe49b69c19ef14ad2,0xefbe4786384f25e3
659	data8 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
660	data8 0x2de92c6f592b0275,0x4a7484aa6ea6e483
661	data8 0x5cb0a9dcbd41fbd4,0x76f988da831153b5
662	data8 0x983e5152ee66dfab,0xa831c66d2db43210
663	data8 0xb00327c898fb213f,0xbf597fc7beef0ee4
664	data8 0xc6e00bf33da88fc2,0xd5a79147930aa725
665	data8 0x06ca6351e003826f,0x142929670a0e6e70
666	data8 0x27b70a8546d22ffc,0x2e1b21385c26c926
667	data8 0x4d2c6dfc5ac42aed,0x53380d139d95b3df
668	data8 0x650a73548baf63de,0x766a0abb3c77b2a8
669	data8 0x81c2c92e47edaee6,0x92722c851482353b
670	data8 0xa2bfe8a14cf10364,0xa81a664bbc423001
671	data8 0xc24b8b70d0f89791,0xc76c51a30654be30
672	data8 0xd192e819d6ef5218,0xd69906245565a910
673	data8 0xf40e35855771202a,0x106aa07032bbd1b8
674	data8 0x19a4c116b8d2d0c8,0x1e376c085141ab53
675	data8 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
676	data8 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
677	data8 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
678	data8 0x748f82ee5defb2fc,0x78a5636f43172f60
679	data8 0x84c87814a1f0ab72,0x8cc702081a6439ec
680	data8 0x90befffa23631e28,0xa4506cebde82bde9
681	data8 0xbef9a3f7b2c67915,0xc67178f2e372532b
682	data8 0xca273eceea26619c,0xd186b8c721c0c207
683	data8 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
684	data8 0x06f067aa72176fba,0x0a637dc5a2c898a6
685	data8 0x113f9804bef90dae,0x1b710b35131c471b
686	data8 0x28db77f523047d84,0x32caab7b40c72493
687	data8 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
688	data8 0x4cc5d4becb3e42b6,0x597f299cfc657e2a
689	data8 0x5fcb6fab3ad6faec,0x6c44198c4a475817
690	.size K512#,$SZ*$rounds
691	stringz "SHA512 block transform for IA64, CRYPTOGAMS by <appro\@openssl.org>"
692	___

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source: vbox/trunk/src/libs/openssl-1.1.1k/crypto/sha/asm/sha512-ia64.pl@ 90293

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