| 1 | #! /usr/bin/env perl
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| 2 | # Copyright 2010-2020 The OpenSSL Project Authors. All Rights Reserved.
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| 3 | #
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| 4 | # Licensed under the OpenSSL license (the "License"). You may not use
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| 5 | # this file except in compliance with the License. You can obtain a copy
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| 6 | # in the file LICENSE in the source distribution or at
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| 7 | # https://www.openssl.org/source/license.html
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| 8 |
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| 9 | #
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| 10 | # ====================================================================
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| 11 | # Written by Andy Polyakov <[email protected]> for the OpenSSL
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| 12 | # project. The module is, however, dual licensed under OpenSSL and
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| 13 | # CRYPTOGAMS licenses depending on where you obtain it. For further
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| 14 | # details see http://www.openssl.org/~appro/cryptogams/.
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| 15 | # ====================================================================
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| 16 | #
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| 17 | # March 2010
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| 18 | #
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| 19 | # The module implements "4-bit" GCM GHASH function and underlying
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| 20 | # single multiplication operation in GF(2^128). "4-bit" means that it
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| 21 | # uses 256 bytes per-key table [+128 bytes shared table]. Even though
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| 22 | # loops are aggressively modulo-scheduled in respect to references to
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| 23 | # Htbl and Z.hi updates for 8 cycles per byte, measured performance is
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| 24 | # ~12 cycles per processed byte on 21264 CPU. It seems to be a dynamic
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| 25 | # scheduling "glitch," because uprofile(1) indicates uniform sample
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| 26 | # distribution, as if all instruction bundles execute in 1.5 cycles.
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| 27 | # Meaning that it could have been even faster, yet 12 cycles is ~60%
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| 28 | # better than gcc-generated code and ~80% than code generated by vendor
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| 29 | # compiler.
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| 30 |
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| 31 | $cnt="v0"; # $0
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| 32 | $t0="t0";
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| 33 | $t1="t1";
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| 34 | $t2="t2";
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| 35 | $Thi0="t3"; # $4
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| 36 | $Tlo0="t4";
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| 37 | $Thi1="t5";
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| 38 | $Tlo1="t6";
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| 39 | $rem="t7"; # $8
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| 40 | #################
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| 41 | $Xi="a0"; # $16, input argument block
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| 42 | $Htbl="a1";
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| 43 | $inp="a2";
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| 44 | $len="a3";
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| 45 | $nlo="a4"; # $20
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| 46 | $nhi="a5";
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| 47 | $Zhi="t8";
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| 48 | $Zlo="t9";
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| 49 | $Xhi="t10"; # $24
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| 50 | $Xlo="t11";
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| 51 | $remp="t12";
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| 52 | $rem_4bit="AT"; # $28
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| 53 |
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| 54 | { my $N;
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| 55 | sub loop() {
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| 56 |
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| 57 | $N++;
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| 58 | $code.=<<___;
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| 59 | .align 4
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| 60 | extbl $Xlo,7,$nlo
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| 61 | and $nlo,0xf0,$nhi
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| 62 | sll $nlo,4,$nlo
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| 63 | and $nlo,0xf0,$nlo
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| 64 |
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| 65 | addq $nlo,$Htbl,$nlo
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| 66 | ldq $Zlo,8($nlo)
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| 67 | addq $nhi,$Htbl,$nhi
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| 68 | ldq $Zhi,0($nlo)
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| 69 |
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| 70 | and $Zlo,0x0f,$remp
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| 71 | sll $Zhi,60,$t0
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| 72 | lda $cnt,6(zero)
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| 73 | extbl $Xlo,6,$nlo
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| 74 |
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| 75 | ldq $Tlo1,8($nhi)
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| 76 | s8addq $remp,$rem_4bit,$remp
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| 77 | ldq $Thi1,0($nhi)
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| 78 | srl $Zlo,4,$Zlo
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| 79 |
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| 80 | ldq $rem,0($remp)
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| 81 | srl $Zhi,4,$Zhi
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| 82 | xor $t0,$Zlo,$Zlo
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| 83 | and $nlo,0xf0,$nhi
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| 84 |
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| 85 | xor $Tlo1,$Zlo,$Zlo
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| 86 | sll $nlo,4,$nlo
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| 87 | xor $Thi1,$Zhi,$Zhi
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| 88 | and $nlo,0xf0,$nlo
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| 89 |
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| 90 | addq $nlo,$Htbl,$nlo
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| 91 | ldq $Tlo0,8($nlo)
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| 92 | addq $nhi,$Htbl,$nhi
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| 93 | ldq $Thi0,0($nlo)
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| 94 |
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| 95 | .Looplo$N:
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| 96 | and $Zlo,0x0f,$remp
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| 97 | sll $Zhi,60,$t0
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| 98 | subq $cnt,1,$cnt
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| 99 | srl $Zlo,4,$Zlo
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| 100 |
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| 101 | ldq $Tlo1,8($nhi)
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| 102 | xor $rem,$Zhi,$Zhi
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| 103 | ldq $Thi1,0($nhi)
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| 104 | s8addq $remp,$rem_4bit,$remp
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| 105 |
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| 106 | ldq $rem,0($remp)
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| 107 | srl $Zhi,4,$Zhi
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| 108 | xor $t0,$Zlo,$Zlo
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| 109 | extbl $Xlo,$cnt,$nlo
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| 110 |
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| 111 | and $nlo,0xf0,$nhi
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| 112 | xor $Thi0,$Zhi,$Zhi
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| 113 | xor $Tlo0,$Zlo,$Zlo
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| 114 | sll $nlo,4,$nlo
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| 115 |
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| 116 |
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| 117 | and $Zlo,0x0f,$remp
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| 118 | sll $Zhi,60,$t0
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| 119 | and $nlo,0xf0,$nlo
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| 120 | srl $Zlo,4,$Zlo
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| 121 |
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| 122 | s8addq $remp,$rem_4bit,$remp
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| 123 | xor $rem,$Zhi,$Zhi
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| 124 | addq $nlo,$Htbl,$nlo
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| 125 | addq $nhi,$Htbl,$nhi
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| 126 |
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| 127 | ldq $rem,0($remp)
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| 128 | srl $Zhi,4,$Zhi
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| 129 | ldq $Tlo0,8($nlo)
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| 130 | xor $t0,$Zlo,$Zlo
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| 131 |
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| 132 | xor $Tlo1,$Zlo,$Zlo
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| 133 | xor $Thi1,$Zhi,$Zhi
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| 134 | ldq $Thi0,0($nlo)
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| 135 | bne $cnt,.Looplo$N
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| 136 |
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| 137 |
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| 138 | and $Zlo,0x0f,$remp
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| 139 | sll $Zhi,60,$t0
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| 140 | lda $cnt,7(zero)
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| 141 | srl $Zlo,4,$Zlo
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| 142 |
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| 143 | ldq $Tlo1,8($nhi)
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| 144 | xor $rem,$Zhi,$Zhi
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| 145 | ldq $Thi1,0($nhi)
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| 146 | s8addq $remp,$rem_4bit,$remp
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| 147 |
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| 148 | ldq $rem,0($remp)
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| 149 | srl $Zhi,4,$Zhi
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| 150 | xor $t0,$Zlo,$Zlo
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| 151 | extbl $Xhi,$cnt,$nlo
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| 152 |
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| 153 | and $nlo,0xf0,$nhi
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| 154 | xor $Thi0,$Zhi,$Zhi
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| 155 | xor $Tlo0,$Zlo,$Zlo
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| 156 | sll $nlo,4,$nlo
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| 157 |
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| 158 | and $Zlo,0x0f,$remp
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| 159 | sll $Zhi,60,$t0
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| 160 | and $nlo,0xf0,$nlo
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| 161 | srl $Zlo,4,$Zlo
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| 162 |
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| 163 | s8addq $remp,$rem_4bit,$remp
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| 164 | xor $rem,$Zhi,$Zhi
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| 165 | addq $nlo,$Htbl,$nlo
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| 166 | addq $nhi,$Htbl,$nhi
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| 167 |
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| 168 | ldq $rem,0($remp)
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| 169 | srl $Zhi,4,$Zhi
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| 170 | ldq $Tlo0,8($nlo)
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| 171 | xor $t0,$Zlo,$Zlo
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| 172 |
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| 173 | xor $Tlo1,$Zlo,$Zlo
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| 174 | xor $Thi1,$Zhi,$Zhi
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| 175 | ldq $Thi0,0($nlo)
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| 176 | unop
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| 177 |
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| 178 |
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| 179 | .Loophi$N:
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| 180 | and $Zlo,0x0f,$remp
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| 181 | sll $Zhi,60,$t0
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| 182 | subq $cnt,1,$cnt
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| 183 | srl $Zlo,4,$Zlo
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| 184 |
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| 185 | ldq $Tlo1,8($nhi)
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| 186 | xor $rem,$Zhi,$Zhi
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| 187 | ldq $Thi1,0($nhi)
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| 188 | s8addq $remp,$rem_4bit,$remp
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| 189 |
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| 190 | ldq $rem,0($remp)
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| 191 | srl $Zhi,4,$Zhi
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| 192 | xor $t0,$Zlo,$Zlo
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| 193 | extbl $Xhi,$cnt,$nlo
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| 194 |
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| 195 | and $nlo,0xf0,$nhi
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| 196 | xor $Thi0,$Zhi,$Zhi
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| 197 | xor $Tlo0,$Zlo,$Zlo
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| 198 | sll $nlo,4,$nlo
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| 199 |
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| 200 |
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| 201 | and $Zlo,0x0f,$remp
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| 202 | sll $Zhi,60,$t0
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| 203 | and $nlo,0xf0,$nlo
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| 204 | srl $Zlo,4,$Zlo
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| 205 |
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| 206 | s8addq $remp,$rem_4bit,$remp
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| 207 | xor $rem,$Zhi,$Zhi
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| 208 | addq $nlo,$Htbl,$nlo
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| 209 | addq $nhi,$Htbl,$nhi
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| 210 |
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| 211 | ldq $rem,0($remp)
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| 212 | srl $Zhi,4,$Zhi
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| 213 | ldq $Tlo0,8($nlo)
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| 214 | xor $t0,$Zlo,$Zlo
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| 215 |
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| 216 | xor $Tlo1,$Zlo,$Zlo
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| 217 | xor $Thi1,$Zhi,$Zhi
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| 218 | ldq $Thi0,0($nlo)
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| 219 | bne $cnt,.Loophi$N
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| 220 |
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| 221 |
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| 222 | and $Zlo,0x0f,$remp
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| 223 | sll $Zhi,60,$t0
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| 224 | srl $Zlo,4,$Zlo
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| 225 |
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| 226 | ldq $Tlo1,8($nhi)
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| 227 | xor $rem,$Zhi,$Zhi
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| 228 | ldq $Thi1,0($nhi)
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| 229 | s8addq $remp,$rem_4bit,$remp
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| 230 |
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| 231 | ldq $rem,0($remp)
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| 232 | srl $Zhi,4,$Zhi
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| 233 | xor $t0,$Zlo,$Zlo
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| 234 |
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| 235 | xor $Tlo0,$Zlo,$Zlo
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| 236 | xor $Thi0,$Zhi,$Zhi
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| 237 |
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| 238 | and $Zlo,0x0f,$remp
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| 239 | sll $Zhi,60,$t0
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| 240 | srl $Zlo,4,$Zlo
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| 241 |
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| 242 | s8addq $remp,$rem_4bit,$remp
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| 243 | xor $rem,$Zhi,$Zhi
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| 244 |
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| 245 | ldq $rem,0($remp)
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| 246 | srl $Zhi,4,$Zhi
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| 247 | xor $Tlo1,$Zlo,$Zlo
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| 248 | xor $Thi1,$Zhi,$Zhi
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| 249 | xor $t0,$Zlo,$Zlo
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| 250 | xor $rem,$Zhi,$Zhi
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| 251 | ___
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| 252 | }}
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| 253 |
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| 254 | $code=<<___;
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| 255 | #ifdef __linux__
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| 256 | #include <asm/regdef.h>
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| 257 | #else
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| 258 | #include <asm.h>
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| 259 | #include <regdef.h>
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| 260 | #endif
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| 261 |
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| 262 | .text
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| 263 |
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| 264 | .set noat
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| 265 | .set noreorder
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| 266 | .globl gcm_gmult_4bit
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| 267 | .align 4
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| 268 | .ent gcm_gmult_4bit
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| 269 | gcm_gmult_4bit:
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| 270 | .frame sp,0,ra
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| 271 | .prologue 0
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| 272 |
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| 273 | ldq $Xlo,8($Xi)
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| 274 | ldq $Xhi,0($Xi)
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| 275 |
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| 276 | bsr $t0,picmeup
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| 277 | nop
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| 278 | ___
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| 279 |
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| 280 | &loop();
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| 281 |
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| 282 | $code.=<<___;
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| 283 | srl $Zlo,24,$t0 # byte swap
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| 284 | srl $Zlo,8,$t1
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| 285 |
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| 286 | sll $Zlo,8,$t2
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| 287 | sll $Zlo,24,$Zlo
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| 288 | zapnot $t0,0x11,$t0
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| 289 | zapnot $t1,0x22,$t1
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| 290 |
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| 291 | zapnot $Zlo,0x88,$Zlo
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| 292 | or $t0,$t1,$t0
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| 293 | zapnot $t2,0x44,$t2
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| 294 |
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| 295 | or $Zlo,$t0,$Zlo
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| 296 | srl $Zhi,24,$t0
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| 297 | srl $Zhi,8,$t1
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| 298 |
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| 299 | or $Zlo,$t2,$Zlo
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| 300 | sll $Zhi,8,$t2
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| 301 | sll $Zhi,24,$Zhi
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| 302 |
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| 303 | srl $Zlo,32,$Xlo
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| 304 | sll $Zlo,32,$Zlo
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| 305 |
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| 306 | zapnot $t0,0x11,$t0
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| 307 | zapnot $t1,0x22,$t1
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| 308 | or $Zlo,$Xlo,$Xlo
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| 309 |
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| 310 | zapnot $Zhi,0x88,$Zhi
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| 311 | or $t0,$t1,$t0
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| 312 | zapnot $t2,0x44,$t2
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| 313 |
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| 314 | or $Zhi,$t0,$Zhi
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| 315 | or $Zhi,$t2,$Zhi
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| 316 |
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| 317 | srl $Zhi,32,$Xhi
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| 318 | sll $Zhi,32,$Zhi
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| 319 |
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| 320 | or $Zhi,$Xhi,$Xhi
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| 321 | stq $Xlo,8($Xi)
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| 322 | stq $Xhi,0($Xi)
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| 323 |
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| 324 | ret (ra)
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| 325 | .end gcm_gmult_4bit
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| 326 | ___
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| 327 |
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| 328 | $inhi="s0";
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| 329 | $inlo="s1";
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| 330 |
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| 331 | $code.=<<___;
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| 332 | .globl gcm_ghash_4bit
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| 333 | .align 4
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| 334 | .ent gcm_ghash_4bit
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| 335 | gcm_ghash_4bit:
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| 336 | lda sp,-32(sp)
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| 337 | stq ra,0(sp)
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| 338 | stq s0,8(sp)
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| 339 | stq s1,16(sp)
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| 340 | .mask 0x04000600,-32
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| 341 | .frame sp,32,ra
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| 342 | .prologue 0
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| 343 |
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| 344 | ldq_u $inhi,0($inp)
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| 345 | ldq_u $Thi0,7($inp)
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| 346 | ldq_u $inlo,8($inp)
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| 347 | ldq_u $Tlo0,15($inp)
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| 348 | ldq $Xhi,0($Xi)
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| 349 | ldq $Xlo,8($Xi)
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| 350 |
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| 351 | bsr $t0,picmeup
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| 352 | nop
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| 353 |
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| 354 | .Louter:
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| 355 | extql $inhi,$inp,$inhi
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| 356 | extqh $Thi0,$inp,$Thi0
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| 357 | or $inhi,$Thi0,$inhi
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| 358 | lda $inp,16($inp)
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| 359 |
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| 360 | extql $inlo,$inp,$inlo
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| 361 | extqh $Tlo0,$inp,$Tlo0
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| 362 | or $inlo,$Tlo0,$inlo
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| 363 | subq $len,16,$len
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| 364 |
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| 365 | xor $Xlo,$inlo,$Xlo
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| 366 | xor $Xhi,$inhi,$Xhi
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| 367 | ___
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| 368 |
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| 369 | &loop();
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| 370 |
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| 371 | $code.=<<___;
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| 372 | srl $Zlo,24,$t0 # byte swap
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| 373 | srl $Zlo,8,$t1
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| 374 |
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| 375 | sll $Zlo,8,$t2
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| 376 | sll $Zlo,24,$Zlo
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| 377 | zapnot $t0,0x11,$t0
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| 378 | zapnot $t1,0x22,$t1
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| 379 |
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| 380 | zapnot $Zlo,0x88,$Zlo
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| 381 | or $t0,$t1,$t0
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| 382 | zapnot $t2,0x44,$t2
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| 383 |
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| 384 | or $Zlo,$t0,$Zlo
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| 385 | srl $Zhi,24,$t0
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| 386 | srl $Zhi,8,$t1
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| 387 |
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| 388 | or $Zlo,$t2,$Zlo
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| 389 | sll $Zhi,8,$t2
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| 390 | sll $Zhi,24,$Zhi
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| 391 |
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| 392 | srl $Zlo,32,$Xlo
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| 393 | sll $Zlo,32,$Zlo
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| 394 | beq $len,.Ldone
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| 395 |
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| 396 | zapnot $t0,0x11,$t0
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| 397 | zapnot $t1,0x22,$t1
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| 398 | or $Zlo,$Xlo,$Xlo
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| 399 | ldq_u $inhi,0($inp)
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| 400 |
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| 401 | zapnot $Zhi,0x88,$Zhi
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| 402 | or $t0,$t1,$t0
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| 403 | zapnot $t2,0x44,$t2
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| 404 | ldq_u $Thi0,7($inp)
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| 405 |
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| 406 | or $Zhi,$t0,$Zhi
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| 407 | or $Zhi,$t2,$Zhi
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| 408 | ldq_u $inlo,8($inp)
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| 409 | ldq_u $Tlo0,15($inp)
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| 410 |
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| 411 | srl $Zhi,32,$Xhi
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| 412 | sll $Zhi,32,$Zhi
|
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| 413 |
|
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| 414 | or $Zhi,$Xhi,$Xhi
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| 415 | br zero,.Louter
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| 416 |
|
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| 417 | .Ldone:
|
|---|
| 418 | zapnot $t0,0x11,$t0
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| 419 | zapnot $t1,0x22,$t1
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| 420 | or $Zlo,$Xlo,$Xlo
|
|---|
| 421 |
|
|---|
| 422 | zapnot $Zhi,0x88,$Zhi
|
|---|
| 423 | or $t0,$t1,$t0
|
|---|
| 424 | zapnot $t2,0x44,$t2
|
|---|
| 425 |
|
|---|
| 426 | or $Zhi,$t0,$Zhi
|
|---|
| 427 | or $Zhi,$t2,$Zhi
|
|---|
| 428 |
|
|---|
| 429 | srl $Zhi,32,$Xhi
|
|---|
| 430 | sll $Zhi,32,$Zhi
|
|---|
| 431 |
|
|---|
| 432 | or $Zhi,$Xhi,$Xhi
|
|---|
| 433 |
|
|---|
| 434 | stq $Xlo,8($Xi)
|
|---|
| 435 | stq $Xhi,0($Xi)
|
|---|
| 436 |
|
|---|
| 437 | .set noreorder
|
|---|
| 438 | /*ldq ra,0(sp)*/
|
|---|
| 439 | ldq s0,8(sp)
|
|---|
| 440 | ldq s1,16(sp)
|
|---|
| 441 | lda sp,32(sp)
|
|---|
| 442 | ret (ra)
|
|---|
| 443 | .end gcm_ghash_4bit
|
|---|
| 444 |
|
|---|
| 445 | .align 4
|
|---|
| 446 | .ent picmeup
|
|---|
| 447 | picmeup:
|
|---|
| 448 | .frame sp,0,$t0
|
|---|
| 449 | .prologue 0
|
|---|
| 450 | br $rem_4bit,.Lpic
|
|---|
| 451 | .Lpic: lda $rem_4bit,12($rem_4bit)
|
|---|
| 452 | ret ($t0)
|
|---|
| 453 | .end picmeup
|
|---|
| 454 | nop
|
|---|
| 455 | rem_4bit:
|
|---|
| 456 | .long 0,0x0000<<16, 0,0x1C20<<16, 0,0x3840<<16, 0,0x2460<<16
|
|---|
| 457 | .long 0,0x7080<<16, 0,0x6CA0<<16, 0,0x48C0<<16, 0,0x54E0<<16
|
|---|
| 458 | .long 0,0xE100<<16, 0,0xFD20<<16, 0,0xD940<<16, 0,0xC560<<16
|
|---|
| 459 | .long 0,0x9180<<16, 0,0x8DA0<<16, 0,0xA9C0<<16, 0,0xB5E0<<16
|
|---|
| 460 | .ascii "GHASH for Alpha, CRYPTOGAMS by <appro\@openssl.org>"
|
|---|
| 461 | .align 4
|
|---|
| 462 |
|
|---|
| 463 | ___
|
|---|
| 464 | $output=pop and open STDOUT,">$output";
|
|---|
| 465 | print $code;
|
|---|
| 466 | close STDOUT or die "error closing STDOUT: $!";
|
|---|
| 467 |
|
|---|
