| 1 | #! /usr/bin/env perl
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| 2 | # Copyright 2007-2020 The OpenSSL Project Authors. All Rights Reserved.
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| 3 | #
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| 4 | # Licensed under the OpenSSL license (the "License"). You may not use
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| 5 | # this file except in compliance with the License. You can obtain a copy
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| 6 | # in the file LICENSE in the source distribution or at
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| 7 | # https://www.openssl.org/source/license.html
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| 8 |
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| 9 |
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| 10 | # ====================================================================
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| 11 | # Written by Andy Polyakov <[email protected]> for the OpenSSL
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| 12 | # project. The module is, however, dual licensed under OpenSSL and
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| 13 | # CRYPTOGAMS licenses depending on where you obtain it. For further
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| 14 | # details see http://www.openssl.org/~appro/cryptogams/.
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| 15 | #
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| 16 | # Hardware SPARC T4 support by David S. Miller
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| 17 | # ====================================================================
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| 18 |
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| 19 | # Performance improvement is not really impressive on pre-T1 CPU: +8%
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| 20 | # over Sun C and +25% over gcc [3.3]. While on T1, a.k.a. Niagara, it
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| 21 | # turned to be 40% faster than 64-bit code generated by Sun C 5.8 and
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| 22 | # >2x than 64-bit code generated by gcc 3.4. And there is a gimmick.
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| 23 | # X[16] vector is packed to 8 64-bit registers and as result nothing
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| 24 | # is spilled on stack. In addition input data is loaded in compact
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| 25 | # instruction sequence, thus minimizing the window when the code is
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| 26 | # subject to [inter-thread] cache-thrashing hazard. The goal is to
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| 27 | # ensure scalability on UltraSPARC T1, or rather to avoid decay when
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| 28 | # amount of active threads exceeds the number of physical cores.
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| 29 |
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| 30 | # SPARC T4 SHA1 hardware achieves 3.72 cycles per byte, which is 3.1x
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| 31 | # faster than software. Multi-process benchmark saturates at 11x
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| 32 | # single-process result on 8-core processor, or ~9GBps per 2.85GHz
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| 33 | # socket.
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| 34 |
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| 35 | $output=pop;
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| 36 | open STDOUT,">$output";
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| 37 |
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| 38 | @X=("%o0","%o1","%o2","%o3","%o4","%o5","%g1","%o7");
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| 39 | $rot1m="%g2";
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| 40 | $tmp64="%g3";
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| 41 | $Xi="%g4";
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| 42 | $A="%l0";
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| 43 | $B="%l1";
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| 44 | $C="%l2";
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| 45 | $D="%l3";
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| 46 | $E="%l4";
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| 47 | @V=($A,$B,$C,$D,$E);
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| 48 | $K_00_19="%l5";
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| 49 | $K_20_39="%l6";
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| 50 | $K_40_59="%l7";
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| 51 | $K_60_79="%g5";
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| 52 | @K=($K_00_19,$K_20_39,$K_40_59,$K_60_79);
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| 53 |
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| 54 | $ctx="%i0";
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| 55 | $inp="%i1";
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| 56 | $len="%i2";
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| 57 | $tmp0="%i3";
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| 58 | $tmp1="%i4";
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| 59 | $tmp2="%i5";
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| 60 |
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| 61 | sub BODY_00_15 {
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| 62 | my ($i,$a,$b,$c,$d,$e)=@_;
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| 63 | my $xi=($i&1)?@X[($i/2)%8]:$Xi;
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| 64 |
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| 65 | $code.=<<___;
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| 66 | sll $a,5,$tmp0 !! $i
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| 67 | add @K[$i/20],$e,$e
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| 68 | srl $a,27,$tmp1
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| 69 | add $tmp0,$e,$e
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| 70 | and $c,$b,$tmp0
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| 71 | add $tmp1,$e,$e
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| 72 | sll $b,30,$tmp2
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| 73 | andn $d,$b,$tmp1
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| 74 | srl $b,2,$b
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| 75 | or $tmp1,$tmp0,$tmp1
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| 76 | or $tmp2,$b,$b
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| 77 | add $xi,$e,$e
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| 78 | ___
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| 79 | if ($i&1 && $i<15) {
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| 80 | $code.=
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| 81 | " srlx @X[(($i+1)/2)%8],32,$Xi\n";
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| 82 | }
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| 83 | $code.=<<___;
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| 84 | add $tmp1,$e,$e
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| 85 | ___
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| 86 | }
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| 87 |
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| 88 | sub Xupdate {
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| 89 | my ($i,$a,$b,$c,$d,$e)=@_;
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| 90 | my $j=$i/2;
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| 91 |
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| 92 | if ($i&1) {
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| 93 | $code.=<<___;
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| 94 | sll $a,5,$tmp0 !! $i
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| 95 | add @K[$i/20],$e,$e
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| 96 | srl $a,27,$tmp1
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| 97 | ___
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| 98 | } else {
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| 99 | $code.=<<___;
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| 100 | sllx @X[($j+6)%8],32,$Xi ! Xupdate($i)
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| 101 | xor @X[($j+1)%8],@X[$j%8],@X[$j%8]
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| 102 | srlx @X[($j+7)%8],32,$tmp1
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| 103 | xor @X[($j+4)%8],@X[$j%8],@X[$j%8]
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| 104 | sll $a,5,$tmp0 !! $i
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| 105 | or $tmp1,$Xi,$Xi
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| 106 | add @K[$i/20],$e,$e !!
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| 107 | xor $Xi,@X[$j%8],@X[$j%8]
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| 108 | srlx @X[$j%8],31,$Xi
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| 109 | add @X[$j%8],@X[$j%8],@X[$j%8]
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| 110 | and $Xi,$rot1m,$Xi
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| 111 | andn @X[$j%8],$rot1m,@X[$j%8]
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| 112 | srl $a,27,$tmp1 !!
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| 113 | or $Xi,@X[$j%8],@X[$j%8]
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| 114 | ___
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| 115 | }
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| 116 | }
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| 117 |
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| 118 | sub BODY_16_19 {
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| 119 | my ($i,$a,$b,$c,$d,$e)=@_;
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| 120 |
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| 121 | &Xupdate(@_);
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| 122 | if ($i&1) {
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| 123 | $xi=@X[($i/2)%8];
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| 124 | } else {
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| 125 | $xi=$Xi;
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| 126 | $code.="\tsrlx @X[($i/2)%8],32,$xi\n";
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| 127 | }
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| 128 | $code.=<<___;
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| 129 | add $tmp0,$e,$e !!
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| 130 | and $c,$b,$tmp0
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| 131 | add $tmp1,$e,$e
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| 132 | sll $b,30,$tmp2
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| 133 | add $xi,$e,$e
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| 134 | andn $d,$b,$tmp1
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| 135 | srl $b,2,$b
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| 136 | or $tmp1,$tmp0,$tmp1
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| 137 | or $tmp2,$b,$b
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| 138 | add $tmp1,$e,$e
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| 139 | ___
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| 140 | }
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| 141 |
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| 142 | sub BODY_20_39 {
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| 143 | my ($i,$a,$b,$c,$d,$e)=@_;
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| 144 | my $xi;
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| 145 | &Xupdate(@_);
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| 146 | if ($i&1) {
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| 147 | $xi=@X[($i/2)%8];
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| 148 | } else {
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| 149 | $xi=$Xi;
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| 150 | $code.="\tsrlx @X[($i/2)%8],32,$xi\n";
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| 151 | }
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| 152 | $code.=<<___;
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| 153 | add $tmp0,$e,$e !!
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| 154 | xor $c,$b,$tmp0
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| 155 | add $tmp1,$e,$e
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| 156 | sll $b,30,$tmp2
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| 157 | xor $d,$tmp0,$tmp1
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| 158 | srl $b,2,$b
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| 159 | add $tmp1,$e,$e
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| 160 | or $tmp2,$b,$b
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| 161 | add $xi,$e,$e
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| 162 | ___
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| 163 | }
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| 164 |
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| 165 | sub BODY_40_59 {
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| 166 | my ($i,$a,$b,$c,$d,$e)=@_;
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| 167 | my $xi;
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| 168 | &Xupdate(@_);
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| 169 | if ($i&1) {
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| 170 | $xi=@X[($i/2)%8];
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| 171 | } else {
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| 172 | $xi=$Xi;
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| 173 | $code.="\tsrlx @X[($i/2)%8],32,$xi\n";
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| 174 | }
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| 175 | $code.=<<___;
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| 176 | add $tmp0,$e,$e !!
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| 177 | and $c,$b,$tmp0
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| 178 | add $tmp1,$e,$e
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| 179 | sll $b,30,$tmp2
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| 180 | or $c,$b,$tmp1
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| 181 | srl $b,2,$b
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| 182 | and $d,$tmp1,$tmp1
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| 183 | add $xi,$e,$e
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| 184 | or $tmp1,$tmp0,$tmp1
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| 185 | or $tmp2,$b,$b
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| 186 | add $tmp1,$e,$e
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| 187 | ___
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| 188 | }
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| 189 |
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| 190 | $code.=<<___;
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| 191 | #include "sparc_arch.h"
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| 192 |
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| 193 | #ifdef __arch64__
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| 194 | .register %g2,#scratch
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| 195 | .register %g3,#scratch
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| 196 | #endif
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| 197 |
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| 198 | .section ".text",#alloc,#execinstr
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| 199 |
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| 200 | #ifdef __PIC__
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| 201 | SPARC_PIC_THUNK(%g1)
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| 202 | #endif
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| 203 |
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| 204 | .align 32
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| 205 | .globl sha1_block_data_order
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| 206 | sha1_block_data_order:
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| 207 | SPARC_LOAD_ADDRESS_LEAF(OPENSSL_sparcv9cap_P,%g1,%g5)
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| 208 | ld [%g1+4],%g1 ! OPENSSL_sparcv9cap_P[1]
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| 209 |
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| 210 | andcc %g1, CFR_SHA1, %g0
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| 211 | be .Lsoftware
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| 212 | nop
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| 213 |
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| 214 | ld [%o0 + 0x00], %f0 ! load context
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| 215 | ld [%o0 + 0x04], %f1
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| 216 | ld [%o0 + 0x08], %f2
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| 217 | andcc %o1, 0x7, %g0
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| 218 | ld [%o0 + 0x0c], %f3
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| 219 | bne,pn %icc, .Lhwunaligned
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| 220 | ld [%o0 + 0x10], %f4
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| 221 |
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| 222 | .Lhw_loop:
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| 223 | ldd [%o1 + 0x00], %f8
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| 224 | ldd [%o1 + 0x08], %f10
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| 225 | ldd [%o1 + 0x10], %f12
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| 226 | ldd [%o1 + 0x18], %f14
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| 227 | ldd [%o1 + 0x20], %f16
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| 228 | ldd [%o1 + 0x28], %f18
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| 229 | ldd [%o1 + 0x30], %f20
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| 230 | subcc %o2, 1, %o2 ! done yet?
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| 231 | ldd [%o1 + 0x38], %f22
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| 232 | add %o1, 0x40, %o1
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| 233 | prefetch [%o1 + 63], 20
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| 234 |
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| 235 | .word 0x81b02820 ! SHA1
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| 236 |
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| 237 | bne,pt SIZE_T_CC, .Lhw_loop
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| 238 | nop
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| 239 |
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| 240 | .Lhwfinish:
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| 241 | st %f0, [%o0 + 0x00] ! store context
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| 242 | st %f1, [%o0 + 0x04]
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| 243 | st %f2, [%o0 + 0x08]
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| 244 | st %f3, [%o0 + 0x0c]
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| 245 | retl
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| 246 | st %f4, [%o0 + 0x10]
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| 247 |
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| 248 | .align 8
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| 249 | .Lhwunaligned:
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| 250 | alignaddr %o1, %g0, %o1
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| 251 |
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| 252 | ldd [%o1 + 0x00], %f10
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| 253 | .Lhwunaligned_loop:
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| 254 | ldd [%o1 + 0x08], %f12
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| 255 | ldd [%o1 + 0x10], %f14
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| 256 | ldd [%o1 + 0x18], %f16
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| 257 | ldd [%o1 + 0x20], %f18
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| 258 | ldd [%o1 + 0x28], %f20
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| 259 | ldd [%o1 + 0x30], %f22
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| 260 | ldd [%o1 + 0x38], %f24
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| 261 | subcc %o2, 1, %o2 ! done yet?
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| 262 | ldd [%o1 + 0x40], %f26
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| 263 | add %o1, 0x40, %o1
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| 264 | prefetch [%o1 + 63], 20
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| 265 |
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| 266 | faligndata %f10, %f12, %f8
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| 267 | faligndata %f12, %f14, %f10
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| 268 | faligndata %f14, %f16, %f12
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| 269 | faligndata %f16, %f18, %f14
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| 270 | faligndata %f18, %f20, %f16
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| 271 | faligndata %f20, %f22, %f18
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| 272 | faligndata %f22, %f24, %f20
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| 273 | faligndata %f24, %f26, %f22
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| 274 |
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| 275 | .word 0x81b02820 ! SHA1
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| 276 |
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| 277 | bne,pt SIZE_T_CC, .Lhwunaligned_loop
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| 278 | for %f26, %f26, %f10 ! %f10=%f26
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| 279 |
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| 280 | ba .Lhwfinish
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| 281 | nop
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| 282 |
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| 283 | .align 16
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| 284 | .Lsoftware:
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| 285 | save %sp,-STACK_FRAME,%sp
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| 286 | sllx $len,6,$len
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| 287 | add $inp,$len,$len
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| 288 |
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| 289 | or %g0,1,$rot1m
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| 290 | sllx $rot1m,32,$rot1m
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| 291 | or $rot1m,1,$rot1m
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| 292 |
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| 293 | ld [$ctx+0],$A
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| 294 | ld [$ctx+4],$B
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| 295 | ld [$ctx+8],$C
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| 296 | ld [$ctx+12],$D
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| 297 | ld [$ctx+16],$E
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| 298 | andn $inp,7,$tmp0
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| 299 |
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| 300 | sethi %hi(0x5a827999),$K_00_19
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| 301 | or $K_00_19,%lo(0x5a827999),$K_00_19
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| 302 | sethi %hi(0x6ed9eba1),$K_20_39
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| 303 | or $K_20_39,%lo(0x6ed9eba1),$K_20_39
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| 304 | sethi %hi(0x8f1bbcdc),$K_40_59
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| 305 | or $K_40_59,%lo(0x8f1bbcdc),$K_40_59
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| 306 | sethi %hi(0xca62c1d6),$K_60_79
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| 307 | or $K_60_79,%lo(0xca62c1d6),$K_60_79
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| 308 |
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| 309 | .Lloop:
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| 310 | ldx [$tmp0+0],@X[0]
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| 311 | ldx [$tmp0+16],@X[2]
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| 312 | ldx [$tmp0+32],@X[4]
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| 313 | ldx [$tmp0+48],@X[6]
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| 314 | and $inp,7,$tmp1
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| 315 | ldx [$tmp0+8],@X[1]
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| 316 | sll $tmp1,3,$tmp1
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| 317 | ldx [$tmp0+24],@X[3]
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| 318 | subcc %g0,$tmp1,$tmp2 ! should be 64-$tmp1, but -$tmp1 works too
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| 319 | ldx [$tmp0+40],@X[5]
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| 320 | bz,pt %icc,.Laligned
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| 321 | ldx [$tmp0+56],@X[7]
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| 322 |
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| 323 | sllx @X[0],$tmp1,@X[0]
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| 324 | ldx [$tmp0+64],$tmp64
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| 325 | ___
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| 326 | for($i=0;$i<7;$i++)
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| 327 | { $code.=<<___;
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| 328 | srlx @X[$i+1],$tmp2,$Xi
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| 329 | sllx @X[$i+1],$tmp1,@X[$i+1]
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| 330 | or $Xi,@X[$i],@X[$i]
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| 331 | ___
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| 332 | }
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| 333 | $code.=<<___;
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| 334 | srlx $tmp64,$tmp2,$tmp64
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| 335 | or $tmp64,@X[7],@X[7]
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| 336 | .Laligned:
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| 337 | srlx @X[0],32,$Xi
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| 338 | ___
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| 339 | for ($i=0;$i<16;$i++) { &BODY_00_15($i,@V); unshift(@V,pop(@V)); }
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| 340 | for (;$i<20;$i++) { &BODY_16_19($i,@V); unshift(@V,pop(@V)); }
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| 341 | for (;$i<40;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
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| 342 | for (;$i<60;$i++) { &BODY_40_59($i,@V); unshift(@V,pop(@V)); }
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| 343 | for (;$i<80;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
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| 344 | $code.=<<___;
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| 345 |
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| 346 | ld [$ctx+0],@X[0]
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| 347 | ld [$ctx+4],@X[1]
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| 348 | ld [$ctx+8],@X[2]
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| 349 | ld [$ctx+12],@X[3]
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| 350 | add $inp,64,$inp
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| 351 | ld [$ctx+16],@X[4]
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| 352 | cmp $inp,$len
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| 353 |
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| 354 | add $A,@X[0],$A
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| 355 | st $A,[$ctx+0]
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| 356 | add $B,@X[1],$B
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| 357 | st $B,[$ctx+4]
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| 358 | add $C,@X[2],$C
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| 359 | st $C,[$ctx+8]
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| 360 | add $D,@X[3],$D
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| 361 | st $D,[$ctx+12]
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| 362 | add $E,@X[4],$E
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| 363 | st $E,[$ctx+16]
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| 364 |
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| 365 | bne SIZE_T_CC,.Lloop
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| 366 | andn $inp,7,$tmp0
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| 367 |
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| 368 | ret
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| 369 | restore
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| 370 | .type sha1_block_data_order,#function
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| 371 | .size sha1_block_data_order,(.-sha1_block_data_order)
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| 372 | .asciz "SHA1 block transform for SPARCv9, CRYPTOGAMS by <appro\@openssl.org>"
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| 373 | .align 4
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| 374 | ___
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| 375 |
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| 376 | # Purpose of these subroutines is to explicitly encode VIS instructions,
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| 377 | # so that one can compile the module without having to specify VIS
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| 378 | # extensions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
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| 379 | # Idea is to reserve for option to produce "universal" binary and let
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| 380 | # programmer detect if current CPU is VIS capable at run-time.
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| 381 | sub unvis {
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| 382 | my ($mnemonic,$rs1,$rs2,$rd)=@_;
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| 383 | my $ref,$opf;
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| 384 | my %visopf = ( "faligndata" => 0x048,
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| 385 | "for" => 0x07c );
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| 386 |
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| 387 | $ref = "$mnemonic\t$rs1,$rs2,$rd";
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| 388 |
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| 389 | if ($opf=$visopf{$mnemonic}) {
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| 390 | foreach ($rs1,$rs2,$rd) {
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| 391 | return $ref if (!/%f([0-9]{1,2})/);
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| 392 | $_=$1;
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| 393 | if ($1>=32) {
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| 394 | return $ref if ($1&1);
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| 395 | # re-encode for upper double register addressing
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| 396 | $_=($1|$1>>5)&31;
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| 397 | }
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| 398 | }
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| 399 |
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| 400 | return sprintf ".word\t0x%08x !%s",
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| 401 | 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
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| 402 | $ref;
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| 403 | } else {
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| 404 | return $ref;
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| 405 | }
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| 406 | }
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| 407 | sub unalignaddr {
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| 408 | my ($mnemonic,$rs1,$rs2,$rd)=@_;
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| 409 | my %bias = ( "g" => 0, "o" => 8, "l" => 16, "i" => 24 );
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| 410 | my $ref="$mnemonic\t$rs1,$rs2,$rd";
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| 411 |
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| 412 | foreach ($rs1,$rs2,$rd) {
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| 413 | if (/%([goli])([0-7])/) { $_=$bias{$1}+$2; }
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| 414 | else { return $ref; }
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| 415 | }
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| 416 | return sprintf ".word\t0x%08x !%s",
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| 417 | 0x81b00300|$rd<<25|$rs1<<14|$rs2,
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| 418 | $ref;
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| 419 | }
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| 420 |
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| 421 | foreach (split("\n",$code)) {
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| 422 | s/\`([^\`]*)\`/eval $1/ge;
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| 423 |
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| 424 | s/\b(f[^\s]*)\s+(%f[0-9]{1,2}),\s*(%f[0-9]{1,2}),\s*(%f[0-9]{1,2})/
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| 425 | &unvis($1,$2,$3,$4)
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| 426 | /ge;
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| 427 | s/\b(alignaddr)\s+(%[goli][0-7]),\s*(%[goli][0-7]),\s*(%[goli][0-7])/
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| 428 | &unalignaddr($1,$2,$3,$4)
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| 429 | /ge;
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| 430 |
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| 431 | print $_,"\n";
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| 432 | }
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| 433 |
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| 434 | close STDOUT or die "error closing STDOUT: $!";
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