| 1 | #! /usr/bin/env perl
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| 2 | # Copyright 2005-2020 The OpenSSL Project Authors. All Rights Reserved.
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| 3 | #
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| 4 | # Licensed under the Apache License 2.0 (the "License"). You may not use
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| 5 | # this file except in compliance with the License. You can obtain a copy
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| 6 | # in the file LICENSE in the source distribution or at
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| 7 | # https://www.openssl.org/source/license.html
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| 8 |
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| 9 | #
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| 10 | # ====================================================================
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| 11 | # Written by Andy Polyakov <[email protected]> for the OpenSSL
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| 12 | # project. The module is, however, dual licensed under OpenSSL and
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| 13 | # CRYPTOGAMS licenses depending on where you obtain it. For further
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| 14 | # details see http://www.openssl.org/~appro/cryptogams/.
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| 15 | # ====================================================================
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| 16 | #
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| 17 | # July 2004
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| 18 | #
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| 19 | # 2.22x RC4 tune-up:-) It should be noted though that my hand [as in
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| 20 | # "hand-coded assembler"] doesn't stand for the whole improvement
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| 21 | # coefficient. It turned out that eliminating RC4_CHAR from config
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| 22 | # line results in ~40% improvement (yes, even for C implementation).
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| 23 | # Presumably it has everything to do with AMD cache architecture and
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| 24 | # RAW or whatever penalties. Once again! The module *requires* config
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| 25 | # line *without* RC4_CHAR! As for coding "secret," I bet on partial
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| 26 | # register arithmetics. For example instead of 'inc %r8; and $255,%r8'
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| 27 | # I simply 'inc %r8b'. Even though optimization manual discourages
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| 28 | # to operate on partial registers, it turned out to be the best bet.
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| 29 | # At least for AMD... How IA32E would perform remains to be seen...
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| 30 |
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| 31 | # November 2004
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| 32 | #
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| 33 | # As was shown by Marc Bevand reordering of couple of load operations
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| 34 | # results in even higher performance gain of 3.3x:-) At least on
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| 35 | # Opteron... For reference, 1x in this case is RC4_CHAR C-code
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| 36 | # compiled with gcc 3.3.2, which performs at ~54MBps per 1GHz clock.
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| 37 | # Latter means that if you want to *estimate* what to expect from
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| 38 | # *your* Opteron, then multiply 54 by 3.3 and clock frequency in GHz.
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| 39 |
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| 40 | # November 2004
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| 41 | #
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| 42 | # Intel P4 EM64T core was found to run the AMD64 code really slow...
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| 43 | # The only way to achieve comparable performance on P4 was to keep
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| 44 | # RC4_CHAR. Kind of ironic, huh? As it's apparently impossible to
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| 45 | # compose blended code, which would perform even within 30% marginal
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| 46 | # on either AMD and Intel platforms, I implement both cases. See
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| 47 | # rc4_skey.c for further details...
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| 48 |
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| 49 | # April 2005
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| 50 | #
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| 51 | # P4 EM64T core appears to be "allergic" to 64-bit inc/dec. Replacing
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| 52 | # those with add/sub results in 50% performance improvement of folded
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| 53 | # loop...
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| 54 |
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| 55 | # May 2005
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| 56 | #
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| 57 | # As was shown by Zou Nanhai loop unrolling can improve Intel EM64T
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| 58 | # performance by >30% [unlike P4 32-bit case that is]. But this is
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| 59 | # provided that loads are reordered even more aggressively! Both code
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| 60 | # paths, AMD64 and EM64T, reorder loads in essentially same manner
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| 61 | # as my IA-64 implementation. On Opteron this resulted in modest 5%
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| 62 | # improvement [I had to test it], while final Intel P4 performance
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| 63 | # achieves respectful 432MBps on 2.8GHz processor now. For reference.
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| 64 | # If executed on Xeon, current RC4_CHAR code-path is 2.7x faster than
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| 65 | # RC4_INT code-path. While if executed on Opteron, it's only 25%
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| 66 | # slower than the RC4_INT one [meaning that if CPU µ-arch detection
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| 67 | # is not implemented, then this final RC4_CHAR code-path should be
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| 68 | # preferred, as it provides better *all-round* performance].
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| 69 |
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| 70 | # March 2007
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| 71 | #
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| 72 | # Intel Core2 was observed to perform poorly on both code paths:-( It
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| 73 | # apparently suffers from some kind of partial register stall, which
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| 74 | # occurs in 64-bit mode only [as virtually identical 32-bit loop was
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| 75 | # observed to outperform 64-bit one by almost 50%]. Adding two movzb to
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| 76 | # cloop1 boosts its performance by 80%! This loop appears to be optimal
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| 77 | # fit for Core2 and therefore the code was modified to skip cloop8 on
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| 78 | # this CPU.
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| 79 |
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| 80 | # May 2010
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| 81 | #
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| 82 | # Intel Westmere was observed to perform suboptimally. Adding yet
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| 83 | # another movzb to cloop1 improved performance by almost 50%! Core2
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| 84 | # performance is improved too, but nominally...
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| 85 |
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| 86 | # May 2011
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| 87 | #
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| 88 | # The only code path that was not modified is P4-specific one. Non-P4
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| 89 | # Intel code path optimization is heavily based on submission by Maxim
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| 90 | # Perminov, Maxim Locktyukhin and Jim Guilford of Intel. I've used
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| 91 | # some of the ideas even in attempt to optimize the original RC4_INT
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| 92 | # code path... Current performance in cycles per processed byte (less
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| 93 | # is better) and improvement coefficients relative to previous
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| 94 | # version of this module are:
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| 95 | #
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| 96 | # Opteron 5.3/+0%(*)
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| 97 | # P4 6.5
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| 98 | # Core2 6.2/+15%(**)
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| 99 | # Westmere 4.2/+60%
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| 100 | # Sandy Bridge 4.2/+120%
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| 101 | # Atom 9.3/+80%
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| 102 | # VIA Nano 6.4/+4%
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| 103 | # Ivy Bridge 4.1/+30%
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| 104 | # Bulldozer 4.5/+30%(*)
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| 105 | #
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| 106 | # (*) But corresponding loop has less instructions, which should have
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| 107 | # positive effect on upcoming Bulldozer, which has one less ALU.
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| 108 | # For reference, Intel code runs at 6.8 cpb rate on Opteron.
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| 109 | # (**) Note that Core2 result is ~15% lower than corresponding result
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| 110 | # for 32-bit code, meaning that it's possible to improve it,
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| 111 | # but more than likely at the cost of the others (see rc4-586.pl
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| 112 | # to get the idea)...
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| 113 |
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| 114 | # $output is the last argument if it looks like a file (it has an extension)
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| 115 | # $flavour is the first argument if it doesn't look like a file
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| 116 | $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
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| 117 | $flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
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| 118 |
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| 119 | $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
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| 120 |
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| 121 | $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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| 122 | ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
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| 123 | ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
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| 124 | die "can't locate x86_64-xlate.pl";
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| 125 |
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| 126 | open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\""
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| 127 | or die "can't call $xlate: $!";
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| 128 | *STDOUT=*OUT;
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| 129 |
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| 130 | $dat="%rdi"; # arg1
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| 131 | $len="%rsi"; # arg2
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| 132 | $inp="%rdx"; # arg3
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| 133 | $out="%rcx"; # arg4
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| 134 |
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| 135 | {
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| 136 | $code=<<___;
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| 137 | .text
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| 138 | .extern OPENSSL_ia32cap_P
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| 139 |
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| 140 | .globl RC4
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| 141 | .type RC4,\@function,4
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| 142 | .align 16
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| 143 | RC4:
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| 144 | .cfi_startproc
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| 145 | endbranch
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| 146 | or $len,$len
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| 147 | jne .Lentry
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| 148 | ret
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| 149 | .Lentry:
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| 150 | push %rbx
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| 151 | .cfi_push %rbx
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| 152 | push %r12
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| 153 | .cfi_push %r12
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| 154 | push %r13
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| 155 | .cfi_push %r13
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| 156 | .Lprologue:
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| 157 | mov $len,%r11
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| 158 | mov $inp,%r12
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| 159 | mov $out,%r13
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| 160 | ___
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| 161 | my $len="%r11"; # reassign input arguments
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| 162 | my $inp="%r12";
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| 163 | my $out="%r13";
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| 164 |
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| 165 | my @XX=("%r10","%rsi");
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| 166 | my @TX=("%rax","%rbx");
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| 167 | my $YY="%rcx";
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| 168 | my $TY="%rdx";
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| 169 |
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| 170 | $code.=<<___;
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| 171 | xor $XX[0],$XX[0]
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| 172 | xor $YY,$YY
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| 173 |
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| 174 | lea 8($dat),$dat
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| 175 | mov -8($dat),$XX[0]#b
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| 176 | mov -4($dat),$YY#b
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| 177 | cmpl \$-1,256($dat)
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| 178 | je .LRC4_CHAR
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| 179 | mov OPENSSL_ia32cap_P(%rip),%r8d
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| 180 | xor $TX[1],$TX[1]
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| 181 | inc $XX[0]#b
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| 182 | sub $XX[0],$TX[1]
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| 183 | sub $inp,$out
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| 184 | movl ($dat,$XX[0],4),$TX[0]#d
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| 185 | test \$-16,$len
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| 186 | jz .Lloop1
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| 187 | bt \$30,%r8d # Intel CPU?
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| 188 | jc .Lintel
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| 189 | and \$7,$TX[1]
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| 190 | lea 1($XX[0]),$XX[1]
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| 191 | jz .Loop8
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| 192 | sub $TX[1],$len
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| 193 | .Loop8_warmup:
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| 194 | add $TX[0]#b,$YY#b
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| 195 | movl ($dat,$YY,4),$TY#d
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| 196 | movl $TX[0]#d,($dat,$YY,4)
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| 197 | movl $TY#d,($dat,$XX[0],4)
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| 198 | add $TY#b,$TX[0]#b
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| 199 | inc $XX[0]#b
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| 200 | movl ($dat,$TX[0],4),$TY#d
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| 201 | movl ($dat,$XX[0],4),$TX[0]#d
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| 202 | xorb ($inp),$TY#b
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| 203 | movb $TY#b,($out,$inp)
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| 204 | lea 1($inp),$inp
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| 205 | dec $TX[1]
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| 206 | jnz .Loop8_warmup
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| 207 |
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| 208 | lea 1($XX[0]),$XX[1]
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| 209 | jmp .Loop8
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| 210 | .align 16
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| 211 | .Loop8:
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| 212 | ___
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| 213 | for ($i=0;$i<8;$i++) {
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| 214 | $code.=<<___ if ($i==7);
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| 215 | add \$8,$XX[1]#b
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| 216 | ___
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| 217 | $code.=<<___;
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| 218 | add $TX[0]#b,$YY#b
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| 219 | movl ($dat,$YY,4),$TY#d
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| 220 | movl $TX[0]#d,($dat,$YY,4)
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| 221 | movl `4*($i==7?-1:$i)`($dat,$XX[1],4),$TX[1]#d
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| 222 | ror \$8,%r8 # ror is redundant when $i=0
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| 223 | movl $TY#d,4*$i($dat,$XX[0],4)
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| 224 | add $TX[0]#b,$TY#b
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| 225 | movb ($dat,$TY,4),%r8b
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| 226 | ___
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| 227 | push(@TX,shift(@TX)); #push(@XX,shift(@XX)); # "rotate" registers
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| 228 | }
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| 229 | $code.=<<___;
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| 230 | add \$8,$XX[0]#b
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| 231 | ror \$8,%r8
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| 232 | sub \$8,$len
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| 233 |
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| 234 | xor ($inp),%r8
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| 235 | mov %r8,($out,$inp)
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| 236 | lea 8($inp),$inp
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| 237 |
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| 238 | test \$-8,$len
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| 239 | jnz .Loop8
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| 240 | cmp \$0,$len
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| 241 | jne .Lloop1
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| 242 | jmp .Lexit
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| 243 |
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| 244 | .align 16
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| 245 | .Lintel:
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| 246 | test \$-32,$len
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| 247 | jz .Lloop1
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| 248 | and \$15,$TX[1]
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| 249 | jz .Loop16_is_hot
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| 250 | sub $TX[1],$len
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| 251 | .Loop16_warmup:
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| 252 | add $TX[0]#b,$YY#b
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| 253 | movl ($dat,$YY,4),$TY#d
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| 254 | movl $TX[0]#d,($dat,$YY,4)
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| 255 | movl $TY#d,($dat,$XX[0],4)
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| 256 | add $TY#b,$TX[0]#b
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| 257 | inc $XX[0]#b
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| 258 | movl ($dat,$TX[0],4),$TY#d
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| 259 | movl ($dat,$XX[0],4),$TX[0]#d
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| 260 | xorb ($inp),$TY#b
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| 261 | movb $TY#b,($out,$inp)
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| 262 | lea 1($inp),$inp
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| 263 | dec $TX[1]
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| 264 | jnz .Loop16_warmup
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| 265 |
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| 266 | mov $YY,$TX[1]
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| 267 | xor $YY,$YY
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| 268 | mov $TX[1]#b,$YY#b
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| 269 |
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| 270 | .Loop16_is_hot:
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| 271 | lea ($dat,$XX[0],4),$XX[1]
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| 272 | ___
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| 273 | sub RC4_loop {
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| 274 | my $i=shift;
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| 275 | my $j=$i<0?0:$i;
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| 276 | my $xmm="%xmm".($j&1);
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| 277 |
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| 278 | $code.=" add \$16,$XX[0]#b\n" if ($i==15);
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| 279 | $code.=" movdqu ($inp),%xmm2\n" if ($i==15);
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| 280 | $code.=" add $TX[0]#b,$YY#b\n" if ($i<=0);
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| 281 | $code.=" movl ($dat,$YY,4),$TY#d\n";
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| 282 | $code.=" pxor %xmm0,%xmm2\n" if ($i==0);
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| 283 | $code.=" psllq \$8,%xmm1\n" if ($i==0);
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| 284 | $code.=" pxor $xmm,$xmm\n" if ($i<=1);
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| 285 | $code.=" movl $TX[0]#d,($dat,$YY,4)\n";
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| 286 | $code.=" add $TY#b,$TX[0]#b\n";
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| 287 | $code.=" movl `4*($j+1)`($XX[1]),$TX[1]#d\n" if ($i<15);
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| 288 | $code.=" movz $TX[0]#b,$TX[0]#d\n";
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| 289 | $code.=" movl $TY#d,4*$j($XX[1])\n";
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| 290 | $code.=" pxor %xmm1,%xmm2\n" if ($i==0);
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| 291 | $code.=" lea ($dat,$XX[0],4),$XX[1]\n" if ($i==15);
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| 292 | $code.=" add $TX[1]#b,$YY#b\n" if ($i<15);
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| 293 | $code.=" pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n";
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| 294 | $code.=" movdqu %xmm2,($out,$inp)\n" if ($i==0);
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| 295 | $code.=" lea 16($inp),$inp\n" if ($i==0);
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| 296 | $code.=" movl ($XX[1]),$TX[1]#d\n" if ($i==15);
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| 297 | }
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| 298 | RC4_loop(-1);
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| 299 | $code.=<<___;
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| 300 | jmp .Loop16_enter
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| 301 | .align 16
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| 302 | .Loop16:
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| 303 | ___
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| 304 |
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| 305 | for ($i=0;$i<16;$i++) {
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| 306 | $code.=".Loop16_enter:\n" if ($i==1);
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| 307 | RC4_loop($i);
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| 308 | push(@TX,shift(@TX)); # "rotate" registers
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| 309 | }
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| 310 | $code.=<<___;
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| 311 | mov $YY,$TX[1]
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| 312 | xor $YY,$YY # keyword to partial register
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| 313 | sub \$16,$len
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| 314 | mov $TX[1]#b,$YY#b
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| 315 | test \$-16,$len
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| 316 | jnz .Loop16
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| 317 |
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| 318 | psllq \$8,%xmm1
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| 319 | pxor %xmm0,%xmm2
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| 320 | pxor %xmm1,%xmm2
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| 321 | movdqu %xmm2,($out,$inp)
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| 322 | lea 16($inp),$inp
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| 323 |
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| 324 | cmp \$0,$len
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| 325 | jne .Lloop1
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| 326 | jmp .Lexit
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| 327 |
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| 328 | .align 16
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| 329 | .Lloop1:
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| 330 | add $TX[0]#b,$YY#b
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| 331 | movl ($dat,$YY,4),$TY#d
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| 332 | movl $TX[0]#d,($dat,$YY,4)
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| 333 | movl $TY#d,($dat,$XX[0],4)
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| 334 | add $TY#b,$TX[0]#b
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| 335 | inc $XX[0]#b
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| 336 | movl ($dat,$TX[0],4),$TY#d
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| 337 | movl ($dat,$XX[0],4),$TX[0]#d
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| 338 | xorb ($inp),$TY#b
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| 339 | movb $TY#b,($out,$inp)
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| 340 | lea 1($inp),$inp
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| 341 | dec $len
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| 342 | jnz .Lloop1
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| 343 | jmp .Lexit
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| 344 |
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| 345 | .align 16
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| 346 | .LRC4_CHAR:
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| 347 | add \$1,$XX[0]#b
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| 348 | movzb ($dat,$XX[0]),$TX[0]#d
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| 349 | test \$-8,$len
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| 350 | jz .Lcloop1
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| 351 | jmp .Lcloop8
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| 352 | .align 16
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| 353 | .Lcloop8:
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| 354 | mov ($inp),%r8d
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| 355 | mov 4($inp),%r9d
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| 356 | ___
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| 357 | # unroll 2x4-wise, because 64-bit rotates kill Intel P4...
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| 358 | for ($i=0;$i<4;$i++) {
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| 359 | $code.=<<___;
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| 360 | add $TX[0]#b,$YY#b
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| 361 | lea 1($XX[0]),$XX[1]
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| 362 | movzb ($dat,$YY),$TY#d
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| 363 | movzb $XX[1]#b,$XX[1]#d
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| 364 | movzb ($dat,$XX[1]),$TX[1]#d
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| 365 | movb $TX[0]#b,($dat,$YY)
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| 366 | cmp $XX[1],$YY
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| 367 | movb $TY#b,($dat,$XX[0])
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| 368 | jne .Lcmov$i # Intel cmov is sloooow...
|
|---|
| 369 | mov $TX[0],$TX[1]
|
|---|
| 370 | .Lcmov$i:
|
|---|
| 371 | add $TX[0]#b,$TY#b
|
|---|
| 372 | xor ($dat,$TY),%r8b
|
|---|
| 373 | ror \$8,%r8d
|
|---|
| 374 | ___
|
|---|
| 375 | push(@TX,shift(@TX)); push(@XX,shift(@XX)); # "rotate" registers
|
|---|
| 376 | }
|
|---|
| 377 | for ($i=4;$i<8;$i++) {
|
|---|
| 378 | $code.=<<___;
|
|---|
| 379 | add $TX[0]#b,$YY#b
|
|---|
| 380 | lea 1($XX[0]),$XX[1]
|
|---|
| 381 | movzb ($dat,$YY),$TY#d
|
|---|
| 382 | movzb $XX[1]#b,$XX[1]#d
|
|---|
| 383 | movzb ($dat,$XX[1]),$TX[1]#d
|
|---|
| 384 | movb $TX[0]#b,($dat,$YY)
|
|---|
| 385 | cmp $XX[1],$YY
|
|---|
| 386 | movb $TY#b,($dat,$XX[0])
|
|---|
| 387 | jne .Lcmov$i # Intel cmov is sloooow...
|
|---|
| 388 | mov $TX[0],$TX[1]
|
|---|
| 389 | .Lcmov$i:
|
|---|
| 390 | add $TX[0]#b,$TY#b
|
|---|
| 391 | xor ($dat,$TY),%r9b
|
|---|
| 392 | ror \$8,%r9d
|
|---|
| 393 | ___
|
|---|
| 394 | push(@TX,shift(@TX)); push(@XX,shift(@XX)); # "rotate" registers
|
|---|
| 395 | }
|
|---|
| 396 | $code.=<<___;
|
|---|
| 397 | lea -8($len),$len
|
|---|
| 398 | mov %r8d,($out)
|
|---|
| 399 | lea 8($inp),$inp
|
|---|
| 400 | mov %r9d,4($out)
|
|---|
| 401 | lea 8($out),$out
|
|---|
| 402 |
|
|---|
| 403 | test \$-8,$len
|
|---|
| 404 | jnz .Lcloop8
|
|---|
| 405 | cmp \$0,$len
|
|---|
| 406 | jne .Lcloop1
|
|---|
| 407 | jmp .Lexit
|
|---|
| 408 | ___
|
|---|
| 409 | $code.=<<___;
|
|---|
| 410 | .align 16
|
|---|
| 411 | .Lcloop1:
|
|---|
| 412 | add $TX[0]#b,$YY#b
|
|---|
| 413 | movzb $YY#b,$YY#d
|
|---|
| 414 | movzb ($dat,$YY),$TY#d
|
|---|
| 415 | movb $TX[0]#b,($dat,$YY)
|
|---|
| 416 | movb $TY#b,($dat,$XX[0])
|
|---|
| 417 | add $TX[0]#b,$TY#b
|
|---|
| 418 | add \$1,$XX[0]#b
|
|---|
| 419 | movzb $TY#b,$TY#d
|
|---|
| 420 | movzb $XX[0]#b,$XX[0]#d
|
|---|
| 421 | movzb ($dat,$TY),$TY#d
|
|---|
| 422 | movzb ($dat,$XX[0]),$TX[0]#d
|
|---|
| 423 | xorb ($inp),$TY#b
|
|---|
| 424 | lea 1($inp),$inp
|
|---|
| 425 | movb $TY#b,($out)
|
|---|
| 426 | lea 1($out),$out
|
|---|
| 427 | sub \$1,$len
|
|---|
| 428 | jnz .Lcloop1
|
|---|
| 429 | jmp .Lexit
|
|---|
| 430 |
|
|---|
| 431 | .align 16
|
|---|
| 432 | .Lexit:
|
|---|
| 433 | sub \$1,$XX[0]#b
|
|---|
| 434 | movl $XX[0]#d,-8($dat)
|
|---|
| 435 | movl $YY#d,-4($dat)
|
|---|
| 436 |
|
|---|
| 437 | mov (%rsp),%r13
|
|---|
| 438 | .cfi_restore %r13
|
|---|
| 439 | mov 8(%rsp),%r12
|
|---|
| 440 | .cfi_restore %r12
|
|---|
| 441 | mov 16(%rsp),%rbx
|
|---|
| 442 | .cfi_restore %rbx
|
|---|
| 443 | add \$24,%rsp
|
|---|
| 444 | .cfi_adjust_cfa_offset -24
|
|---|
| 445 | .Lepilogue:
|
|---|
| 446 | ret
|
|---|
| 447 | .cfi_endproc
|
|---|
| 448 | .size RC4,.-RC4
|
|---|
| 449 | ___
|
|---|
| 450 | }
|
|---|
| 451 |
|
|---|
| 452 | $idx="%r8";
|
|---|
| 453 | $ido="%r9";
|
|---|
| 454 |
|
|---|
| 455 | $code.=<<___;
|
|---|
| 456 | .globl RC4_set_key
|
|---|
| 457 | .type RC4_set_key,\@function,3
|
|---|
| 458 | .align 16
|
|---|
| 459 | RC4_set_key:
|
|---|
| 460 | .cfi_startproc
|
|---|
| 461 | endbranch
|
|---|
| 462 | lea 8($dat),$dat
|
|---|
| 463 | lea ($inp,$len),$inp
|
|---|
| 464 | neg $len
|
|---|
| 465 | mov $len,%rcx
|
|---|
| 466 | xor %eax,%eax
|
|---|
| 467 | xor $ido,$ido
|
|---|
| 468 | xor %r10,%r10
|
|---|
| 469 | xor %r11,%r11
|
|---|
| 470 |
|
|---|
| 471 | mov OPENSSL_ia32cap_P(%rip),$idx#d
|
|---|
| 472 | bt \$20,$idx#d # RC4_CHAR?
|
|---|
| 473 | jc .Lc1stloop
|
|---|
| 474 | jmp .Lw1stloop
|
|---|
| 475 |
|
|---|
| 476 | .align 16
|
|---|
| 477 | .Lw1stloop:
|
|---|
| 478 | mov %eax,($dat,%rax,4)
|
|---|
| 479 | add \$1,%al
|
|---|
| 480 | jnc .Lw1stloop
|
|---|
| 481 |
|
|---|
| 482 | xor $ido,$ido
|
|---|
| 483 | xor $idx,$idx
|
|---|
| 484 | .align 16
|
|---|
| 485 | .Lw2ndloop:
|
|---|
| 486 | mov ($dat,$ido,4),%r10d
|
|---|
| 487 | add ($inp,$len,1),$idx#b
|
|---|
| 488 | add %r10b,$idx#b
|
|---|
| 489 | add \$1,$len
|
|---|
| 490 | mov ($dat,$idx,4),%r11d
|
|---|
| 491 | cmovz %rcx,$len
|
|---|
| 492 | mov %r10d,($dat,$idx,4)
|
|---|
| 493 | mov %r11d,($dat,$ido,4)
|
|---|
| 494 | add \$1,$ido#b
|
|---|
| 495 | jnc .Lw2ndloop
|
|---|
| 496 | jmp .Lexit_key
|
|---|
| 497 |
|
|---|
| 498 | .align 16
|
|---|
| 499 | .Lc1stloop:
|
|---|
| 500 | mov %al,($dat,%rax)
|
|---|
| 501 | add \$1,%al
|
|---|
| 502 | jnc .Lc1stloop
|
|---|
| 503 |
|
|---|
| 504 | xor $ido,$ido
|
|---|
| 505 | xor $idx,$idx
|
|---|
| 506 | .align 16
|
|---|
| 507 | .Lc2ndloop:
|
|---|
| 508 | mov ($dat,$ido),%r10b
|
|---|
| 509 | add ($inp,$len),$idx#b
|
|---|
| 510 | add %r10b,$idx#b
|
|---|
| 511 | add \$1,$len
|
|---|
| 512 | mov ($dat,$idx),%r11b
|
|---|
| 513 | jnz .Lcnowrap
|
|---|
| 514 | mov %rcx,$len
|
|---|
| 515 | .Lcnowrap:
|
|---|
| 516 | mov %r10b,($dat,$idx)
|
|---|
| 517 | mov %r11b,($dat,$ido)
|
|---|
| 518 | add \$1,$ido#b
|
|---|
| 519 | jnc .Lc2ndloop
|
|---|
| 520 | movl \$-1,256($dat)
|
|---|
| 521 |
|
|---|
| 522 | .align 16
|
|---|
| 523 | .Lexit_key:
|
|---|
| 524 | xor %eax,%eax
|
|---|
| 525 | mov %eax,-8($dat)
|
|---|
| 526 | mov %eax,-4($dat)
|
|---|
| 527 | ret
|
|---|
| 528 | .cfi_endproc
|
|---|
| 529 | .size RC4_set_key,.-RC4_set_key
|
|---|
| 530 |
|
|---|
| 531 | .globl RC4_options
|
|---|
| 532 | .type RC4_options,\@abi-omnipotent
|
|---|
| 533 | .align 16
|
|---|
| 534 | RC4_options:
|
|---|
| 535 | .cfi_startproc
|
|---|
| 536 | endbranch
|
|---|
| 537 | lea .Lopts(%rip),%rax
|
|---|
| 538 | mov OPENSSL_ia32cap_P(%rip),%edx
|
|---|
| 539 | bt \$20,%edx
|
|---|
| 540 | jc .L8xchar
|
|---|
| 541 | bt \$30,%edx
|
|---|
| 542 | jnc .Ldone
|
|---|
| 543 | add \$25,%rax
|
|---|
| 544 | ret
|
|---|
| 545 | .L8xchar:
|
|---|
| 546 | add \$12,%rax
|
|---|
| 547 | .Ldone:
|
|---|
| 548 | ret
|
|---|
| 549 | .cfi_endproc
|
|---|
| 550 | .align 64
|
|---|
| 551 | .Lopts:
|
|---|
| 552 | .asciz "rc4(8x,int)"
|
|---|
| 553 | .asciz "rc4(8x,char)"
|
|---|
| 554 | .asciz "rc4(16x,int)"
|
|---|
| 555 | .asciz "RC4 for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
|
|---|
| 556 | .align 64
|
|---|
| 557 | .size RC4_options,.-RC4_options
|
|---|
| 558 | ___
|
|---|
| 559 |
|
|---|
| 560 | # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
|
|---|
| 561 | # CONTEXT *context,DISPATCHER_CONTEXT *disp)
|
|---|
| 562 | if ($win64) {
|
|---|
| 563 | $rec="%rcx";
|
|---|
| 564 | $frame="%rdx";
|
|---|
| 565 | $context="%r8";
|
|---|
| 566 | $disp="%r9";
|
|---|
| 567 |
|
|---|
| 568 | $code.=<<___;
|
|---|
| 569 | .extern __imp_RtlVirtualUnwind
|
|---|
| 570 | .type stream_se_handler,\@abi-omnipotent
|
|---|
| 571 | .align 16
|
|---|
| 572 | stream_se_handler:
|
|---|
| 573 | push %rsi
|
|---|
| 574 | push %rdi
|
|---|
| 575 | push %rbx
|
|---|
| 576 | push %rbp
|
|---|
| 577 | push %r12
|
|---|
| 578 | push %r13
|
|---|
| 579 | push %r14
|
|---|
| 580 | push %r15
|
|---|
| 581 | pushfq
|
|---|
| 582 | sub \$64,%rsp
|
|---|
| 583 |
|
|---|
| 584 | mov 120($context),%rax # pull context->Rax
|
|---|
| 585 | mov 248($context),%rbx # pull context->Rip
|
|---|
| 586 |
|
|---|
| 587 | lea .Lprologue(%rip),%r10
|
|---|
| 588 | cmp %r10,%rbx # context->Rip<prologue label
|
|---|
| 589 | jb .Lin_prologue
|
|---|
| 590 |
|
|---|
| 591 | mov 152($context),%rax # pull context->Rsp
|
|---|
| 592 |
|
|---|
| 593 | lea .Lepilogue(%rip),%r10
|
|---|
| 594 | cmp %r10,%rbx # context->Rip>=epilogue label
|
|---|
| 595 | jae .Lin_prologue
|
|---|
| 596 |
|
|---|
| 597 | lea 24(%rax),%rax
|
|---|
| 598 |
|
|---|
| 599 | mov -8(%rax),%rbx
|
|---|
| 600 | mov -16(%rax),%r12
|
|---|
| 601 | mov -24(%rax),%r13
|
|---|
| 602 | mov %rbx,144($context) # restore context->Rbx
|
|---|
| 603 | mov %r12,216($context) # restore context->R12
|
|---|
| 604 | mov %r13,224($context) # restore context->R13
|
|---|
| 605 |
|
|---|
| 606 | .Lin_prologue:
|
|---|
| 607 | mov 8(%rax),%rdi
|
|---|
| 608 | mov 16(%rax),%rsi
|
|---|
| 609 | mov %rax,152($context) # restore context->Rsp
|
|---|
| 610 | mov %rsi,168($context) # restore context->Rsi
|
|---|
| 611 | mov %rdi,176($context) # restore context->Rdi
|
|---|
| 612 |
|
|---|
| 613 | jmp .Lcommon_seh_exit
|
|---|
| 614 | .size stream_se_handler,.-stream_se_handler
|
|---|
| 615 |
|
|---|
| 616 | .type key_se_handler,\@abi-omnipotent
|
|---|
| 617 | .align 16
|
|---|
| 618 | key_se_handler:
|
|---|
| 619 | push %rsi
|
|---|
| 620 | push %rdi
|
|---|
| 621 | push %rbx
|
|---|
| 622 | push %rbp
|
|---|
| 623 | push %r12
|
|---|
| 624 | push %r13
|
|---|
| 625 | push %r14
|
|---|
| 626 | push %r15
|
|---|
| 627 | pushfq
|
|---|
| 628 | sub \$64,%rsp
|
|---|
| 629 |
|
|---|
| 630 | mov 152($context),%rax # pull context->Rsp
|
|---|
| 631 | mov 8(%rax),%rdi
|
|---|
| 632 | mov 16(%rax),%rsi
|
|---|
| 633 | mov %rsi,168($context) # restore context->Rsi
|
|---|
| 634 | mov %rdi,176($context) # restore context->Rdi
|
|---|
| 635 |
|
|---|
| 636 | .Lcommon_seh_exit:
|
|---|
| 637 |
|
|---|
| 638 | mov 40($disp),%rdi # disp->ContextRecord
|
|---|
| 639 | mov $context,%rsi # context
|
|---|
| 640 | mov \$154,%ecx # sizeof(CONTEXT)
|
|---|
| 641 | .long 0xa548f3fc # cld; rep movsq
|
|---|
| 642 |
|
|---|
| 643 | mov $disp,%rsi
|
|---|
| 644 | xor %rcx,%rcx # arg1, UNW_FLAG_NHANDLER
|
|---|
| 645 | mov 8(%rsi),%rdx # arg2, disp->ImageBase
|
|---|
| 646 | mov 0(%rsi),%r8 # arg3, disp->ControlPc
|
|---|
| 647 | mov 16(%rsi),%r9 # arg4, disp->FunctionEntry
|
|---|
| 648 | mov 40(%rsi),%r10 # disp->ContextRecord
|
|---|
| 649 | lea 56(%rsi),%r11 # &disp->HandlerData
|
|---|
| 650 | lea 24(%rsi),%r12 # &disp->EstablisherFrame
|
|---|
| 651 | mov %r10,32(%rsp) # arg5
|
|---|
| 652 | mov %r11,40(%rsp) # arg6
|
|---|
| 653 | mov %r12,48(%rsp) # arg7
|
|---|
| 654 | mov %rcx,56(%rsp) # arg8, (NULL)
|
|---|
| 655 | call *__imp_RtlVirtualUnwind(%rip)
|
|---|
| 656 |
|
|---|
| 657 | mov \$1,%eax # ExceptionContinueSearch
|
|---|
| 658 | add \$64,%rsp
|
|---|
| 659 | popfq
|
|---|
| 660 | pop %r15
|
|---|
| 661 | pop %r14
|
|---|
| 662 | pop %r13
|
|---|
| 663 | pop %r12
|
|---|
| 664 | pop %rbp
|
|---|
| 665 | pop %rbx
|
|---|
| 666 | pop %rdi
|
|---|
| 667 | pop %rsi
|
|---|
| 668 | ret
|
|---|
| 669 | .size key_se_handler,.-key_se_handler
|
|---|
| 670 |
|
|---|
| 671 | .section .pdata
|
|---|
| 672 | .align 4
|
|---|
| 673 | .rva .LSEH_begin_RC4
|
|---|
| 674 | .rva .LSEH_end_RC4
|
|---|
| 675 | .rva .LSEH_info_RC4
|
|---|
| 676 |
|
|---|
| 677 | .rva .LSEH_begin_RC4_set_key
|
|---|
| 678 | .rva .LSEH_end_RC4_set_key
|
|---|
| 679 | .rva .LSEH_info_RC4_set_key
|
|---|
| 680 |
|
|---|
| 681 | .section .xdata
|
|---|
| 682 | .align 8
|
|---|
| 683 | .LSEH_info_RC4:
|
|---|
| 684 | .byte 9,0,0,0
|
|---|
| 685 | .rva stream_se_handler
|
|---|
| 686 | .LSEH_info_RC4_set_key:
|
|---|
| 687 | .byte 9,0,0,0
|
|---|
| 688 | .rva key_se_handler
|
|---|
| 689 | ___
|
|---|
| 690 | }
|
|---|
| 691 |
|
|---|
| 692 | sub reg_part {
|
|---|
| 693 | my ($reg,$conv)=@_;
|
|---|
| 694 | if ($reg =~ /%r[0-9]+/) { $reg .= $conv; }
|
|---|
| 695 | elsif ($conv eq "b") { $reg =~ s/%[er]([^x]+)x?/%$1l/; }
|
|---|
| 696 | elsif ($conv eq "w") { $reg =~ s/%[er](.+)/%$1/; }
|
|---|
| 697 | elsif ($conv eq "d") { $reg =~ s/%[er](.+)/%e$1/; }
|
|---|
| 698 | return $reg;
|
|---|
| 699 | }
|
|---|
| 700 |
|
|---|
| 701 | $code =~ s/(%[a-z0-9]+)#([bwd])/reg_part($1,$2)/gem;
|
|---|
| 702 | $code =~ s/\`([^\`]*)\`/eval $1/gem;
|
|---|
| 703 |
|
|---|
| 704 | print $code;
|
|---|
| 705 |
|
|---|
| 706 | close STDOUT or die "error closing STDOUT: $!";
|
|---|
