1 | /*
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2 | * Copyright 2011-2021 The OpenSSL Project Authors. All Rights Reserved.
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3 | *
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4 | * Licensed under the Apache License 2.0 (the "License"). You may not use
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5 | * this file except in compliance with the License. You can obtain a copy
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6 | * in the file LICENSE in the source distribution or at
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7 | * https://www.openssl.org/source/license.html
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8 | */
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9 |
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10 | #include <stdio.h>
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11 | #include <stdlib.h>
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12 | #include <string.h>
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13 | #include <setjmp.h>
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14 | #include <signal.h>
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15 | #include <openssl/crypto.h>
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16 | #ifdef __APPLE__
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17 | #include <sys/sysctl.h>
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18 | #endif
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19 | #include "internal/cryptlib.h"
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20 |
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21 | #include "arm_arch.h"
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22 |
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23 | unsigned int OPENSSL_armcap_P = 0;
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24 | unsigned int OPENSSL_arm_midr = 0;
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25 | unsigned int OPENSSL_armv8_rsa_neonized = 0;
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26 |
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27 | #if __ARM_MAX_ARCH__<7
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28 | void OPENSSL_cpuid_setup(void)
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29 | {
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30 | }
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31 |
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32 | uint32_t OPENSSL_rdtsc(void)
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33 | {
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34 | return 0;
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35 | }
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36 | #else
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37 | static sigset_t all_masked;
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38 |
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39 | static sigjmp_buf ill_jmp;
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40 | static void ill_handler(int sig)
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41 | {
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42 | siglongjmp(ill_jmp, sig);
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43 | }
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44 |
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45 | /*
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46 | * Following subroutines could have been inlined, but it's not all
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47 | * ARM compilers support inline assembler...
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48 | */
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49 | void _armv7_neon_probe(void);
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50 | void _armv8_aes_probe(void);
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51 | void _armv8_sha1_probe(void);
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52 | void _armv8_sha256_probe(void);
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53 | void _armv8_pmull_probe(void);
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54 | # ifdef __aarch64__
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55 | void _armv8_sha512_probe(void);
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56 | unsigned int _armv8_cpuid_probe(void);
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57 | # endif
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58 | uint32_t _armv7_tick(void);
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59 |
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60 | uint32_t OPENSSL_rdtsc(void)
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61 | {
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62 | if (OPENSSL_armcap_P & ARMV7_TICK)
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63 | return _armv7_tick();
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64 | else
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65 | return 0;
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66 | }
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67 |
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68 | # if defined(__GNUC__) && __GNUC__>=2
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69 | void OPENSSL_cpuid_setup(void) __attribute__ ((constructor));
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70 | # endif
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71 |
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72 | # if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
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73 | # if __GLIBC_PREREQ(2, 16)
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74 | # include <sys/auxv.h>
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75 | # define OSSL_IMPLEMENT_GETAUXVAL
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76 | # endif
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77 | # elif defined(__ANDROID_API__)
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78 | /* see https://developer.android.google.cn/ndk/guides/cpu-features */
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79 | # if __ANDROID_API__ >= 18
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80 | # include <sys/auxv.h>
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81 | # define OSSL_IMPLEMENT_GETAUXVAL
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82 | # endif
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83 | # endif
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84 | # if defined(__FreeBSD__)
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85 | # include <sys/param.h>
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86 | # if __FreeBSD_version >= 1200000
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87 | # include <sys/auxv.h>
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88 | # define OSSL_IMPLEMENT_GETAUXVAL
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89 |
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90 | static unsigned long getauxval(unsigned long key)
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91 | {
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92 | unsigned long val = 0ul;
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93 |
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94 | if (elf_aux_info((int)key, &val, sizeof(val)) != 0)
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95 | return 0ul;
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96 |
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97 | return val;
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98 | }
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99 | # endif
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100 | # endif
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101 |
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102 | /*
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103 | * Android: according to https://developer.android.com/ndk/guides/cpu-features,
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104 | * getauxval is supported starting with API level 18
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105 | */
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106 | # if defined(__ANDROID__) && defined(__ANDROID_API__) && __ANDROID_API__ >= 18
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107 | # include <sys/auxv.h>
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108 | # define OSSL_IMPLEMENT_GETAUXVAL
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109 | # endif
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110 |
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111 | /*
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112 | * ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas
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113 | * AArch64 used AT_HWCAP.
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114 | */
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115 | # ifndef AT_HWCAP
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116 | # define AT_HWCAP 16
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117 | # endif
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118 | # ifndef AT_HWCAP2
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119 | # define AT_HWCAP2 26
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120 | # endif
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121 | # if defined(__arm__) || defined (__arm)
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122 | # define HWCAP AT_HWCAP
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123 | # define HWCAP_NEON (1 << 12)
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124 |
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125 | # define HWCAP_CE AT_HWCAP2
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126 | # define HWCAP_CE_AES (1 << 0)
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127 | # define HWCAP_CE_PMULL (1 << 1)
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128 | # define HWCAP_CE_SHA1 (1 << 2)
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129 | # define HWCAP_CE_SHA256 (1 << 3)
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130 | # elif defined(__aarch64__)
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131 | # define HWCAP AT_HWCAP
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132 | # define HWCAP_NEON (1 << 1)
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133 |
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134 | # define HWCAP_CE HWCAP
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135 | # define HWCAP_CE_AES (1 << 3)
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136 | # define HWCAP_CE_PMULL (1 << 4)
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137 | # define HWCAP_CE_SHA1 (1 << 5)
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138 | # define HWCAP_CE_SHA256 (1 << 6)
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139 | # define HWCAP_CPUID (1 << 11)
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140 | # define HWCAP_CE_SHA512 (1 << 21)
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141 | # endif
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142 |
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143 | void OPENSSL_cpuid_setup(void)
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144 | {
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145 | const char *e;
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146 | struct sigaction ill_oact, ill_act;
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147 | sigset_t oset;
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148 | static int trigger = 0;
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149 |
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150 | if (trigger)
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151 | return;
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152 | trigger = 1;
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153 |
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154 | OPENSSL_armcap_P = 0;
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155 |
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156 | if ((e = getenv("OPENSSL_armcap"))) {
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157 | OPENSSL_armcap_P = (unsigned int)strtoul(e, NULL, 0);
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158 | return;
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159 | }
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160 |
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161 | # if defined(__APPLE__)
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162 | # if !defined(__aarch64__)
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163 | /*
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164 | * Capability probing by catching SIGILL appears to be problematic
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165 | * on iOS. But since Apple universe is "monocultural", it's actually
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166 | * possible to simply set pre-defined processor capability mask.
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167 | */
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168 | if (1) {
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169 | OPENSSL_armcap_P = ARMV7_NEON;
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170 | return;
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171 | }
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172 | /*
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173 | * One could do same even for __aarch64__ iOS builds. It's not done
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174 | * exclusively for reasons of keeping code unified across platforms.
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175 | * Unified code works because it never triggers SIGILL on Apple
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176 | * devices...
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177 | */
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178 | # else
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179 | {
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180 | unsigned int sha512;
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181 | size_t len = sizeof(sha512);
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182 |
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183 | if (sysctlbyname("hw.optional.armv8_2_sha512", &sha512, &len, NULL, 0) == 0 && sha512 == 1)
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184 | OPENSSL_armcap_P |= ARMV8_SHA512;
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185 | }
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186 | # endif
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187 | # endif
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188 |
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189 | # ifdef OSSL_IMPLEMENT_GETAUXVAL
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190 | if (getauxval(HWCAP) & HWCAP_NEON) {
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191 | unsigned long hwcap = getauxval(HWCAP_CE);
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192 |
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193 | OPENSSL_armcap_P |= ARMV7_NEON;
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194 |
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195 | if (hwcap & HWCAP_CE_AES)
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196 | OPENSSL_armcap_P |= ARMV8_AES;
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197 |
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198 | if (hwcap & HWCAP_CE_PMULL)
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199 | OPENSSL_armcap_P |= ARMV8_PMULL;
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200 |
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201 | if (hwcap & HWCAP_CE_SHA1)
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202 | OPENSSL_armcap_P |= ARMV8_SHA1;
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203 |
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204 | if (hwcap & HWCAP_CE_SHA256)
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205 | OPENSSL_armcap_P |= ARMV8_SHA256;
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206 |
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207 | # ifdef __aarch64__
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208 | if (hwcap & HWCAP_CE_SHA512)
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209 | OPENSSL_armcap_P |= ARMV8_SHA512;
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210 |
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211 | if (hwcap & HWCAP_CPUID)
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212 | OPENSSL_armcap_P |= ARMV8_CPUID;
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213 | # endif
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214 | }
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215 | # endif
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216 |
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217 | sigfillset(&all_masked);
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218 | sigdelset(&all_masked, SIGILL);
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219 | sigdelset(&all_masked, SIGTRAP);
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220 | sigdelset(&all_masked, SIGFPE);
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221 | sigdelset(&all_masked, SIGBUS);
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222 | sigdelset(&all_masked, SIGSEGV);
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223 |
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224 | memset(&ill_act, 0, sizeof(ill_act));
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225 | ill_act.sa_handler = ill_handler;
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226 | ill_act.sa_mask = all_masked;
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227 |
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228 | sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
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229 | sigaction(SIGILL, &ill_act, &ill_oact);
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230 |
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231 | /* If we used getauxval, we already have all the values */
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232 | # ifndef OSSL_IMPLEMENT_GETAUXVAL
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233 | if (sigsetjmp(ill_jmp, 1) == 0) {
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234 | _armv7_neon_probe();
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235 | OPENSSL_armcap_P |= ARMV7_NEON;
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236 | if (sigsetjmp(ill_jmp, 1) == 0) {
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237 | _armv8_pmull_probe();
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238 | OPENSSL_armcap_P |= ARMV8_PMULL | ARMV8_AES;
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239 | } else if (sigsetjmp(ill_jmp, 1) == 0) {
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240 | _armv8_aes_probe();
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241 | OPENSSL_armcap_P |= ARMV8_AES;
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242 | }
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243 | if (sigsetjmp(ill_jmp, 1) == 0) {
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244 | _armv8_sha1_probe();
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245 | OPENSSL_armcap_P |= ARMV8_SHA1;
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246 | }
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247 | if (sigsetjmp(ill_jmp, 1) == 0) {
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248 | _armv8_sha256_probe();
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249 | OPENSSL_armcap_P |= ARMV8_SHA256;
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250 | }
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251 | # if defined(__aarch64__) && !defined(__APPLE__)
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252 | if (sigsetjmp(ill_jmp, 1) == 0) {
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253 | _armv8_sha512_probe();
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254 | OPENSSL_armcap_P |= ARMV8_SHA512;
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255 | }
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256 | # endif
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257 | }
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258 | # endif
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259 |
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260 | /* Things that getauxval didn't tell us */
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261 | if (sigsetjmp(ill_jmp, 1) == 0) {
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262 | _armv7_tick();
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263 | OPENSSL_armcap_P |= ARMV7_TICK;
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264 | }
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265 |
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266 | sigaction(SIGILL, &ill_oact, NULL);
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267 | sigprocmask(SIG_SETMASK, &oset, NULL);
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268 |
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269 | # ifdef __aarch64__
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270 | if (OPENSSL_armcap_P & ARMV8_CPUID)
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271 | OPENSSL_arm_midr = _armv8_cpuid_probe();
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272 |
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273 | if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72) ||
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274 | MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N1)) &&
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275 | (OPENSSL_armcap_P & ARMV7_NEON)) {
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276 | OPENSSL_armv8_rsa_neonized = 1;
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277 | }
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278 | # endif
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279 | }
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280 | #endif
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