| 1 | #! /usr/bin/env perl
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| 2 | # Copyright 2012-2021 The OpenSSL Project Authors. All Rights Reserved.
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| 3 | #
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| 4 | # Licensed under the Apache License 2.0 (the "License"). You may not use
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| 5 | # this file except in compliance with the License. You can obtain a copy
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| 6 | # in the file LICENSE in the source distribution or at
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| 7 | # https://www.openssl.org/source/license.html
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| 8 |
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| 9 |
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| 10 | # ====================================================================
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| 11 | # Written by Andy Polyakov <[email protected]> for the OpenSSL
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| 12 | # project. The module is, however, dual licensed under OpenSSL and
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| 13 | # CRYPTOGAMS licenses depending on where you obtain it. For further
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| 14 | # details see http://www.openssl.org/~appro/cryptogams/.
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| 15 | #
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| 16 | # Hardware SPARC T4 support by David S. Miller.
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| 17 | # ====================================================================
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| 18 |
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| 19 | # MD5 for SPARCv9, 6.9 cycles per byte on UltraSPARC, >40% faster than
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| 20 | # code generated by Sun C 5.2.
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| 21 |
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| 22 | # SPARC T4 MD5 hardware achieves 3.20 cycles per byte, which is 2.1x
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| 23 | # faster than software. Multi-process benchmark saturates at 12x
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| 24 | # single-process result on 8-core processor, or ~11GBps per 2.85GHz
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| 25 | # socket.
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| 26 |
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| 27 | # $output is the last argument if it looks like a file (it has an extension)
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| 28 | $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
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| 29 |
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| 30 | $output and open STDOUT,">$output";
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| 31 |
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| 32 | use integer;
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| 33 |
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| 34 | ($ctx,$inp,$len)=("%i0","%i1","%i2"); # input arguments
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| 35 |
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| 36 | # 64-bit values
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| 37 | @X=("%o0","%o1","%o2","%o3","%o4","%o5","%o7","%g1","%g2");
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| 38 | $tx="%g3";
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| 39 | ($AB,$CD)=("%g4","%g5");
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| 40 |
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| 41 | # 32-bit values
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| 42 | @V=($A,$B,$C,$D)=map("%l$_",(0..3));
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| 43 | ($t1,$t2,$t3,$saved_asi)=map("%l$_",(4..7));
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| 44 | ($shr,$shl1,$shl2)=("%i3","%i4","%i5");
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| 45 |
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| 46 | my @K=( 0xd76aa478,0xe8c7b756,0x242070db,0xc1bdceee,
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| 47 | 0xf57c0faf,0x4787c62a,0xa8304613,0xfd469501,
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| 48 | 0x698098d8,0x8b44f7af,0xffff5bb1,0x895cd7be,
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| 49 | 0x6b901122,0xfd987193,0xa679438e,0x49b40821,
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| 50 |
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| 51 | 0xf61e2562,0xc040b340,0x265e5a51,0xe9b6c7aa,
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| 52 | 0xd62f105d,0x02441453,0xd8a1e681,0xe7d3fbc8,
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| 53 | 0x21e1cde6,0xc33707d6,0xf4d50d87,0x455a14ed,
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| 54 | 0xa9e3e905,0xfcefa3f8,0x676f02d9,0x8d2a4c8a,
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| 55 |
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| 56 | 0xfffa3942,0x8771f681,0x6d9d6122,0xfde5380c,
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| 57 | 0xa4beea44,0x4bdecfa9,0xf6bb4b60,0xbebfbc70,
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| 58 | 0x289b7ec6,0xeaa127fa,0xd4ef3085,0x04881d05,
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| 59 | 0xd9d4d039,0xe6db99e5,0x1fa27cf8,0xc4ac5665,
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| 60 |
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| 61 | 0xf4292244,0x432aff97,0xab9423a7,0xfc93a039,
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| 62 | 0x655b59c3,0x8f0ccc92,0xffeff47d,0x85845dd1,
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| 63 | 0x6fa87e4f,0xfe2ce6e0,0xa3014314,0x4e0811a1,
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| 64 | 0xf7537e82,0xbd3af235,0x2ad7d2bb,0xeb86d391, 0 );
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| 65 |
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| 66 | sub R0 {
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| 67 | my ($i,$a,$b,$c,$d) = @_;
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| 68 | my $rot = (7,12,17,22)[$i%4];
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| 69 | my $j = ($i+1)/2;
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| 70 |
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| 71 | if ($i&1) {
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| 72 | $code.=<<___;
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| 73 | srlx @X[$j],$shr,@X[$j] ! align X[`$i+1`]
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| 74 | and $b,$t1,$t1 ! round $i
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| 75 | sllx @X[$j+1],$shl1,$tx
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| 76 | add $t2,$a,$a
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| 77 | sllx $tx,$shl2,$tx
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| 78 | xor $d,$t1,$t1
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| 79 | or $tx,@X[$j],@X[$j]
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| 80 | sethi %hi(@K[$i+1]),$t2
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| 81 | add $t1,$a,$a
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| 82 | or $t2,%lo(@K[$i+1]),$t2
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| 83 | sll $a,$rot,$t3
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| 84 | add @X[$j],$t2,$t2 ! X[`$i+1`]+K[`$i+1`]
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| 85 | srl $a,32-$rot,$a
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| 86 | add $b,$t3,$t3
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| 87 | xor $b,$c,$t1
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| 88 | add $t3,$a,$a
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| 89 | ___
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| 90 | } else {
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| 91 | $code.=<<___;
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| 92 | srlx @X[$j],32,$tx ! extract X[`2*$j+1`]
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| 93 | and $b,$t1,$t1 ! round $i
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| 94 | add $t2,$a,$a
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| 95 | xor $d,$t1,$t1
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| 96 | sethi %hi(@K[$i+1]),$t2
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| 97 | add $t1,$a,$a
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| 98 | or $t2,%lo(@K[$i+1]),$t2
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| 99 | sll $a,$rot,$t3
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| 100 | add $tx,$t2,$t2 ! X[`2*$j+1`]+K[`$i+1`]
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| 101 | srl $a,32-$rot,$a
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| 102 | add $b,$t3,$t3
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| 103 | xor $b,$c,$t1
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| 104 | add $t3,$a,$a
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| 105 | ___
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| 106 | }
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| 107 | }
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| 108 |
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| 109 | sub R0_1 {
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| 110 | my ($i,$a,$b,$c,$d) = @_;
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| 111 | my $rot = (7,12,17,22)[$i%4];
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| 112 |
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| 113 | $code.=<<___;
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| 114 | srlx @X[0],32,$tx ! extract X[1]
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| 115 | and $b,$t1,$t1 ! round $i
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| 116 | add $t2,$a,$a
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| 117 | xor $d,$t1,$t1
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| 118 | sethi %hi(@K[$i+1]),$t2
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| 119 | add $t1,$a,$a
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| 120 | or $t2,%lo(@K[$i+1]),$t2
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| 121 | sll $a,$rot,$t3
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| 122 | add $tx,$t2,$t2 ! X[1]+K[`$i+1`]
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| 123 | srl $a,32-$rot,$a
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| 124 | add $b,$t3,$t3
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| 125 | andn $b,$c,$t1
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| 126 | add $t3,$a,$a
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| 127 | ___
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| 128 | }
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| 129 |
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| 130 | sub R1 {
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| 131 | my ($i,$a,$b,$c,$d) = @_;
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| 132 | my $rot = (5,9,14,20)[$i%4];
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| 133 | my $j = $i<31 ? (1+5*($i+1))%16 : (5+3*($i+1))%16;
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| 134 | my $xi = @X[$j/2];
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| 135 |
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| 136 | $code.=<<___ if ($j&1 && ($xi=$tx));
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| 137 | srlx @X[$j/2],32,$xi ! extract X[$j]
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| 138 | ___
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| 139 | $code.=<<___;
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| 140 | and $b,$d,$t3 ! round $i
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| 141 | add $t2,$a,$a
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| 142 | or $t3,$t1,$t1
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| 143 | sethi %hi(@K[$i+1]),$t2
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| 144 | add $t1,$a,$a
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| 145 | or $t2,%lo(@K[$i+1]),$t2
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| 146 | sll $a,$rot,$t3
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| 147 | add $xi,$t2,$t2 ! X[$j]+K[`$i+1`]
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| 148 | srl $a,32-$rot,$a
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| 149 | add $b,$t3,$t3
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| 150 | `$i<31?"andn":"xor"` $b,$c,$t1
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| 151 | add $t3,$a,$a
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| 152 | ___
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| 153 | }
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| 154 |
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| 155 | sub R2 {
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| 156 | my ($i,$a,$b,$c,$d) = @_;
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| 157 | my $rot = (4,11,16,23)[$i%4];
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| 158 | my $j = $i<47 ? (5+3*($i+1))%16 : (0+7*($i+1))%16;
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| 159 | my $xi = @X[$j/2];
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| 160 |
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| 161 | $code.=<<___ if ($j&1 && ($xi=$tx));
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| 162 | srlx @X[$j/2],32,$xi ! extract X[$j]
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| 163 | ___
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| 164 | $code.=<<___;
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| 165 | add $t2,$a,$a ! round $i
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| 166 | xor $b,$t1,$t1
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| 167 | sethi %hi(@K[$i+1]),$t2
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| 168 | add $t1,$a,$a
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| 169 | or $t2,%lo(@K[$i+1]),$t2
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| 170 | sll $a,$rot,$t3
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| 171 | add $xi,$t2,$t2 ! X[$j]+K[`$i+1`]
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| 172 | srl $a,32-$rot,$a
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| 173 | add $b,$t3,$t3
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| 174 | xor $b,$c,$t1
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| 175 | add $t3,$a,$a
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| 176 | ___
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| 177 | }
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| 178 |
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| 179 | sub R3 {
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| 180 | my ($i,$a,$b,$c,$d) = @_;
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| 181 | my $rot = (6,10,15,21)[$i%4];
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| 182 | my $j = (0+7*($i+1))%16;
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| 183 | my $xi = @X[$j/2];
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| 184 |
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| 185 | $code.=<<___;
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| 186 | add $t2,$a,$a ! round $i
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| 187 | ___
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| 188 | $code.=<<___ if ($j&1 && ($xi=$tx));
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| 189 | srlx @X[$j/2],32,$xi ! extract X[$j]
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| 190 | ___
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| 191 | $code.=<<___;
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| 192 | orn $b,$d,$t1
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| 193 | sethi %hi(@K[$i+1]),$t2
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| 194 | xor $c,$t1,$t1
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| 195 | or $t2,%lo(@K[$i+1]),$t2
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| 196 | add $t1,$a,$a
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| 197 | sll $a,$rot,$t3
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| 198 | add $xi,$t2,$t2 ! X[$j]+K[`$i+1`]
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| 199 | srl $a,32-$rot,$a
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| 200 | add $b,$t3,$t3
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| 201 | add $t3,$a,$a
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| 202 | ___
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| 203 | }
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| 204 |
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| 205 | $code.=<<___;
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| 206 | #ifndef __ASSEMBLER__
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| 207 | # define __ASSEMBLER__ 1
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| 208 | #endif
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| 209 | #include "crypto/sparc_arch.h"
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| 210 |
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| 211 | #ifdef __arch64__
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| 212 | .register %g2,#scratch
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| 213 | .register %g3,#scratch
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| 214 | #endif
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| 215 |
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| 216 | .section ".text",#alloc,#execinstr
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| 217 |
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| 218 | #ifdef __PIC__
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| 219 | SPARC_PIC_THUNK(%g1)
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| 220 | #endif
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| 221 |
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| 222 | .globl ossl_md5_block_asm_data_order
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| 223 | .align 32
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| 224 | ossl_md5_block_asm_data_order:
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| 225 | SPARC_LOAD_ADDRESS_LEAF(OPENSSL_sparcv9cap_P,%g1,%g5)
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| 226 | ld [%g1+4],%g1 ! OPENSSL_sparcv9cap_P[1]
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| 227 |
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| 228 | andcc %g1, CFR_MD5, %g0
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| 229 | be .Lsoftware
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| 230 | nop
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| 231 |
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| 232 | mov 4, %g1
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| 233 | andcc %o1, 0x7, %g0
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| 234 | lda [%o0 + %g0]0x88, %f0 ! load context
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| 235 | lda [%o0 + %g1]0x88, %f1
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| 236 | add %o0, 8, %o0
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| 237 | lda [%o0 + %g0]0x88, %f2
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| 238 | lda [%o0 + %g1]0x88, %f3
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| 239 | bne,pn %icc, .Lhwunaligned
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| 240 | sub %o0, 8, %o0
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| 241 |
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| 242 | .Lhw_loop:
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| 243 | ldd [%o1 + 0x00], %f8
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| 244 | ldd [%o1 + 0x08], %f10
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| 245 | ldd [%o1 + 0x10], %f12
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| 246 | ldd [%o1 + 0x18], %f14
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| 247 | ldd [%o1 + 0x20], %f16
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| 248 | ldd [%o1 + 0x28], %f18
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| 249 | ldd [%o1 + 0x30], %f20
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| 250 | subcc %o2, 1, %o2 ! done yet?
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| 251 | ldd [%o1 + 0x38], %f22
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| 252 | add %o1, 0x40, %o1
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| 253 | prefetch [%o1 + 63], 20
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| 254 |
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| 255 | .word 0x81b02800 ! MD5
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| 256 |
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| 257 | bne,pt SIZE_T_CC, .Lhw_loop
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| 258 | nop
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| 259 |
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| 260 | .Lhwfinish:
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| 261 | sta %f0, [%o0 + %g0]0x88 ! store context
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| 262 | sta %f1, [%o0 + %g1]0x88
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| 263 | add %o0, 8, %o0
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| 264 | sta %f2, [%o0 + %g0]0x88
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| 265 | sta %f3, [%o0 + %g1]0x88
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| 266 | retl
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| 267 | nop
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| 268 |
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| 269 | .align 8
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| 270 | .Lhwunaligned:
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| 271 | alignaddr %o1, %g0, %o1
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| 272 |
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| 273 | ldd [%o1 + 0x00], %f10
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| 274 | .Lhwunaligned_loop:
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| 275 | ldd [%o1 + 0x08], %f12
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| 276 | ldd [%o1 + 0x10], %f14
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| 277 | ldd [%o1 + 0x18], %f16
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| 278 | ldd [%o1 + 0x20], %f18
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| 279 | ldd [%o1 + 0x28], %f20
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| 280 | ldd [%o1 + 0x30], %f22
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| 281 | ldd [%o1 + 0x38], %f24
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| 282 | subcc %o2, 1, %o2 ! done yet?
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| 283 | ldd [%o1 + 0x40], %f26
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| 284 | add %o1, 0x40, %o1
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| 285 | prefetch [%o1 + 63], 20
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| 286 |
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| 287 | faligndata %f10, %f12, %f8
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| 288 | faligndata %f12, %f14, %f10
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| 289 | faligndata %f14, %f16, %f12
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| 290 | faligndata %f16, %f18, %f14
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| 291 | faligndata %f18, %f20, %f16
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| 292 | faligndata %f20, %f22, %f18
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| 293 | faligndata %f22, %f24, %f20
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| 294 | faligndata %f24, %f26, %f22
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| 295 |
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| 296 | .word 0x81b02800 ! MD5
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| 297 |
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| 298 | bne,pt SIZE_T_CC, .Lhwunaligned_loop
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| 299 | for %f26, %f26, %f10 ! %f10=%f26
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| 300 |
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| 301 | ba .Lhwfinish
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| 302 | nop
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| 303 |
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| 304 | .align 16
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| 305 | .Lsoftware:
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| 306 | save %sp,-STACK_FRAME,%sp
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| 307 |
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| 308 | rd %asi,$saved_asi
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| 309 | wr %g0,0x88,%asi ! ASI_PRIMARY_LITTLE
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| 310 | and $inp,7,$shr
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| 311 | andn $inp,7,$inp
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| 312 |
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| 313 | sll $shr,3,$shr ! *=8
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| 314 | mov 56,$shl2
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| 315 | ld [$ctx+0],$A
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| 316 | sub $shl2,$shr,$shl2
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| 317 | ld [$ctx+4],$B
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| 318 | and $shl2,32,$shl1
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| 319 | add $shl2,8,$shl2
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| 320 | ld [$ctx+8],$C
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| 321 | sub $shl2,$shl1,$shl2 ! shr+shl1+shl2==64
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| 322 | ld [$ctx+12],$D
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| 323 | nop
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| 324 |
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| 325 | .Loop:
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| 326 | cmp $shr,0 ! was inp aligned?
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| 327 | ldxa [$inp+0]%asi,@X[0] ! load little-endian input
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| 328 | ldxa [$inp+8]%asi,@X[1]
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| 329 | ldxa [$inp+16]%asi,@X[2]
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| 330 | ldxa [$inp+24]%asi,@X[3]
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| 331 | ldxa [$inp+32]%asi,@X[4]
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| 332 | sllx $A,32,$AB ! pack A,B
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| 333 | ldxa [$inp+40]%asi,@X[5]
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| 334 | sllx $C,32,$CD ! pack C,D
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| 335 | ldxa [$inp+48]%asi,@X[6]
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| 336 | or $B,$AB,$AB
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| 337 | ldxa [$inp+56]%asi,@X[7]
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| 338 | or $D,$CD,$CD
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| 339 | bnz,a,pn %icc,.+8
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| 340 | ldxa [$inp+64]%asi,@X[8]
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| 341 |
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| 342 | srlx @X[0],$shr,@X[0] ! align X[0]
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| 343 | sllx @X[1],$shl1,$tx
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| 344 | sethi %hi(@K[0]),$t2
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| 345 | sllx $tx,$shl2,$tx
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| 346 | or $t2,%lo(@K[0]),$t2
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| 347 | or $tx,@X[0],@X[0]
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| 348 | xor $C,$D,$t1
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| 349 | add @X[0],$t2,$t2 ! X[0]+K[0]
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| 350 | ___
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| 351 | for ($i=0;$i<15;$i++) { &R0($i,@V); unshift(@V,pop(@V)); }
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| 352 | for (;$i<16;$i++) { &R0_1($i,@V); unshift(@V,pop(@V)); }
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| 353 | for (;$i<32;$i++) { &R1($i,@V); unshift(@V,pop(@V)); }
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| 354 | for (;$i<48;$i++) { &R2($i,@V); unshift(@V,pop(@V)); }
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| 355 | for (;$i<64;$i++) { &R3($i,@V); unshift(@V,pop(@V)); }
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| 356 | $code.=<<___;
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| 357 | srlx $AB,32,$t1 ! unpack A,B,C,D and accumulate
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| 358 | add $inp,64,$inp ! advance inp
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| 359 | srlx $CD,32,$t2
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| 360 | add $t1,$A,$A
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| 361 | subcc $len,1,$len ! done yet?
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| 362 | add $AB,$B,$B
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| 363 | add $t2,$C,$C
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| 364 | add $CD,$D,$D
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| 365 | srl $B,0,$B ! clruw $B
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| 366 | bne SIZE_T_CC,.Loop
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| 367 | srl $D,0,$D ! clruw $D
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| 368 |
|
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| 369 | st $A,[$ctx+0] ! write out ctx
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| 370 | st $B,[$ctx+4]
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| 371 | st $C,[$ctx+8]
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| 372 | st $D,[$ctx+12]
|
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| 373 |
|
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| 374 | wr %g0,$saved_asi,%asi
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|---|
| 375 | ret
|
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| 376 | restore
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| 377 | .type ossl_md5_block_asm_data_order,#function
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| 378 | .size ossl_md5_block_asm_data_order,(.-ossl_md5_block_asm_data_order)
|
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| 379 |
|
|---|
| 380 | .asciz "MD5 block transform for SPARCv9, CRYPTOGAMS by <appro\@openssl.org>"
|
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| 381 | .align 4
|
|---|
| 382 | ___
|
|---|
| 383 |
|
|---|
| 384 | # Purpose of these subroutines is to explicitly encode VIS instructions,
|
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| 385 | # so that one can compile the module without having to specify VIS
|
|---|
| 386 | # extensions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
|
|---|
| 387 | # Idea is to reserve for option to produce "universal" binary and let
|
|---|
| 388 | # programmer detect if current CPU is VIS capable at run-time.
|
|---|
| 389 | sub unvis {
|
|---|
| 390 | my ($mnemonic,$rs1,$rs2,$rd)=@_;
|
|---|
| 391 | my $ref,$opf;
|
|---|
| 392 | my %visopf = ( "faligndata" => 0x048,
|
|---|
| 393 | "for" => 0x07c );
|
|---|
| 394 |
|
|---|
| 395 | $ref = "$mnemonic\t$rs1,$rs2,$rd";
|
|---|
| 396 |
|
|---|
| 397 | if ($opf=$visopf{$mnemonic}) {
|
|---|
| 398 | foreach ($rs1,$rs2,$rd) {
|
|---|
| 399 | return $ref if (!/%f([0-9]{1,2})/);
|
|---|
| 400 | $_=$1;
|
|---|
| 401 | if ($1>=32) {
|
|---|
| 402 | return $ref if ($1&1);
|
|---|
| 403 | # re-encode for upper double register addressing
|
|---|
| 404 | $_=($1|$1>>5)&31;
|
|---|
| 405 | }
|
|---|
| 406 | }
|
|---|
| 407 |
|
|---|
| 408 | return sprintf ".word\t0x%08x !%s",
|
|---|
| 409 | 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
|
|---|
| 410 | $ref;
|
|---|
| 411 | } else {
|
|---|
| 412 | return $ref;
|
|---|
| 413 | }
|
|---|
| 414 | }
|
|---|
| 415 | sub unalignaddr {
|
|---|
| 416 | my ($mnemonic,$rs1,$rs2,$rd)=@_;
|
|---|
| 417 | my %bias = ( "g" => 0, "o" => 8, "l" => 16, "i" => 24 );
|
|---|
| 418 | my $ref="$mnemonic\t$rs1,$rs2,$rd";
|
|---|
| 419 |
|
|---|
| 420 | foreach ($rs1,$rs2,$rd) {
|
|---|
| 421 | if (/%([goli])([0-7])/) { $_=$bias{$1}+$2; }
|
|---|
| 422 | else { return $ref; }
|
|---|
| 423 | }
|
|---|
| 424 | return sprintf ".word\t0x%08x !%s",
|
|---|
| 425 | 0x81b00300|$rd<<25|$rs1<<14|$rs2,
|
|---|
| 426 | $ref;
|
|---|
| 427 | }
|
|---|
| 428 |
|
|---|
| 429 | foreach (split("\n",$code)) {
|
|---|
| 430 | s/\`([^\`]*)\`/eval $1/ge;
|
|---|
| 431 |
|
|---|
| 432 | s/\b(f[^\s]*)\s+(%f[0-9]{1,2}),\s*(%f[0-9]{1,2}),\s*(%f[0-9]{1,2})/
|
|---|
| 433 | &unvis($1,$2,$3,$4)
|
|---|
| 434 | /ge;
|
|---|
| 435 | s/\b(alignaddr)\s+(%[goli][0-7]),\s*(%[goli][0-7]),\s*(%[goli][0-7])/
|
|---|
| 436 | &unalignaddr($1,$2,$3,$4)
|
|---|
| 437 | /ge;
|
|---|
| 438 |
|
|---|
| 439 | print $_,"\n";
|
|---|
| 440 | }
|
|---|
| 441 |
|
|---|
| 442 | close STDOUT or die "error closing STDOUT: $!";
|
|---|
