1 | %ifidn __OUTPUT_FORMAT__,obj
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2 | section code use32 class=code align=64
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3 | %elifidn __OUTPUT_FORMAT__,win32
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4 | section .text code align=64
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5 | %else
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6 | section .text code
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7 | %endif
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8 | align 16
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9 | __mul_1x1_mmx:
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10 | sub esp,36
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11 | mov ecx,eax
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12 | lea edx,[eax*1+eax]
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13 | and ecx,1073741823
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14 | lea ebp,[edx*1+edx]
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15 | mov DWORD [esp],0
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16 | and edx,2147483647
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17 | movd mm2,eax
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18 | movd mm3,ebx
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19 | mov DWORD [4+esp],ecx
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20 | xor ecx,edx
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21 | pxor mm5,mm5
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22 | pxor mm4,mm4
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23 | mov DWORD [8+esp],edx
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24 | xor edx,ebp
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25 | mov DWORD [12+esp],ecx
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26 | pcmpgtd mm5,mm2
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27 | paddd mm2,mm2
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28 | xor ecx,edx
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29 | mov DWORD [16+esp],ebp
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30 | xor ebp,edx
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31 | pand mm5,mm3
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32 | pcmpgtd mm4,mm2
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33 | mov DWORD [20+esp],ecx
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34 | xor ebp,ecx
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35 | psllq mm5,31
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36 | pand mm4,mm3
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37 | mov DWORD [24+esp],edx
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38 | mov esi,7
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39 | mov DWORD [28+esp],ebp
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40 | mov ebp,esi
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41 | and esi,ebx
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42 | shr ebx,3
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43 | mov edi,ebp
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44 | psllq mm4,30
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45 | and edi,ebx
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46 | shr ebx,3
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47 | movd mm0,DWORD [esi*4+esp]
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48 | mov esi,ebp
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49 | and esi,ebx
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50 | shr ebx,3
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51 | movd mm2,DWORD [edi*4+esp]
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52 | mov edi,ebp
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53 | psllq mm2,3
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54 | and edi,ebx
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55 | shr ebx,3
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56 | pxor mm0,mm2
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57 | movd mm1,DWORD [esi*4+esp]
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58 | mov esi,ebp
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59 | psllq mm1,6
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60 | and esi,ebx
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61 | shr ebx,3
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62 | pxor mm0,mm1
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63 | movd mm2,DWORD [edi*4+esp]
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64 | mov edi,ebp
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65 | psllq mm2,9
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66 | and edi,ebx
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67 | shr ebx,3
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68 | pxor mm0,mm2
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69 | movd mm1,DWORD [esi*4+esp]
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70 | mov esi,ebp
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71 | psllq mm1,12
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72 | and esi,ebx
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73 | shr ebx,3
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74 | pxor mm0,mm1
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75 | movd mm2,DWORD [edi*4+esp]
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76 | mov edi,ebp
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77 | psllq mm2,15
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78 | and edi,ebx
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79 | shr ebx,3
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80 | pxor mm0,mm2
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81 | movd mm1,DWORD [esi*4+esp]
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82 | mov esi,ebp
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83 | psllq mm1,18
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84 | and esi,ebx
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85 | shr ebx,3
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86 | pxor mm0,mm1
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87 | movd mm2,DWORD [edi*4+esp]
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88 | mov edi,ebp
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89 | psllq mm2,21
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90 | and edi,ebx
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91 | shr ebx,3
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92 | pxor mm0,mm2
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93 | movd mm1,DWORD [esi*4+esp]
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94 | mov esi,ebp
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95 | psllq mm1,24
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96 | and esi,ebx
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97 | shr ebx,3
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98 | pxor mm0,mm1
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99 | movd mm2,DWORD [edi*4+esp]
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100 | pxor mm0,mm4
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101 | psllq mm2,27
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102 | pxor mm0,mm2
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103 | movd mm1,DWORD [esi*4+esp]
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104 | pxor mm0,mm5
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105 | psllq mm1,30
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106 | add esp,36
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107 | pxor mm0,mm1
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108 | ret
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109 | align 16
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110 | __mul_1x1_ialu:
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111 | sub esp,36
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112 | mov ecx,eax
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113 | lea edx,[eax*1+eax]
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114 | lea ebp,[eax*4]
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115 | and ecx,1073741823
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116 | lea edi,[eax*1+eax]
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117 | sar eax,31
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118 | mov DWORD [esp],0
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119 | and edx,2147483647
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120 | mov DWORD [4+esp],ecx
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121 | xor ecx,edx
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122 | mov DWORD [8+esp],edx
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123 | xor edx,ebp
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124 | mov DWORD [12+esp],ecx
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125 | xor ecx,edx
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126 | mov DWORD [16+esp],ebp
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127 | xor ebp,edx
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128 | mov DWORD [20+esp],ecx
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129 | xor ebp,ecx
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130 | sar edi,31
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131 | and eax,ebx
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132 | mov DWORD [24+esp],edx
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133 | and edi,ebx
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134 | mov DWORD [28+esp],ebp
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135 | mov edx,eax
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136 | shl eax,31
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137 | mov ecx,edi
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138 | shr edx,1
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139 | mov esi,7
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140 | shl edi,30
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141 | and esi,ebx
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142 | shr ecx,2
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143 | xor eax,edi
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144 | shr ebx,3
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145 | mov edi,7
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146 | and edi,ebx
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147 | shr ebx,3
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148 | xor edx,ecx
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149 | xor eax,DWORD [esi*4+esp]
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150 | mov esi,7
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151 | and esi,ebx
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152 | shr ebx,3
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153 | mov ebp,DWORD [edi*4+esp]
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154 | mov edi,7
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155 | mov ecx,ebp
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156 | shl ebp,3
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157 | and edi,ebx
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158 | shr ecx,29
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159 | xor eax,ebp
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160 | shr ebx,3
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161 | xor edx,ecx
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162 | mov ecx,DWORD [esi*4+esp]
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163 | mov esi,7
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164 | mov ebp,ecx
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165 | shl ecx,6
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166 | and esi,ebx
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167 | shr ebp,26
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168 | xor eax,ecx
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169 | shr ebx,3
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170 | xor edx,ebp
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171 | mov ebp,DWORD [edi*4+esp]
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172 | mov edi,7
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173 | mov ecx,ebp
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174 | shl ebp,9
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175 | and edi,ebx
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176 | shr ecx,23
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177 | xor eax,ebp
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178 | shr ebx,3
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179 | xor edx,ecx
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180 | mov ecx,DWORD [esi*4+esp]
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181 | mov esi,7
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182 | mov ebp,ecx
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183 | shl ecx,12
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184 | and esi,ebx
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185 | shr ebp,20
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186 | xor eax,ecx
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187 | shr ebx,3
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188 | xor edx,ebp
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189 | mov ebp,DWORD [edi*4+esp]
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190 | mov edi,7
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191 | mov ecx,ebp
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192 | shl ebp,15
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193 | and edi,ebx
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194 | shr ecx,17
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195 | xor eax,ebp
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196 | shr ebx,3
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197 | xor edx,ecx
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198 | mov ecx,DWORD [esi*4+esp]
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199 | mov esi,7
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200 | mov ebp,ecx
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201 | shl ecx,18
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202 | and esi,ebx
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203 | shr ebp,14
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204 | xor eax,ecx
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205 | shr ebx,3
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206 | xor edx,ebp
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207 | mov ebp,DWORD [edi*4+esp]
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208 | mov edi,7
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209 | mov ecx,ebp
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210 | shl ebp,21
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211 | and edi,ebx
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212 | shr ecx,11
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213 | xor eax,ebp
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214 | shr ebx,3
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215 | xor edx,ecx
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216 | mov ecx,DWORD [esi*4+esp]
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217 | mov esi,7
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218 | mov ebp,ecx
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219 | shl ecx,24
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220 | and esi,ebx
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221 | shr ebp,8
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222 | xor eax,ecx
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223 | shr ebx,3
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224 | xor edx,ebp
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225 | mov ebp,DWORD [edi*4+esp]
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226 | mov ecx,ebp
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227 | shl ebp,27
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228 | mov edi,DWORD [esi*4+esp]
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229 | shr ecx,5
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230 | mov esi,edi
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231 | xor eax,ebp
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232 | shl edi,30
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233 | xor edx,ecx
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234 | shr esi,2
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235 | xor eax,edi
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236 | xor edx,esi
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237 | add esp,36
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238 | ret
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239 | global _bn_GF2m_mul_2x2
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240 | align 16
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241 | _bn_GF2m_mul_2x2:
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242 | L$_bn_GF2m_mul_2x2_begin:
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243 | lea edx,[_OPENSSL_ia32cap_P]
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244 | mov eax,DWORD [edx]
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245 | mov edx,DWORD [4+edx]
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246 | test eax,8388608
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247 | jz NEAR L$000ialu
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248 | push ebp
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249 | push ebx
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250 | push esi
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251 | push edi
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252 | mov eax,DWORD [24+esp]
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253 | mov ebx,DWORD [32+esp]
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254 | call __mul_1x1_mmx
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255 | movq mm7,mm0
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256 | mov eax,DWORD [28+esp]
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257 | mov ebx,DWORD [36+esp]
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258 | call __mul_1x1_mmx
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259 | movq mm6,mm0
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260 | mov eax,DWORD [24+esp]
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261 | mov ebx,DWORD [32+esp]
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262 | xor eax,DWORD [28+esp]
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263 | xor ebx,DWORD [36+esp]
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264 | call __mul_1x1_mmx
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265 | pxor mm0,mm7
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266 | mov eax,DWORD [20+esp]
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267 | pxor mm0,mm6
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268 | movq mm2,mm0
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269 | psllq mm0,32
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270 | pop edi
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271 | psrlq mm2,32
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272 | pop esi
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273 | pxor mm0,mm6
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274 | pop ebx
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275 | pxor mm2,mm7
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276 | movq [eax],mm0
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277 | pop ebp
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278 | movq [8+eax],mm2
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279 | emms
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280 | ret
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281 | align 16
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282 | L$000ialu:
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283 | push ebp
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284 | push ebx
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285 | push esi
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286 | push edi
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287 | sub esp,20
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288 | mov eax,DWORD [44+esp]
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289 | mov ebx,DWORD [52+esp]
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290 | call __mul_1x1_ialu
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291 | mov DWORD [8+esp],eax
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292 | mov DWORD [12+esp],edx
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293 | mov eax,DWORD [48+esp]
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294 | mov ebx,DWORD [56+esp]
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295 | call __mul_1x1_ialu
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296 | mov DWORD [esp],eax
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297 | mov DWORD [4+esp],edx
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298 | mov eax,DWORD [44+esp]
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299 | mov ebx,DWORD [52+esp]
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300 | xor eax,DWORD [48+esp]
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301 | xor ebx,DWORD [56+esp]
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302 | call __mul_1x1_ialu
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303 | mov ebp,DWORD [40+esp]
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304 | mov ebx,DWORD [esp]
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305 | mov ecx,DWORD [4+esp]
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306 | mov edi,DWORD [8+esp]
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307 | mov esi,DWORD [12+esp]
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308 | xor eax,edx
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309 | xor edx,ecx
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310 | xor eax,ebx
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311 | mov DWORD [ebp],ebx
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312 | xor edx,edi
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313 | mov DWORD [12+ebp],esi
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314 | xor eax,esi
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315 | add esp,20
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316 | xor edx,esi
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317 | pop edi
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318 | xor eax,edx
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319 | pop esi
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320 | mov DWORD [8+ebp],edx
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321 | pop ebx
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322 | mov DWORD [4+ebp],eax
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323 | pop ebp
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324 | ret
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325 | db 71,70,40,50,94,109,41,32,77,117,108,116,105,112,108,105
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326 | db 99,97,116,105,111,110,32,102,111,114,32,120,56,54,44,32
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327 | db 67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97
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328 | db 112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103
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329 | db 62,0
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330 | segment .bss
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331 | common _OPENSSL_ia32cap_P 16
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