sha512-c64xplus.pl@ 101211

Last change on this file since 101211 was 101211, checked in by vboxsync, 17 months ago
openssl-3.1.3: Applied and adjusted our OpenSSL changes to 3.1.2. bugref:10527
File size: 13.2 KB

Line
1	#! /usr/bin/env perl
2	# Copyright 2012-2020 The OpenSSL Project Authors. All Rights Reserved.
3	#
4	# Licensed under the Apache License 2.0 (the "License"). You may not use
5	# this file except in compliance with the License. You can obtain a copy
6	# in the file LICENSE in the source distribution or at
7	# https://www.openssl.org/source/license.html
8
9	#
10	# ====================================================================
11	# Written by Andy Polyakov <[email protected]> for the OpenSSL
12	# project. The module is, however, dual licensed under OpenSSL and
13	# CRYPTOGAMS licenses depending on where you obtain it. For further
14	# details see http://www.openssl.org/~appro/cryptogams/.
15	# ====================================================================
16	#
17	# SHA512 for C64x+.
18	#
19	# January 2012
20	#
21	# Performance is 19 cycles per processed byte. Compared to block
22	# transform function from sha512.c compiled with cl6x with -mv6400+
23	# -o2 -DOPENSSL_SMALL_FOOTPRINT it's almost 7x faster and 2x smaller.
24	# Loop unroll won't make it, this implementation, any faster, because
25	# it's effectively dominated by SHRU\|\|SHL pairs and you can't schedule
26	# more of them.
27	#
28	# !!! Note that this module uses AMR, which means that all interrupt
29	# service routines are expected to preserve it and for own well-being
30	# zero it upon entry.
31
32	($output = pop) =~ m\|\.\w+$\| and open STDOUT,">$output";
33
34	($CTXA,$INP,$NUM) = ("A4","B4","A6"); # arguments
35	$K512="A3";
36
37	($Ahi,$Actxhi,$Bhi,$Bctxhi,$Chi,$Cctxhi,$Dhi,$Dctxhi,
38	$Ehi,$Ectxhi,$Fhi,$Fctxhi,$Ghi,$Gctxhi,$Hhi,$Hctxhi)=map("A$_",(16..31));
39	($Alo,$Actxlo,$Blo,$Bctxlo,$Clo,$Cctxlo,$Dlo,$Dctxlo,
40	$Elo,$Ectxlo,$Flo,$Fctxlo,$Glo,$Gctxlo,$Hlo,$Hctxlo)=map("B$_",(16..31));
41
42	($S1hi,$CHhi,$S0hi,$t0hi)=map("A$_",(10..13));
43	($S1lo,$CHlo,$S0lo,$t0lo)=map("B$_",(10..13));
44	($T1hi, $T2hi)= ("A6","A7");
45	($T1lo,$T1carry,$T2lo,$T2carry)=("B6","B7","B8","B9");
46	($Khi,$Klo)=("A9","A8");
47	($MAJhi,$MAJlo)=($T2hi,$T2lo);
48	($t1hi,$t1lo)=($Khi,"B2");
49	$CTXB=$t1lo;
50
51	($Xihi,$Xilo)=("A5","B5"); # circular/ring buffer
52
53	$code.=<<___;
54	.text
55
56	.if .ASSEMBLER_VERSION<7000000
57	.asg 0,__TI_EABI__
58	.endif
59	.if __TI_EABI__
60	.nocmp
61	.asg sha512_block_data_order,_sha512_block_data_order
62	.endif
63
64	.asg B3,RA
65	.asg A15,FP
66	.asg B15,SP
67
68	.if .BIG_ENDIAN
69	.asg $Khi,KHI
70	.asg $Klo,KLO
71	.else
72	.asg $Khi,KLO
73	.asg $Klo,KHI
74	.endif
75
76	.global _sha512_block_data_order
77	_sha512_block_data_order:
78	__sha512_block:
79	.asmfunc stack_usage(40+128)
80	MV $NUM,A0 ; reassign $NUM
81	\|\| MVK -128,B0
82	[!A0] BNOP RA ; if ($NUM==0) return;
83	\|\| [A0] STW FP,*SP--(40) ; save frame pointer
84	\|\| [A0] MV SP,FP
85	[A0] STDW B13:B12,*SP[4]
86	\|\| [A0] MVK 0x00404,B1
87	[A0] STDW B11:B10,*SP[3]
88	\|\| [A0] STDW A13:A12,*FP[-3]
89	\|\| [A0] MVKH 0x60000,B1
90	[A0] STDW A11:A10,*SP[1]
91	\|\| [A0] MVC B1,AMR ; setup circular addressing
92	\|\| [A0] ADD B0,SP,SP ; alloca(128)
93	.if __TI_EABI__
94	[A0] AND B0,SP,SP ; align stack at 128 bytes
95	\|\| [A0] ADDKPC __sha512_block,B1
96	\|\| [A0] MVKL \$PCR_OFFSET(K512,__sha512_block),$K512
97	[A0] MVKH \$PCR_OFFSET(K512,__sha512_block),$K512
98	\|\| [A0] SUBAW SP,2,SP ; reserve two words above buffer
99	.else
100	[A0] AND B0,SP,SP ; align stack at 128 bytes
101	\|\| [A0] ADDKPC __sha512_block,B1
102	\|\| [A0] MVKL (K512-__sha512_block),$K512
103	[A0] MVKH (K512-__sha512_block),$K512
104	\|\| [A0] SUBAW SP,2,SP ; reserve two words above buffer
105	.endif
106	ADDAW SP,3,$Xilo
107	ADDAW SP,2,$Xihi
108
109	\|\| MV $CTXA,$CTXB
110	LDW *${CTXA}[0^.LITTLE_ENDIAN],$Ahi ; load ctx
111	\|\| LDW *${CTXB}[1^.LITTLE_ENDIAN],$Alo
112	\|\| ADD B1,$K512,$K512
113	LDW *${CTXA}[2^.LITTLE_ENDIAN],$Bhi
114	\|\| LDW *${CTXB}[3^.LITTLE_ENDIAN],$Blo
115	LDW *${CTXA}[4^.LITTLE_ENDIAN],$Chi
116	\|\| LDW *${CTXB}[5^.LITTLE_ENDIAN],$Clo
117	LDW *${CTXA}[6^.LITTLE_ENDIAN],$Dhi
118	\|\| LDW *${CTXB}[7^.LITTLE_ENDIAN],$Dlo
119	LDW *${CTXA}[8^.LITTLE_ENDIAN],$Ehi
120	\|\| LDW *${CTXB}[9^.LITTLE_ENDIAN],$Elo
121	LDW *${CTXA}[10^.LITTLE_ENDIAN],$Fhi
122	\|\| LDW *${CTXB}[11^.LITTLE_ENDIAN],$Flo
123	LDW *${CTXA}[12^.LITTLE_ENDIAN],$Ghi
124	\|\| LDW *${CTXB}[13^.LITTLE_ENDIAN],$Glo
125	LDW *${CTXA}[14^.LITTLE_ENDIAN],$Hhi
126	\|\| LDW *${CTXB}[15^.LITTLE_ENDIAN],$Hlo
127
128	LDNDW *$INP++,B11:B10 ; pre-fetch input
129	LDDW *$K512++,$Khi:$Klo ; pre-fetch K512[0]
130	outerloop?:
131	MVK 15,B0 ; loop counters
132	\|\| MVK 64,B1
133	\|\| SUB A0,1,A0
134	MV $Ahi,$Actxhi
135	\|\| MV $Alo,$Actxlo
136	\|\| MV $Bhi,$Bctxhi
137	\|\| MV $Blo,$Bctxlo
138	\|\| MV $Chi,$Cctxhi
139	\|\| MV $Clo,$Cctxlo
140	\|\| MVD $Dhi,$Dctxhi
141	\|\| MVD $Dlo,$Dctxlo
142	MV $Ehi,$Ectxhi
143	\|\| MV $Elo,$Ectxlo
144	\|\| MV $Fhi,$Fctxhi
145	\|\| MV $Flo,$Fctxlo
146	\|\| MV $Ghi,$Gctxhi
147	\|\| MV $Glo,$Gctxlo
148	\|\| MVD $Hhi,$Hctxhi
149	\|\| MVD $Hlo,$Hctxlo
150	loop0_15?:
151	.if .BIG_ENDIAN
152	MV B11,$T1hi
153	\|\| MV B10,$T1lo
154	.else
155	SWAP4 B10,$T1hi
156	\|\| SWAP4 B11,$T1lo
157	SWAP2 $T1hi,$T1hi
158	\|\| SWAP2 $T1lo,$T1lo
159	.endif
160	loop16_79?:
161	STW $T1hi,*$Xihi++[2]
162	\|\| STW $T1lo,*$Xilo++[2] ; X[i] = T1
163	\|\| ADD $Hhi,$T1hi,$T1hi
164	\|\| ADDU $Hlo,$T1lo,$T1carry:$T1lo ; T1 += h
165	\|\| SHRU $Ehi,14,$S1hi
166	\|\| SHL $Ehi,32-14,$S1lo
167	XOR $Fhi,$Ghi,$CHhi
168	\|\| XOR $Flo,$Glo,$CHlo
169	\|\| ADD KHI,$T1hi,$T1hi
170	\|\| ADDU KLO,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += K512[i]
171	\|\| SHRU $Elo,14,$t0lo
172	\|\| SHL $Elo,32-14,$t0hi
173	XOR $t0hi,$S1hi,$S1hi
174	\|\| XOR $t0lo,$S1lo,$S1lo
175	\|\| AND $Ehi,$CHhi,$CHhi
176	\|\| AND $Elo,$CHlo,$CHlo
177	\|\| ROTL $Ghi,0,$Hhi
178	\|\| ROTL $Glo,0,$Hlo ; h = g
179	\|\| SHRU $Ehi,18,$t0hi
180	\|\| SHL $Ehi,32-18,$t0lo
181	XOR $t0hi,$S1hi,$S1hi
182	\|\| XOR $t0lo,$S1lo,$S1lo
183	\|\| XOR $Ghi,$CHhi,$CHhi
184	\|\| XOR $Glo,$CHlo,$CHlo ; Ch(e,f,g) = ((f^g)&e)^g
185	\|\| ROTL $Fhi,0,$Ghi
186	\|\| ROTL $Flo,0,$Glo ; g = f
187	\|\| SHRU $Elo,18,$t0lo
188	\|\| SHL $Elo,32-18,$t0hi
189	XOR $t0hi,$S1hi,$S1hi
190	\|\| XOR $t0lo,$S1lo,$S1lo
191	\|\| OR $Ahi,$Bhi,$MAJhi
192	\|\| OR $Alo,$Blo,$MAJlo
193	\|\| ROTL $Ehi,0,$Fhi
194	\|\| ROTL $Elo,0,$Flo ; f = e
195	\|\| SHRU $Ehi,41-32,$t0lo
196	\|\| SHL $Ehi,64-41,$t0hi
197	XOR $t0hi,$S1hi,$S1hi
198	\|\| XOR $t0lo,$S1lo,$S1lo
199	\|\| AND $Chi,$MAJhi,$MAJhi
200	\|\| AND $Clo,$MAJlo,$MAJlo
201	\|\| ROTL $Dhi,0,$Ehi
202	\|\| ROTL $Dlo,0,$Elo ; e = d
203	\|\| SHRU $Elo,41-32,$t0hi
204	\|\| SHL $Elo,64-41,$t0lo
205	XOR $t0hi,$S1hi,$S1hi
206	\|\| XOR $t0lo,$S1lo,$S1lo ; Sigma1(e)
207	\|\| AND $Ahi,$Bhi,$t1hi
208	\|\| AND $Alo,$Blo,$t1lo
209	\|\| ROTL $Chi,0,$Dhi
210	\|\| ROTL $Clo,0,$Dlo ; d = c
211	\|\| SHRU $Ahi,28,$S0hi
212	\|\| SHL $Ahi,32-28,$S0lo
213	OR $t1hi,$MAJhi,$MAJhi
214	\|\| OR $t1lo,$MAJlo,$MAJlo ; Maj(a,b,c) = ((a\|b)&c)\|(a&b)
215	\|\| ADD $CHhi,$T1hi,$T1hi
216	\|\| ADDU $CHlo,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += Ch(e,f,g)
217	\|\| ROTL $Bhi,0,$Chi
218	\|\| ROTL $Blo,0,$Clo ; c = b
219	\|\| SHRU $Alo,28,$t0lo
220	\|\| SHL $Alo,32-28,$t0hi
221	XOR $t0hi,$S0hi,$S0hi
222	\|\| XOR $t0lo,$S0lo,$S0lo
223	\|\| ADD $S1hi,$T1hi,$T1hi
224	\|\| ADDU $S1lo,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += Sigma1(e)
225	\|\| ROTL $Ahi,0,$Bhi
226	\|\| ROTL $Alo,0,$Blo ; b = a
227	\|\| SHRU $Ahi,34-32,$t0lo
228	\|\| SHL $Ahi,64-34,$t0hi
229	XOR $t0hi,$S0hi,$S0hi
230	\|\| XOR $t0lo,$S0lo,$S0lo
231	\|\| ADD $MAJhi,$T1hi,$T2hi
232	\|\| ADDU $MAJlo,$T1carry:$T1lo,$T2carry:$T2lo ; T2 = T1+Maj(a,b,c)
233	\|\| SHRU $Alo,34-32,$t0hi
234	\|\| SHL $Alo,64-34,$t0lo
235	XOR $t0hi,$S0hi,$S0hi
236	\|\| XOR $t0lo,$S0lo,$S0lo
237	\|\| ADD $Ehi,$T1hi,$T1hi
238	\|\| ADDU $Elo,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += e
239	\|\| [B0] BNOP loop0_15?
240	\|\| SHRU $Ahi,39-32,$t0lo
241	\|\| SHL $Ahi,64-39,$t0hi
242	XOR $t0hi,$S0hi,$S0hi
243	\|\| XOR $t0lo,$S0lo,$S0lo
244	\|\| [B0] LDNDW *$INP++,B11:B10 ; pre-fetch input
245	\|\|[!B1] BNOP break?
246	\|\| SHRU $Alo,39-32,$t0hi
247	\|\| SHL $Alo,64-39,$t0lo
248	XOR $t0hi,$S0hi,$S0hi
249	\|\| XOR $t0lo,$S0lo,$S0lo ; Sigma0(a)
250	\|\| ADD $T1carry,$T1hi,$Ehi
251	\|\| MV $T1lo,$Elo ; e = T1
252	\|\|[!B0] LDW *${Xihi}[28],$T1hi
253	\|\|[!B0] LDW *${Xilo}[28],$T1lo ; X[i+14]
254	ADD $S0hi,$T2hi,$T2hi
255	\|\| ADDU $S0lo,$T2carry:$T2lo,$T2carry:$T2lo ; T2 += Sigma0(a)
256	\|\| [B1] LDDW *$K512++,$Khi:$Klo ; pre-fetch K512[i]
257	NOP ; avoid cross-path stall
258	ADD $T2carry,$T2hi,$Ahi
259	\|\| MV $T2lo,$Alo ; a = T2
260	\|\| [B0] SUB B0,1,B0
261	;;===== branch to loop00_15? is taken here
262	NOP
263	;;===== branch to break? is taken here
264	LDW *${Xihi}[2],$T2hi
265	\|\| LDW *${Xilo}[2],$T2lo ; X[i+1]
266	\|\| SHRU $T1hi,19,$S1hi
267	\|\| SHL $T1hi,32-19,$S1lo
268	SHRU $T1lo,19,$t0lo
269	\|\| SHL $T1lo,32-19,$t0hi
270	XOR $t0hi,$S1hi,$S1hi
271	\|\| XOR $t0lo,$S1lo,$S1lo
272	\|\| SHRU $T1hi,61-32,$t0lo
273	\|\| SHL $T1hi,64-61,$t0hi
274	XOR $t0hi,$S1hi,$S1hi
275	\|\| XOR $t0lo,$S1lo,$S1lo
276	\|\| SHRU $T1lo,61-32,$t0hi
277	\|\| SHL $T1lo,64-61,$t0lo
278	XOR $t0hi,$S1hi,$S1hi
279	\|\| XOR $t0lo,$S1lo,$S1lo
280	\|\| SHRU $T1hi,6,$t0hi
281	\|\| SHL $T1hi,32-6,$t0lo
282	XOR $t0hi,$S1hi,$S1hi
283	\|\| XOR $t0lo,$S1lo,$S1lo
284	\|\| SHRU $T1lo,6,$t0lo
285	\|\| LDW *${Xihi}[18],$T1hi
286	\|\| LDW *${Xilo}[18],$T1lo ; X[i+9]
287	XOR $t0lo,$S1lo,$S1lo ; sigma1(Xi[i+14])
288
289	\|\| LDW *${Xihi}[0],$CHhi
290	\|\| LDW *${Xilo}[0],$CHlo ; X[i]
291	\|\| SHRU $T2hi,1,$S0hi
292	\|\| SHL $T2hi,32-1,$S0lo
293	SHRU $T2lo,1,$t0lo
294	\|\| SHL $T2lo,32-1,$t0hi
295	XOR $t0hi,$S0hi,$S0hi
296	\|\| XOR $t0lo,$S0lo,$S0lo
297	\|\| SHRU $T2hi,8,$t0hi
298	\|\| SHL $T2hi,32-8,$t0lo
299	XOR $t0hi,$S0hi,$S0hi
300	\|\| XOR $t0lo,$S0lo,$S0lo
301	\|\| SHRU $T2lo,8,$t0lo
302	\|\| SHL $T2lo,32-8,$t0hi
303	XOR $t0hi,$S0hi,$S0hi
304	\|\| XOR $t0lo,$S0lo,$S0lo
305	\|\| ADD $S1hi,$T1hi,$T1hi
306	\|\| ADDU $S1lo,$T1lo,$T1carry:$T1lo ; T1 = X[i+9]+sigma1()
307	\|\| [B1] BNOP loop16_79?
308	\|\| SHRU $T2hi,7,$t0hi
309	\|\| SHL $T2hi,32-7,$t0lo
310	XOR $t0hi,$S0hi,$S0hi
311	\|\| XOR $t0lo,$S0lo,$S0lo
312	\|\| ADD $CHhi,$T1hi,$T1hi
313	\|\| ADDU $CHlo,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += X[i]
314	\|\| SHRU $T2lo,7,$t0lo
315	XOR $t0lo,$S0lo,$S0lo ; sigma0(Xi[i+1]
316
317	ADD $S0hi,$T1hi,$T1hi
318	\|\| ADDU $S0lo,$T1carry:$T1lo,$T1carry:$T1lo ; T1 += sigma0()
319	\|\| [B1] SUB B1,1,B1
320	NOP ; avoid cross-path stall
321	ADD $T1carry,$T1hi,$T1hi
322	;;===== branch to loop16_79? is taken here
323
324	break?:
325	ADD $Ahi,$Actxhi,$Ahi ; accumulate ctx
326	\|\| ADDU $Alo,$Actxlo,$Actxlo:$Alo
327	\|\| [A0] LDNDW *$INP++,B11:B10 ; pre-fetch input
328	\|\| [A0] ADDK -640,$K512 ; rewind pointer to K512
329	ADD $Bhi,$Bctxhi,$Bhi
330	\|\| ADDU $Blo,$Bctxlo,$Bctxlo:$Blo
331	\|\| [A0] LDDW *$K512++,$Khi:$Klo ; pre-fetch K512[0]
332	ADD $Chi,$Cctxhi,$Chi
333	\|\| ADDU $Clo,$Cctxlo,$Cctxlo:$Clo
334	\|\| ADD $Actxlo,$Ahi,$Ahi
335	\|\|[!A0] MV $CTXA,$CTXB
336	ADD $Dhi,$Dctxhi,$Dhi
337	\|\| ADDU $Dlo,$Dctxlo,$Dctxlo:$Dlo
338	\|\| ADD $Bctxlo,$Bhi,$Bhi
339	\|\|[!A0] STW $Ahi,*${CTXA}[0^.LITTLE_ENDIAN] ; save ctx
340	\|\|[!A0] STW $Alo,*${CTXB}[1^.LITTLE_ENDIAN]
341	ADD $Ehi,$Ectxhi,$Ehi
342	\|\| ADDU $Elo,$Ectxlo,$Ectxlo:$Elo
343	\|\| ADD $Cctxlo,$Chi,$Chi
344	\|\| [A0] BNOP outerloop?
345	\|\|[!A0] STW $Bhi,*${CTXA}[2^.LITTLE_ENDIAN]
346	\|\|[!A0] STW $Blo,*${CTXB}[3^.LITTLE_ENDIAN]
347	ADD $Fhi,$Fctxhi,$Fhi
348	\|\| ADDU $Flo,$Fctxlo,$Fctxlo:$Flo
349	\|\| ADD $Dctxlo,$Dhi,$Dhi
350	\|\|[!A0] STW $Chi,*${CTXA}[4^.LITTLE_ENDIAN]
351	\|\|[!A0] STW $Clo,*${CTXB}[5^.LITTLE_ENDIAN]
352	ADD $Ghi,$Gctxhi,$Ghi
353	\|\| ADDU $Glo,$Gctxlo,$Gctxlo:$Glo
354	\|\| ADD $Ectxlo,$Ehi,$Ehi
355	\|\|[!A0] STW $Dhi,*${CTXA}[6^.LITTLE_ENDIAN]
356	\|\|[!A0] STW $Dlo,*${CTXB}[7^.LITTLE_ENDIAN]
357	ADD $Hhi,$Hctxhi,$Hhi
358	\|\| ADDU $Hlo,$Hctxlo,$Hctxlo:$Hlo
359	\|\| ADD $Fctxlo,$Fhi,$Fhi
360	\|\|[!A0] STW $Ehi,*${CTXA}[8^.LITTLE_ENDIAN]
361	\|\|[!A0] STW $Elo,*${CTXB}[9^.LITTLE_ENDIAN]
362	ADD $Gctxlo,$Ghi,$Ghi
363	\|\|[!A0] STW $Fhi,*${CTXA}[10^.LITTLE_ENDIAN]
364	\|\|[!A0] STW $Flo,*${CTXB}[11^.LITTLE_ENDIAN]
365	ADD $Hctxlo,$Hhi,$Hhi
366	\|\|[!A0] STW $Ghi,*${CTXA}[12^.LITTLE_ENDIAN]
367	\|\|[!A0] STW $Glo,*${CTXB}[13^.LITTLE_ENDIAN]
368	;;===== branch to outerloop? is taken here
369
370	STW $Hhi,*${CTXA}[14^.LITTLE_ENDIAN]
371	\|\| STW $Hlo,*${CTXB}[15^.LITTLE_ENDIAN]
372	\|\| MVK -40,B0
373	ADD FP,B0,SP ; destroy circular buffer
374	\|\| LDDW *FP[-4],A11:A10
375	LDDW *SP[2],A13:A12
376	\|\| LDDW *FP[-2],B11:B10
377	LDDW *SP[4],B13:B12
378	\|\| BNOP RA
379	LDW *++SP(40),FP ; restore frame pointer
380	MVK 0,B0
381	MVC B0,AMR ; clear AMR
382	NOP 2 ; wait till FP is committed
383	.endasmfunc
384
385	.if __TI_EABI__
386	.sect ".text:sha_asm.const"
387	.else
388	.sect ".const:sha_asm"
389	.endif
390	.align 128
391	K512:
392	.uword 0x428a2f98,0xd728ae22, 0x71374491,0x23ef65cd
393	.uword 0xb5c0fbcf,0xec4d3b2f, 0xe9b5dba5,0x8189dbbc
394	.uword 0x3956c25b,0xf348b538, 0x59f111f1,0xb605d019
395	.uword 0x923f82a4,0xaf194f9b, 0xab1c5ed5,0xda6d8118
396	.uword 0xd807aa98,0xa3030242, 0x12835b01,0x45706fbe
397	.uword 0x243185be,0x4ee4b28c, 0x550c7dc3,0xd5ffb4e2
398	.uword 0x72be5d74,0xf27b896f, 0x80deb1fe,0x3b1696b1
399	.uword 0x9bdc06a7,0x25c71235, 0xc19bf174,0xcf692694
400	.uword 0xe49b69c1,0x9ef14ad2, 0xefbe4786,0x384f25e3
401	.uword 0x0fc19dc6,0x8b8cd5b5, 0x240ca1cc,0x77ac9c65
402	.uword 0x2de92c6f,0x592b0275, 0x4a7484aa,0x6ea6e483
403	.uword 0x5cb0a9dc,0xbd41fbd4, 0x76f988da,0x831153b5
404	.uword 0x983e5152,0xee66dfab, 0xa831c66d,0x2db43210
405	.uword 0xb00327c8,0x98fb213f, 0xbf597fc7,0xbeef0ee4
406	.uword 0xc6e00bf3,0x3da88fc2, 0xd5a79147,0x930aa725
407	.uword 0x06ca6351,0xe003826f, 0x14292967,0x0a0e6e70
408	.uword 0x27b70a85,0x46d22ffc, 0x2e1b2138,0x5c26c926
409	.uword 0x4d2c6dfc,0x5ac42aed, 0x53380d13,0x9d95b3df
410	.uword 0x650a7354,0x8baf63de, 0x766a0abb,0x3c77b2a8
411	.uword 0x81c2c92e,0x47edaee6, 0x92722c85,0x1482353b
412	.uword 0xa2bfe8a1,0x4cf10364, 0xa81a664b,0xbc423001
413	.uword 0xc24b8b70,0xd0f89791, 0xc76c51a3,0x0654be30
414	.uword 0xd192e819,0xd6ef5218, 0xd6990624,0x5565a910
415	.uword 0xf40e3585,0x5771202a, 0x106aa070,0x32bbd1b8
416	.uword 0x19a4c116,0xb8d2d0c8, 0x1e376c08,0x5141ab53
417	.uword 0x2748774c,0xdf8eeb99, 0x34b0bcb5,0xe19b48a8
418	.uword 0x391c0cb3,0xc5c95a63, 0x4ed8aa4a,0xe3418acb
419	.uword 0x5b9cca4f,0x7763e373, 0x682e6ff3,0xd6b2b8a3
420	.uword 0x748f82ee,0x5defb2fc, 0x78a5636f,0x43172f60
421	.uword 0x84c87814,0xa1f0ab72, 0x8cc70208,0x1a6439ec
422	.uword 0x90befffa,0x23631e28, 0xa4506ceb,0xde82bde9
423	.uword 0xbef9a3f7,0xb2c67915, 0xc67178f2,0xe372532b
424	.uword 0xca273ece,0xea26619c, 0xd186b8c7,0x21c0c207
425	.uword 0xeada7dd6,0xcde0eb1e, 0xf57d4f7f,0xee6ed178
426	.uword 0x06f067aa,0x72176fba, 0x0a637dc5,0xa2c898a6
427	.uword 0x113f9804,0xbef90dae, 0x1b710b35,0x131c471b
428	.uword 0x28db77f5,0x23047d84, 0x32caab7b,0x40c72493
429	.uword 0x3c9ebe0a,0x15c9bebc, 0x431d67c4,0x9c100d4c
430	.uword 0x4cc5d4be,0xcb3e42b6, 0x597f299c,0xfc657e2a
431	.uword 0x5fcb6fab,0x3ad6faec, 0x6c44198c,0x4a475817
432	.cstring "SHA512 block transform for C64x+, CRYPTOGAMS by <appro\@openssl.org>"
433	.align 4
434	___
435
436	print $code;
437	close STDOUT or die "error closing STDOUT: $!";

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source: vbox/trunk/src/libs/openssl-3.1.3/crypto/sha/asm/sha512-c64xplus.pl@ 101211

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