| 1 | /*
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| 2 | * Copyright (c) 2003 Fabrice Bellard
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| 3 | *
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| 4 | * This library is free software; you can redistribute it and/or
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| 5 | * modify it under the terms of the GNU Lesser General Public
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| 6 | * License as published by the Free Software Foundation; either
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| 7 | * version 2 of the License, or (at your option) any later version.
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| 8 | *
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| 9 | * This library is distributed in the hope that it will be useful,
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| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 12 | * Lesser General Public License for more details.
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| 13 | *
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| 14 | * You should have received a copy of the GNU Lesser General Public
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| 15 | * License along with this library; if not, write to the Free Software
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| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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| 17 | */
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| 18 |
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| 19 | /*
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| 20 | * Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
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| 21 | * other than GPL or LGPL is available it will apply instead, Oracle elects to use only
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| 22 | * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
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| 23 | * a choice of LGPL license versions is made available with the language indicating
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| 24 | * that LGPLv2 or any later version may be used, or where a choice of which version
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| 25 | * of the LGPL is applied is otherwise unspecified.
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| 26 | */
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| 27 |
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| 28 | /* Locking primitives. Most of this code should be redundant -
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| 29 | system emulation doesn't need/use locking, NPTL userspace uses
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| 30 | pthread mutexes, and non-NPTL userspace isn't threadsafe anyway.
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| 31 | In either case a spinlock is probably the wrong kind of lock.
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| 32 | Spinlocks are only good if you know another CPU has the lock and is
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| 33 | likely to release it soon. In environments where you have more threads
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| 34 | than physical CPUs (the extreme case being a single CPU host) a spinlock
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| 35 | simply wastes CPU until the OS decides to preempt it. */
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| 36 | #if defined(USE_NPTL)
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| 37 |
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| 38 | #include <pthread.h>
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| 39 | #define spin_lock pthread_mutex_lock
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| 40 | #define spin_unlock pthread_mutex_unlock
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| 41 | #define spinlock_t pthread_mutex_t
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| 42 | #define SPIN_LOCK_UNLOCKED PTHREAD_MUTEX_INITIALIZER
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| 43 |
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| 44 | #else
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| 45 |
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| 46 | #if defined(__hppa__)
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| 47 |
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| 48 | typedef int spinlock_t[4];
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| 49 |
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| 50 | #define SPIN_LOCK_UNLOCKED { 1, 1, 1, 1 }
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| 51 |
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| 52 | static inline void resetlock (spinlock_t *p)
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| 53 | {
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| 54 | (*p)[0] = (*p)[1] = (*p)[2] = (*p)[3] = 1;
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| 55 | }
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| 56 |
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| 57 | #else
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| 58 |
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| 59 | typedef int spinlock_t;
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| 60 |
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| 61 | #define SPIN_LOCK_UNLOCKED 0
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| 62 |
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| 63 | #ifndef VBOX
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| 64 | static inline void resetlock (spinlock_t *p)
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| 65 | #else
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| 66 | DECLINLINE(void) resetlock (spinlock_t *p)
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| 67 | #endif
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| 68 | {
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| 69 | *p = SPIN_LOCK_UNLOCKED;
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| 70 | }
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| 71 |
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| 72 | #endif
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| 73 |
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| 74 | #ifdef VBOX
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| 75 | DECLINLINE(int) testandset (int *p)
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| 76 | {
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| 77 |
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| 78 | return ASMAtomicCmpXchgU32((volatile uint32_t *)p, 1, 0) ? 0 : 1;
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| 79 | }
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| 80 | #elif defined(__powerpc__)
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| 81 | static inline int testandset (int *p)
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| 82 | {
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| 83 | int ret;
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| 84 | __asm__ __volatile__ (
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| 85 | "0: lwarx %0,0,%1\n"
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| 86 | " xor. %0,%3,%0\n"
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| 87 | " bne 1f\n"
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| 88 | " stwcx. %2,0,%1\n"
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| 89 | " bne- 0b\n"
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| 90 | "1: "
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| 91 | : "=&r" (ret)
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| 92 | : "r" (p), "r" (1), "r" (0)
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| 93 | : "cr0", "memory");
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| 94 | return ret;
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| 95 | }
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| 96 | #elif defined(__i386__)
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| 97 | static inline int testandset (int *p)
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| 98 | {
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| 99 | long int readval = 0;
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| 100 |
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| 101 | __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
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| 102 | : "+m" (*p), "+a" (readval)
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| 103 | : "r" (1)
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| 104 | : "cc");
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| 105 | return readval;
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| 106 | }
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| 107 | #elif defined(__x86_64__)
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| 108 | static inline int testandset (int *p)
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| 109 | {
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| 110 | long int readval = 0;
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| 111 |
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| 112 | __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
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| 113 | : "+m" (*p), "+a" (readval)
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| 114 | : "r" (1)
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| 115 | : "cc");
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| 116 | return readval;
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| 117 | }
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| 118 | #elif defined(__s390__)
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| 119 | static inline int testandset (int *p)
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| 120 | {
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| 121 | int ret;
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| 122 |
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| 123 | __asm__ __volatile__ ("0: cs %0,%1,0(%2)\n"
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| 124 | " jl 0b"
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| 125 | : "=&d" (ret)
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| 126 | : "r" (1), "a" (p), "0" (*p)
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| 127 | : "cc", "memory" );
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| 128 | return ret;
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| 129 | }
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| 130 | #elif defined(__alpha__)
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| 131 | static inline int testandset (int *p)
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| 132 | {
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| 133 | int ret;
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| 134 | unsigned long one;
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| 135 |
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| 136 | __asm__ __volatile__ ("0: mov 1,%2\n"
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| 137 | " ldl_l %0,%1\n"
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| 138 | " stl_c %2,%1\n"
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| 139 | " beq %2,1f\n"
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| 140 | ".subsection 2\n"
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| 141 | "1: br 0b\n"
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| 142 | ".previous"
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| 143 | : "=r" (ret), "=m" (*p), "=r" (one)
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| 144 | : "m" (*p));
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| 145 | return ret;
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| 146 | }
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| 147 | #elif defined(__sparc__)
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| 148 | static inline int testandset (int *p)
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| 149 | {
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| 150 | int ret;
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| 151 |
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| 152 | __asm__ __volatile__("ldstub [%1], %0"
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| 153 | : "=r" (ret)
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| 154 | : "r" (p)
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| 155 | : "memory");
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| 156 |
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| 157 | return (ret ? 1 : 0);
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| 158 | }
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| 159 | #elif defined(__arm__)
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| 160 | static inline int testandset (int *spinlock)
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| 161 | {
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| 162 | register unsigned int ret;
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| 163 | __asm__ __volatile__("swp %0, %1, [%2]"
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| 164 | : "=r"(ret)
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| 165 | : "0"(1), "r"(spinlock));
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| 166 |
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| 167 | return ret;
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| 168 | }
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| 169 | #elif defined(__mc68000)
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| 170 | static inline int testandset (int *p)
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| 171 | {
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| 172 | char ret;
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| 173 | __asm__ __volatile__("tas %1; sne %0"
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| 174 | : "=r" (ret)
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| 175 | : "m" (p)
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| 176 | : "cc","memory");
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| 177 | return ret;
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| 178 | }
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| 179 | #elif defined(__hppa__)
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| 180 |
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| 181 | /* Because malloc only guarantees 8-byte alignment for malloc'd data,
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| 182 | and GCC only guarantees 8-byte alignment for stack locals, we can't
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| 183 | be assured of 16-byte alignment for atomic lock data even if we
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| 184 | specify "__attribute ((aligned(16)))" in the type declaration. So,
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| 185 | we use a struct containing an array of four ints for the atomic lock
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| 186 | type and dynamically select the 16-byte aligned int from the array
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| 187 | for the semaphore. */
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| 188 | #define __PA_LDCW_ALIGNMENT 16
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| 189 | static inline void *ldcw_align (void *p) {
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| 190 | unsigned long a = (unsigned long)p;
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| 191 | a = (a + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1);
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| 192 | return (void *)a;
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| 193 | }
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| 194 |
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| 195 | static inline int testandset (spinlock_t *p)
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| 196 | {
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| 197 | unsigned int ret;
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| 198 | p = ldcw_align(p);
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| 199 | __asm__ __volatile__("ldcw 0(%1),%0"
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| 200 | : "=r" (ret)
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| 201 | : "r" (p)
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| 202 | : "memory" );
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| 203 | return !ret;
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| 204 | }
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| 205 |
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| 206 | #elif defined(__ia64)
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| 207 |
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| 208 | #include <ia64intrin.h>
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| 209 |
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| 210 | static inline int testandset (int *p)
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| 211 | {
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| 212 | return __sync_lock_test_and_set (p, 1);
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| 213 | }
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| 214 | #elif defined(__mips__)
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| 215 | static inline int testandset (int *p)
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| 216 | {
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| 217 | int ret;
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| 218 |
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| 219 | __asm__ __volatile__ (
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| 220 | " .set push \n"
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| 221 | " .set noat \n"
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| 222 | " .set mips2 \n"
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| 223 | "1: li $1, 1 \n"
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| 224 | " ll %0, %1 \n"
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| 225 | " sc $1, %1 \n"
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| 226 | " beqz $1, 1b \n"
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| 227 | " .set pop "
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| 228 | : "=r" (ret), "+R" (*p)
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| 229 | :
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| 230 | : "memory");
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| 231 |
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| 232 | return ret;
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| 233 | }
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| 234 | #else
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| 235 | #error unimplemented CPU support
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| 236 | #endif
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| 237 |
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| 238 | #if defined(CONFIG_USER_ONLY)
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| 239 | static inline void spin_lock(spinlock_t *lock)
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| 240 | {
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| 241 | while (testandset(lock));
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| 242 | }
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| 243 |
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| 244 | static inline void spin_unlock(spinlock_t *lock)
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| 245 | {
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| 246 | resetlock(lock);
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| 247 | }
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| 248 |
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| 249 | static inline int spin_trylock(spinlock_t *lock)
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| 250 | {
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| 251 | return !testandset(lock);
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| 252 | }
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| 253 | #else
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| 254 | #ifndef VBOX
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| 255 | static inline void spin_lock(spinlock_t *lock)
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| 256 | #else
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| 257 | DECLINLINE(void) spin_lock(spinlock_t *lock)
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| 258 | #endif
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| 259 | {
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| 260 | }
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| 261 |
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| 262 | #ifndef VBOX
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| 263 | static inline void spin_unlock(spinlock_t *lock)
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| 264 | #else
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| 265 | DECLINLINE(void) spin_unlock(spinlock_t *lock)
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| 266 | #endif
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| 267 | {
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| 268 | }
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| 269 |
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| 270 | #ifndef VBOX
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| 271 | static inline int spin_trylock(spinlock_t *lock)
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| 272 | #else
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| 273 | DECLINLINE(int) spin_trylock(spinlock_t *lock)
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| 274 | #endif
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| 275 | {
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| 276 | return 1;
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| 277 | }
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| 278 | #endif
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| 279 |
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| 280 | #endif
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