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source: vbox/trunk/src/recompiler/qemu-lock.h@ 52879

Last change on this file since 52879 was 42601, checked in by vboxsync, 12 years ago

REM: Initial changes to make it work (seemingly) with MinGW-w64.

  • Property svn:eol-style set to native
File size: 6.6 KB
Line 
1/*
2 * Copyright (c) 2003 Fabrice Bellard
3 *
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or (at your option) any later version.
8 *
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
13 *
14 * You should have received a copy of the GNU Lesser General Public
15 * License along with this library; if not, see <http://www.gnu.org/licenses/>
16 */
17
18/*
19 * Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
20 * other than GPL or LGPL is available it will apply instead, Oracle elects to use only
21 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
22 * a choice of LGPL license versions is made available with the language indicating
23 * that LGPLv2 or any later version may be used, or where a choice of which version
24 * of the LGPL is applied is otherwise unspecified.
25 */
26
27/* Locking primitives. Most of this code should be redundant -
28 system emulation doesn't need/use locking, NPTL userspace uses
29 pthread mutexes, and non-NPTL userspace isn't threadsafe anyway.
30 In either case a spinlock is probably the wrong kind of lock.
31 Spinlocks are only good if you know annother CPU has the lock and is
32 likely to release it soon. In environments where you have more threads
33 than physical CPUs (the extreme case being a single CPU host) a spinlock
34 simply wastes CPU until the OS decides to preempt it. */
35#if defined(CONFIG_USE_NPTL)
36
37#include <pthread.h>
38#define spin_lock pthread_mutex_lock
39#define spin_unlock pthread_mutex_unlock
40#define spinlock_t pthread_mutex_t
41#define SPIN_LOCK_UNLOCKED PTHREAD_MUTEX_INITIALIZER
42
43#else
44
45#if defined(__hppa__)
46
47typedef int spinlock_t[4];
48
49#define SPIN_LOCK_UNLOCKED { 1, 1, 1, 1 }
50
51static inline void resetlock (spinlock_t *p)
52{
53 (*p)[0] = (*p)[1] = (*p)[2] = (*p)[3] = 1;
54}
55
56#else
57
58typedef int spinlock_t;
59
60#define SPIN_LOCK_UNLOCKED 0
61
62static inline void resetlock (spinlock_t *p)
63{
64 *p = SPIN_LOCK_UNLOCKED;
65}
66
67#endif
68
69#ifdef VBOX
70DECLINLINE(int) testandset (int *p)
71{
72 return ASMAtomicCmpXchgU32((volatile uint32_t *)p, 1, 0) ? 0 : 1;
73}
74#elif defined(_ARCH_PPC)
75static inline int testandset (int *p)
76{
77 int ret;
78 __asm__ __volatile__ (
79 " lwarx %0,0,%1\n"
80 " xor. %0,%3,%0\n"
81 " bne $+12\n"
82 " stwcx. %2,0,%1\n"
83 " bne- $-16\n"
84 : "=&r" (ret)
85 : "r" (p), "r" (1), "r" (0)
86 : "cr0", "memory");
87 return ret;
88}
89#elif defined(__i386__)
90static inline int testandset (int *p)
91{
92 long int readval = 0;
93
94 __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
95 : "+m" (*p), "+a" (readval)
96 : "r" (1)
97 : "cc");
98 return readval;
99}
100#elif defined(__x86_64__)
101static inline int testandset (int *p)
102{
103 long int64_t readval = 0;
104
105 __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
106 : "+m" (*p), "+a" (readval)
107 : "r" (1)
108 : "cc");
109 return readval;
110}
111#elif defined(__s390__)
112static inline int testandset (int *p)
113{
114 int ret;
115
116 __asm__ __volatile__ ("0: cs %0,%1,0(%2)\n"
117 " jl 0b"
118 : "=&d" (ret)
119 : "r" (1), "a" (p), "0" (*p)
120 : "cc", "memory" );
121 return ret;
122}
123#elif defined(__alpha__)
124static inline int testandset (int *p)
125{
126 int ret;
127 unsigned long one;
128
129 __asm__ __volatile__ ("0: mov 1,%2\n"
130 " ldl_l %0,%1\n"
131 " stl_c %2,%1\n"
132 " beq %2,1f\n"
133 ".subsection 2\n"
134 "1: br 0b\n"
135 ".previous"
136 : "=r" (ret), "=m" (*p), "=r" (one)
137 : "m" (*p));
138 return ret;
139}
140#elif defined(__sparc__)
141static inline int testandset (int *p)
142{
143 int ret;
144
145 __asm__ __volatile__("ldstub [%1], %0"
146 : "=r" (ret)
147 : "r" (p)
148 : "memory");
149
150 return (ret ? 1 : 0);
151}
152#elif defined(__arm__)
153static inline int testandset (int *spinlock)
154{
155 register unsigned int ret;
156 __asm__ __volatile__("swp %0, %1, [%2]"
157 : "=r"(ret)
158 : "0"(1), "r"(spinlock));
159
160 return ret;
161}
162#elif defined(__mc68000)
163static inline int testandset (int *p)
164{
165 char ret;
166 __asm__ __volatile__("tas %1; sne %0"
167 : "=r" (ret)
168 : "m" (p)
169 : "cc","memory");
170 return ret;
171}
172#elif defined(__hppa__)
173
174/* Because malloc only guarantees 8-byte alignment for malloc'd data,
175 and GCC only guarantees 8-byte alignment for stack locals, we can't
176 be assured of 16-byte alignment for atomic lock data even if we
177 specify "__attribute ((aligned(16)))" in the type declaration. So,
178 we use a struct containing an array of four ints for the atomic lock
179 type and dynamically select the 16-byte aligned int from the array
180 for the semaphore. */
181#define __PA_LDCW_ALIGNMENT 16
182static inline void *ldcw_align (void *p) {
183 unsigned long a = (unsigned long)p;
184 a = (a + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1);
185 return (void *)a;
186}
187
188static inline int testandset (spinlock_t *p)
189{
190 unsigned int ret;
191 p = ldcw_align(p);
192 __asm__ __volatile__("ldcw 0(%1),%0"
193 : "=r" (ret)
194 : "r" (p)
195 : "memory" );
196 return !ret;
197}
198
199#elif defined(__ia64)
200
201#include <ia64intrin.h>
202
203static inline int testandset (int *p)
204{
205 return __sync_lock_test_and_set (p, 1);
206}
207#elif defined(__mips__)
208static inline int testandset (int *p)
209{
210 int ret;
211
212 __asm__ __volatile__ (
213 " .set push \n"
214 " .set noat \n"
215 " .set mips2 \n"
216 "1: li $1, 1 \n"
217 " ll %0, %1 \n"
218 " sc $1, %1 \n"
219 " beqz $1, 1b \n"
220 " .set pop "
221 : "=r" (ret), "+R" (*p)
222 :
223 : "memory");
224
225 return ret;
226}
227#else
228#error unimplemented CPU support
229#endif
230
231#if defined(CONFIG_USER_ONLY)
232static inline void spin_lock(spinlock_t *lock)
233{
234 while (testandset(lock));
235}
236
237static inline void spin_unlock(spinlock_t *lock)
238{
239 resetlock(lock);
240}
241
242static inline int spin_trylock(spinlock_t *lock)
243{
244 return !testandset(lock);
245}
246#else
247static inline void spin_lock(spinlock_t *lock)
248{
249}
250
251static inline void spin_unlock(spinlock_t *lock)
252{
253}
254
255static inline int spin_trylock(spinlock_t *lock)
256{
257 return 1;
258}
259#endif
260
261#endif
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