softmmu_template.h@ 17660

Last change on this file since 17660 was 11982, checked in by vboxsync, 16 years ago
All: license header changes for 2.0 (OSE headers, add Sun GPL/LGPL disclaimer)
Property svn:eol-style set to `native`
File size: 11.7 KB

Line
1	/*
2	* Software MMU support
3	*
4	* Copyright (c) 2003 Fabrice Bellard
5	*
6	* This library is free software; you can redistribute it and/or
7	* modify it under the terms of the GNU Lesser General Public
8	* License as published by the Free Software Foundation; either
9	* version 2 of the License, or (at your option) any later version.
10	*
11	* This library is distributed in the hope that it will be useful,
12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14	* Lesser General Public License for more details.
15	*
16	* You should have received a copy of the GNU Lesser General Public
17	* License along with this library; if not, write to the Free Software
18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19	*/
20
21	/*
22	* Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
23	* other than GPL or LGPL is available it will apply instead, Sun elects to use only
24	* the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
25	* a choice of LGPL license versions is made available with the language indicating
26	* that LGPLv2 or any later version may be used, or where a choice of which version
27	* of the LGPL is applied is otherwise unspecified.
28	*/
29	#define DATA_SIZE (1 << SHIFT)
30
31	#if DATA_SIZE == 8
32	#define SUFFIX q
33	#define USUFFIX q
34	#define DATA_TYPE uint64_t
35	#elif DATA_SIZE == 4
36	#define SUFFIX l
37	#define USUFFIX l
38	#define DATA_TYPE uint32_t
39	#elif DATA_SIZE == 2
40	#define SUFFIX w
41	#define USUFFIX uw
42	#define DATA_TYPE uint16_t
43	#elif DATA_SIZE == 1
44	#define SUFFIX b
45	#define USUFFIX ub
46	#define DATA_TYPE uint8_t
47	#else
48	#error unsupported data size
49	#endif
50
51	#ifdef SOFTMMU_CODE_ACCESS
52	#define READ_ACCESS_TYPE 2
53	#define ADDR_READ addr_code
54	#else
55	#define READ_ACCESS_TYPE 0
56	#define ADDR_READ addr_read
57	#endif
58
59	static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
60	int is_user,
61	void *retaddr);
62	static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr,
63	target_ulong tlb_addr)
64	{
65	DATA_TYPE res;
66	int index;
67
68	index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
69	#if SHIFT <= 2
70	res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr);
71	#else
72	#ifdef TARGET_WORDS_BIGENDIAN
73	res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32;
74	res \|= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4);
75	#else
76	res = io_mem_read[index][2](io_mem_opaque[index], physaddr);
77	res \|= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32;
78	#endif
79	#endif /* SHIFT > 2 */
80	#ifdef USE_KQEMU
81	env->last_io_time = cpu_get_time_fast();
82	#endif
83	return res;
84	}
85
86	/* handle all cases except unaligned access which span two pages */
87	DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
88	int is_user)
89	{
90	DATA_TYPE res;
91	int index;
92	target_ulong tlb_addr;
93	target_phys_addr_t physaddr;
94	void *retaddr;
95
96	/* test if there is match for unaligned or IO access */
97	/* XXX: could done more in memory macro in a non portable way */
98	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
99	redo:
100	tlb_addr = env->tlb_table[is_user][index].ADDR_READ;
101	if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK \| TLB_INVALID_MASK))) {
102	physaddr = addr + env->tlb_table[is_user][index].addend;
103	if (tlb_addr & ~TARGET_PAGE_MASK) {
104	/* IO access */
105	if ((addr & (DATA_SIZE - 1)) != 0)
106	goto do_unaligned_access;
107	res = glue(io_read, SUFFIX)(physaddr, tlb_addr);
108	} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
109	/* slow unaligned access (it spans two pages or IO) */
110	do_unaligned_access:
111	retaddr = GETPC();
112	#ifdef ALIGNED_ONLY
113	do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr);
114	#endif
115	res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr,
116	is_user, retaddr);
117	} else {
118	/* unaligned/aligned access in the same page */
119	#ifdef ALIGNED_ONLY
120	if ((addr & (DATA_SIZE - 1)) != 0) {
121	retaddr = GETPC();
122	do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr);
123	}
124	#endif
125	res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)physaddr);
126	}
127	} else {
128	/* the page is not in the TLB : fill it */
129	retaddr = GETPC();
130	#ifdef ALIGNED_ONLY
131	if ((addr & (DATA_SIZE - 1)) != 0)
132	do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr);
133	#endif
134	tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr);
135	goto redo;
136	}
137	return res;
138	}
139
140	/* handle all unaligned cases */
141	static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
142	int is_user,
143	void *retaddr)
144	{
145	DATA_TYPE res, res1, res2;
146	int index, shift;
147	target_phys_addr_t physaddr;
148	target_ulong tlb_addr, addr1, addr2;
149
150	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
151	redo:
152	tlb_addr = env->tlb_table[is_user][index].ADDR_READ;
153	if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK \| TLB_INVALID_MASK))) {
154	physaddr = addr + env->tlb_table[is_user][index].addend;
155	if (tlb_addr & ~TARGET_PAGE_MASK) {
156	/* IO access */
157	if ((addr & (DATA_SIZE - 1)) != 0)
158	goto do_unaligned_access;
159	res = glue(io_read, SUFFIX)(physaddr, tlb_addr);
160	} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
161	do_unaligned_access:
162	/* slow unaligned access (it spans two pages) */
163	addr1 = addr & ~(DATA_SIZE - 1);
164	addr2 = addr1 + DATA_SIZE;
165	res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1,
166	is_user, retaddr);
167	res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2,
168	is_user, retaddr);
169	shift = (addr & (DATA_SIZE - 1)) * 8;
170	#ifdef TARGET_WORDS_BIGENDIAN
171	res = (res1 << shift) \| (res2 >> ((DATA_SIZE * 8) - shift));
172	#else
173	res = (res1 >> shift) \| (res2 << ((DATA_SIZE * 8) - shift));
174	#endif
175	res = (DATA_TYPE)res;
176	} else {
177	/* unaligned/aligned access in the same page */
178	res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)physaddr);
179	}
180	} else {
181	/* the page is not in the TLB : fill it */
182	tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr);
183	goto redo;
184	}
185	return res;
186	}
187
188	#ifndef SOFTMMU_CODE_ACCESS
189
190	static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr,
191	DATA_TYPE val,
192	int is_user,
193	void *retaddr);
194
195	static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr,
196	DATA_TYPE val,
197	target_ulong tlb_addr,
198	void *retaddr)
199	{
200	int index;
201
202	index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
203	env->mem_write_vaddr = tlb_addr;
204	env->mem_write_pc = (unsigned long)retaddr;
205	#if SHIFT <= 2
206	io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val);
207	#else
208	#ifdef TARGET_WORDS_BIGENDIAN
209	io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32);
210	io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val);
211	#else
212	io_mem_write[index][2](io_mem_opaque[index], physaddr, val);
213	io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32);
214	#endif
215	#endif /* SHIFT > 2 */
216	#ifdef USE_KQEMU
217	env->last_io_time = cpu_get_time_fast();
218	#endif
219	}
220
221	void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr,
222	DATA_TYPE val,
223	int is_user)
224	{
225	target_phys_addr_t physaddr;
226	target_ulong tlb_addr;
227	void *retaddr;
228	int index;
229
230	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
231	redo:
232	tlb_addr = env->tlb_table[is_user][index].addr_write;
233	if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK \| TLB_INVALID_MASK))) {
234	physaddr = addr + env->tlb_table[is_user][index].addend;
235	if (tlb_addr & ~TARGET_PAGE_MASK) {
236	/* IO access */
237	if ((addr & (DATA_SIZE - 1)) != 0)
238	goto do_unaligned_access;
239	retaddr = GETPC();
240	glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr);
241	} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
242	do_unaligned_access:
243	retaddr = GETPC();
244	#ifdef ALIGNED_ONLY
245	do_unaligned_access(addr, 1, is_user, retaddr);
246	#endif
247	glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val,
248	is_user, retaddr);
249	} else {
250	/* aligned/unaligned access in the same page */
251	#ifdef ALIGNED_ONLY
252	if ((addr & (DATA_SIZE - 1)) != 0) {
253	retaddr = GETPC();
254	do_unaligned_access(addr, 1, is_user, retaddr);
255	}
256	#endif
257	glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)physaddr, val);
258	}
259	} else {
260	/* the page is not in the TLB : fill it */
261	retaddr = GETPC();
262	#ifdef ALIGNED_ONLY
263	if ((addr & (DATA_SIZE - 1)) != 0)
264	do_unaligned_access(addr, 1, is_user, retaddr);
265	#endif
266	tlb_fill(addr, 1, is_user, retaddr);
267	goto redo;
268	}
269	}
270
271	/* handles all unaligned cases */
272	static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr,
273	DATA_TYPE val,
274	int is_user,
275	void *retaddr)
276	{
277	target_phys_addr_t physaddr;
278	target_ulong tlb_addr;
279	int index, i;
280
281	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
282	redo:
283	tlb_addr = env->tlb_table[is_user][index].addr_write;
284	if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK \| TLB_INVALID_MASK))) {
285	physaddr = addr + env->tlb_table[is_user][index].addend;
286	if (tlb_addr & ~TARGET_PAGE_MASK) {
287	/* IO access */
288	if ((addr & (DATA_SIZE - 1)) != 0)
289	goto do_unaligned_access;
290	glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr);
291	} else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
292	do_unaligned_access:
293	/* XXX: not efficient, but simple */
294	for(i = 0;i < DATA_SIZE; i++) {
295	#ifdef TARGET_WORDS_BIGENDIAN
296	glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)),
297	is_user, retaddr);
298	#else
299	glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8),
300	is_user, retaddr);
301	#endif
302	}
303	} else {
304	/* aligned/unaligned access in the same page */
305	glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)physaddr, val);
306	}
307	} else {
308	/* the page is not in the TLB : fill it */
309	tlb_fill(addr, 1, is_user, retaddr);
310	goto redo;
311	}
312	}
313
314	#endif /* !defined(SOFTMMU_CODE_ACCESS) */
315
316	#undef READ_ACCESS_TYPE
317	#undef SHIFT
318	#undef DATA_TYPE
319	#undef SUFFIX
320	#undef USUFFIX
321	#undef DATA_SIZE
322	#undef ADDR_READ

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source: vbox/trunk/src/recompiler/softmmu_template.h@ 17660

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