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source: vbox/trunk/src/recompiler/target-i386/exec.h@ 2422

Last change on this file since 2422 was 2422, checked in by vboxsync, 18 years ago

Removed the old recompiler code.

  • Property svn:eol-style set to native
File size: 14.3 KB
Line 
1/*
2 * i386 execution defines
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include "config.h"
21#include "dyngen-exec.h"
22
23/* XXX: factorize this mess */
24#ifdef TARGET_X86_64
25#define TARGET_LONG_BITS 64
26#else
27#define TARGET_LONG_BITS 32
28#endif
29
30#include "cpu-defs.h"
31
32/* at least 4 register variables are defined */
33register struct CPUX86State *env asm(AREG0);
34
35#if TARGET_LONG_BITS > HOST_LONG_BITS
36
37/* no registers can be used */
38#define T0 (env->t0)
39#define T1 (env->t1)
40#define T2 (env->t2)
41
42#else
43
44/* XXX: use unsigned long instead of target_ulong - better code will
45 be generated for 64 bit CPUs */
46register target_ulong T0 asm(AREG1);
47register target_ulong T1 asm(AREG2);
48register target_ulong T2 asm(AREG3);
49
50/* if more registers are available, we define some registers too */
51#ifdef AREG4
52register target_ulong EAX asm(AREG4);
53#define reg_EAX
54#endif
55
56#ifdef AREG5
57register target_ulong ESP asm(AREG5);
58#define reg_ESP
59#endif
60
61#ifdef AREG6
62register target_ulong EBP asm(AREG6);
63#define reg_EBP
64#endif
65
66#ifdef AREG7
67register target_ulong ECX asm(AREG7);
68#define reg_ECX
69#endif
70
71#ifdef AREG8
72register target_ulong EDX asm(AREG8);
73#define reg_EDX
74#endif
75
76#ifdef AREG9
77register target_ulong EBX asm(AREG9);
78#define reg_EBX
79#endif
80
81#ifdef AREG10
82register target_ulong ESI asm(AREG10);
83#define reg_ESI
84#endif
85
86#ifdef AREG11
87register target_ulong EDI asm(AREG11);
88#define reg_EDI
89#endif
90
91#endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
92
93#define A0 T2
94
95extern FILE *logfile;
96extern int loglevel;
97
98#ifndef reg_EAX
99#define EAX (env->regs[R_EAX])
100#endif
101#ifndef reg_ECX
102#define ECX (env->regs[R_ECX])
103#endif
104#ifndef reg_EDX
105#define EDX (env->regs[R_EDX])
106#endif
107#ifndef reg_EBX
108#define EBX (env->regs[R_EBX])
109#endif
110#ifndef reg_ESP
111#define ESP (env->regs[R_ESP])
112#endif
113#ifndef reg_EBP
114#define EBP (env->regs[R_EBP])
115#endif
116#ifndef reg_ESI
117#define ESI (env->regs[R_ESI])
118#endif
119#ifndef reg_EDI
120#define EDI (env->regs[R_EDI])
121#endif
122#define EIP (env->eip)
123#define DF (env->df)
124
125#define CC_SRC (env->cc_src)
126#define CC_DST (env->cc_dst)
127#define CC_OP (env->cc_op)
128
129/* float macros */
130#define FT0 (env->ft0)
131#define ST0 (env->fpregs[env->fpstt].d)
132#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
133#define ST1 ST(1)
134
135#ifdef USE_FP_CONVERT
136#define FP_CONVERT (env->fp_convert)
137#endif
138
139#include "cpu.h"
140#include "exec-all.h"
141
142typedef struct CCTable {
143 int (*compute_all)(void); /* return all the flags */
144 int (*compute_c)(void); /* return the C flag */
145} CCTable;
146
147extern CCTable cc_table[];
148
149void load_seg(int seg_reg, int selector);
150void helper_ljmp_protected_T0_T1(int next_eip);
151void helper_lcall_real_T0_T1(int shift, int next_eip);
152void helper_lcall_protected_T0_T1(int shift, int next_eip);
153void helper_iret_real(int shift);
154void helper_iret_protected(int shift, int next_eip);
155void helper_lret_protected(int shift, int addend);
156void helper_lldt_T0(void);
157void helper_ltr_T0(void);
158void helper_movl_crN_T0(int reg);
159void helper_movl_drN_T0(int reg);
160void helper_invlpg(target_ulong addr);
161void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
162void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
163void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
164void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
165int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
166 int is_write, int is_user, int is_softmmu);
167void tlb_fill(target_ulong addr, int is_write, int is_user,
168 void *retaddr);
169void __hidden cpu_lock(void);
170void __hidden cpu_unlock(void);
171void do_interrupt(int intno, int is_int, int error_code,
172 target_ulong next_eip, int is_hw);
173void do_interrupt_user(int intno, int is_int, int error_code,
174 target_ulong next_eip);
175void raise_interrupt(int intno, int is_int, int error_code,
176 int next_eip_addend);
177void raise_exception_err(int exception_index, int error_code);
178void raise_exception(int exception_index);
179void do_smm_enter(void);
180void __hidden cpu_loop_exit(void);
181
182void OPPROTO op_movl_eflags_T0(void);
183void OPPROTO op_movl_T0_eflags(void);
184#ifdef VBOX
185void OPPROTO op_movl_T0_eflags_vme(void);
186void OPPROTO op_movw_eflags_T0_vme(void);
187void OPPROTO op_cli_vme(void);
188void OPPROTO op_sti_vme(void);
189#endif
190void helper_divl_EAX_T0(void);
191void helper_idivl_EAX_T0(void);
192void helper_mulq_EAX_T0(void);
193void helper_imulq_EAX_T0(void);
194void helper_imulq_T0_T1(void);
195void helper_divq_EAX_T0(void);
196void helper_idivq_EAX_T0(void);
197void helper_bswapq_T0(void);
198void helper_cmpxchg8b(void);
199void helper_cpuid(void);
200void helper_enter_level(int level, int data32);
201void helper_enter64_level(int level, int data64);
202void helper_sysenter(void);
203void helper_sysexit(void);
204void helper_syscall(int next_eip_addend);
205void helper_sysret(int dflag);
206void helper_rdtsc(void);
207void helper_rdmsr(void);
208void helper_wrmsr(void);
209void helper_lsl(void);
210void helper_lar(void);
211void helper_verr(void);
212void helper_verw(void);
213void helper_rsm(void);
214
215#ifdef VBOX
216void helper_external_event(void);
217
218/* in helper.c */
219void sync_seg(CPUX86State *env1, int seg_reg, int selector);
220void sync_ldtr(CPUX86State *env1, int selector);
221int sync_tr(CPUX86State *env1, int selector);
222
223#endif
224
225void check_iob_T0(void);
226void check_iow_T0(void);
227void check_iol_T0(void);
228void check_iob_DX(void);
229void check_iow_DX(void);
230void check_iol_DX(void);
231
232#if !defined(CONFIG_USER_ONLY)
233
234#include "softmmu_exec.h"
235
236static inline double ldfq(target_ulong ptr)
237{
238 union {
239 double d;
240 uint64_t i;
241 } u;
242 u.i = ldq(ptr);
243 return u.d;
244}
245
246static inline void stfq(target_ulong ptr, double v)
247{
248 union {
249 double d;
250 uint64_t i;
251 } u;
252 u.d = v;
253 stq(ptr, u.i);
254}
255
256static inline float ldfl(target_ulong ptr)
257{
258 union {
259 float f;
260 uint32_t i;
261 } u;
262 u.i = ldl(ptr);
263 return u.f;
264}
265
266static inline void stfl(target_ulong ptr, float v)
267{
268 union {
269 float f;
270 uint32_t i;
271 } u;
272 u.f = v;
273 stl(ptr, u.i);
274}
275
276#endif /* !defined(CONFIG_USER_ONLY) */
277
278#ifdef USE_X86LDOUBLE
279/* use long double functions */
280#define floatx_to_int32 floatx80_to_int32
281#define floatx_to_int64 floatx80_to_int64
282#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
283#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
284#define floatx_abs floatx80_abs
285#define floatx_chs floatx80_chs
286#define floatx_round_to_int floatx80_round_to_int
287#define floatx_compare floatx80_compare
288#define floatx_compare_quiet floatx80_compare_quiet
289#ifdef VBOX
290#undef sin
291#undef cos
292#undef sqrt
293#undef pow
294#undef log
295#undef tan
296#undef atan2
297#undef floor
298#undef ceil
299#undef ldexp
300#endif /* !VBOX */
301#define sin sinl
302#define cos cosl
303#define sqrt sqrtl
304#define pow powl
305#define log logl
306#define tan tanl
307#define atan2 atan2l
308#define floor floorl
309#define ceil ceill
310#define ldexp ldexpl
311#else
312#define floatx_to_int32 float64_to_int32
313#define floatx_to_int64 float64_to_int64
314#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
315#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
316#define floatx_abs float64_abs
317#define floatx_chs float64_chs
318#define floatx_round_to_int float64_round_to_int
319#define floatx_compare float64_compare
320#define floatx_compare_quiet float64_compare_quiet
321#endif
322
323extern CPU86_LDouble sin(CPU86_LDouble x);
324extern CPU86_LDouble cos(CPU86_LDouble x);
325extern CPU86_LDouble sqrt(CPU86_LDouble x);
326extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
327extern CPU86_LDouble log(CPU86_LDouble x);
328extern CPU86_LDouble tan(CPU86_LDouble x);
329extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
330extern CPU86_LDouble floor(CPU86_LDouble x);
331extern CPU86_LDouble ceil(CPU86_LDouble x);
332
333#define RC_MASK 0xc00
334#define RC_NEAR 0x000
335#define RC_DOWN 0x400
336#define RC_UP 0x800
337#define RC_CHOP 0xc00
338
339#define MAXTAN 9223372036854775808.0
340
341#ifdef USE_X86LDOUBLE
342
343/* only for x86 */
344typedef union {
345 long double d;
346 struct {
347 unsigned long long lower;
348 unsigned short upper;
349 } l;
350} CPU86_LDoubleU;
351
352/* the following deal with x86 long double-precision numbers */
353#define MAXEXPD 0x7fff
354#define EXPBIAS 16383
355#define EXPD(fp) (fp.l.upper & 0x7fff)
356#define SIGND(fp) ((fp.l.upper) & 0x8000)
357#define MANTD(fp) (fp.l.lower)
358#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
359
360#else
361
362/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
363typedef union {
364 double d;
365#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
366 struct {
367 uint32_t lower;
368 int32_t upper;
369 } l;
370#else
371 struct {
372 int32_t upper;
373 uint32_t lower;
374 } l;
375#endif
376#ifndef __arm__
377 int64_t ll;
378#endif
379} CPU86_LDoubleU;
380
381/* the following deal with IEEE double-precision numbers */
382#define MAXEXPD 0x7ff
383#define EXPBIAS 1023
384#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
385#define SIGND(fp) ((fp.l.upper) & 0x80000000)
386#ifdef __arm__
387#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
388#else
389#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
390#endif
391#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
392#endif
393
394static inline void fpush(void)
395{
396 env->fpstt = (env->fpstt - 1) & 7;
397 env->fptags[env->fpstt] = 0; /* validate stack entry */
398}
399
400static inline void fpop(void)
401{
402 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
403 env->fpstt = (env->fpstt + 1) & 7;
404}
405
406#ifndef USE_X86LDOUBLE
407static inline CPU86_LDouble helper_fldt(target_ulong ptr)
408{
409 CPU86_LDoubleU temp;
410 int upper, e;
411 uint64_t ll;
412
413 /* mantissa */
414 upper = lduw(ptr + 8);
415 /* XXX: handle overflow ? */
416 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
417 e |= (upper >> 4) & 0x800; /* sign */
418 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
419#ifdef __arm__
420 temp.l.upper = (e << 20) | (ll >> 32);
421 temp.l.lower = ll;
422#else
423 temp.ll = ll | ((uint64_t)e << 52);
424#endif
425 return temp.d;
426}
427
428static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
429{
430 CPU86_LDoubleU temp;
431 int e;
432
433 temp.d = f;
434 /* mantissa */
435 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
436 /* exponent + sign */
437 e = EXPD(temp) - EXPBIAS + 16383;
438 e |= SIGND(temp) >> 16;
439 stw(ptr + 8, e);
440}
441#else
442
443/* XXX: same endianness assumed */
444
445#ifdef CONFIG_USER_ONLY
446
447static inline CPU86_LDouble helper_fldt(target_ulong ptr)
448{
449 return *(CPU86_LDouble *)ptr;
450}
451
452static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
453{
454 *(CPU86_LDouble *)ptr = f;
455}
456
457#else
458
459/* we use memory access macros */
460
461static inline CPU86_LDouble helper_fldt(target_ulong ptr)
462{
463 CPU86_LDoubleU temp;
464
465 temp.l.lower = ldq(ptr);
466 temp.l.upper = lduw(ptr + 8);
467 return temp.d;
468}
469
470static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
471{
472 CPU86_LDoubleU temp;
473
474 temp.d = f;
475 stq(ptr, temp.l.lower);
476 stw(ptr + 8, temp.l.upper);
477}
478
479#endif /* !CONFIG_USER_ONLY */
480
481#endif /* USE_X86LDOUBLE */
482
483#define FPUS_IE (1 << 0)
484#define FPUS_DE (1 << 1)
485#define FPUS_ZE (1 << 2)
486#define FPUS_OE (1 << 3)
487#define FPUS_UE (1 << 4)
488#define FPUS_PE (1 << 5)
489#define FPUS_SF (1 << 6)
490#define FPUS_SE (1 << 7)
491#define FPUS_B (1 << 15)
492
493#define FPUC_EM 0x3f
494
495extern const CPU86_LDouble f15rk[7];
496
497void helper_fldt_ST0_A0(void);
498void helper_fstt_ST0_A0(void);
499void fpu_raise_exception(void);
500CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
501void helper_fbld_ST0_A0(void);
502void helper_fbst_ST0_A0(void);
503void helper_f2xm1(void);
504void helper_fyl2x(void);
505void helper_fptan(void);
506void helper_fpatan(void);
507void helper_fxtract(void);
508void helper_fprem1(void);
509void helper_fprem(void);
510void helper_fyl2xp1(void);
511void helper_fsqrt(void);
512void helper_fsincos(void);
513void helper_frndint(void);
514void helper_fscale(void);
515void helper_fsin(void);
516void helper_fcos(void);
517void helper_fxam_ST0(void);
518void helper_fstenv(target_ulong ptr, int data32);
519void helper_fldenv(target_ulong ptr, int data32);
520void helper_fsave(target_ulong ptr, int data32);
521void helper_frstor(target_ulong ptr, int data32);
522void helper_fxsave(target_ulong ptr, int data64);
523void helper_fxrstor(target_ulong ptr, int data64);
524void restore_native_fp_state(CPUState *env);
525void save_native_fp_state(CPUState *env);
526float approx_rsqrt(float a);
527float approx_rcp(float a);
528void update_fp_status(void);
529void helper_hlt(void);
530void helper_monitor(void);
531void helper_mwait(void);
532
533extern const uint8_t parity_table[256];
534extern const uint8_t rclw_table[32];
535extern const uint8_t rclb_table[32];
536
537static inline uint32_t compute_eflags(void)
538{
539 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
540}
541
542/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
543static inline void load_eflags(int eflags, int update_mask)
544{
545 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
546 DF = 1 - (2 * ((eflags >> 10) & 1));
547 env->eflags = (env->eflags & ~update_mask) |
548 (eflags & update_mask);
549}
550
551static inline void env_to_regs(void)
552{
553#ifdef reg_EAX
554 EAX = env->regs[R_EAX];
555#endif
556#ifdef reg_ECX
557 ECX = env->regs[R_ECX];
558#endif
559#ifdef reg_EDX
560 EDX = env->regs[R_EDX];
561#endif
562#ifdef reg_EBX
563 EBX = env->regs[R_EBX];
564#endif
565#ifdef reg_ESP
566 ESP = env->regs[R_ESP];
567#endif
568#ifdef reg_EBP
569 EBP = env->regs[R_EBP];
570#endif
571#ifdef reg_ESI
572 ESI = env->regs[R_ESI];
573#endif
574#ifdef reg_EDI
575 EDI = env->regs[R_EDI];
576#endif
577}
578
579static inline void regs_to_env(void)
580{
581#ifdef reg_EAX
582 env->regs[R_EAX] = EAX;
583#endif
584#ifdef reg_ECX
585 env->regs[R_ECX] = ECX;
586#endif
587#ifdef reg_EDX
588 env->regs[R_EDX] = EDX;
589#endif
590#ifdef reg_EBX
591 env->regs[R_EBX] = EBX;
592#endif
593#ifdef reg_ESP
594 env->regs[R_ESP] = ESP;
595#endif
596#ifdef reg_EBP
597 env->regs[R_EBP] = EBP;
598#endif
599#ifdef reg_ESI
600 env->regs[R_ESI] = ESI;
601#endif
602#ifdef reg_EDI
603 env->regs[R_EDI] = EDI;
604#endif
605}
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