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source: vbox/trunk/src/recompiler/target-i386/op.c@ 1510

Last change on this file since 1510 was 1510, checked in by vboxsync, 18 years ago

Using a null selector is illegal.

  • Property svn:eol-style set to native
File size: 44.4 KB
Line 
1/*
2 * i386 micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#define ASM_SOFTMMU
22#include "exec.h"
23
24/* n must be a constant to be efficient */
25static inline target_long lshift(target_long x, int n)
26{
27 if (n >= 0)
28 return x << n;
29 else
30 return x >> (-n);
31}
32
33/* we define the various pieces of code used by the JIT */
34
35#define REG EAX
36#define REGNAME _EAX
37#include "opreg_template.h"
38#undef REG
39#undef REGNAME
40
41#define REG ECX
42#define REGNAME _ECX
43#include "opreg_template.h"
44#undef REG
45#undef REGNAME
46
47#define REG EDX
48#define REGNAME _EDX
49#include "opreg_template.h"
50#undef REG
51#undef REGNAME
52
53#define REG EBX
54#define REGNAME _EBX
55#include "opreg_template.h"
56#undef REG
57#undef REGNAME
58
59#define REG ESP
60#define REGNAME _ESP
61#include "opreg_template.h"
62#undef REG
63#undef REGNAME
64
65#define REG EBP
66#define REGNAME _EBP
67#include "opreg_template.h"
68#undef REG
69#undef REGNAME
70
71#define REG ESI
72#define REGNAME _ESI
73#include "opreg_template.h"
74#undef REG
75#undef REGNAME
76
77#define REG EDI
78#define REGNAME _EDI
79#include "opreg_template.h"
80#undef REG
81#undef REGNAME
82
83#ifdef TARGET_X86_64
84
85#define REG (env->regs[8])
86#define REGNAME _R8
87#include "opreg_template.h"
88#undef REG
89#undef REGNAME
90
91#define REG (env->regs[9])
92#define REGNAME _R9
93#include "opreg_template.h"
94#undef REG
95#undef REGNAME
96
97#define REG (env->regs[10])
98#define REGNAME _R10
99#include "opreg_template.h"
100#undef REG
101#undef REGNAME
102
103#define REG (env->regs[11])
104#define REGNAME _R11
105#include "opreg_template.h"
106#undef REG
107#undef REGNAME
108
109#define REG (env->regs[12])
110#define REGNAME _R12
111#include "opreg_template.h"
112#undef REG
113#undef REGNAME
114
115#define REG (env->regs[13])
116#define REGNAME _R13
117#include "opreg_template.h"
118#undef REG
119#undef REGNAME
120
121#define REG (env->regs[14])
122#define REGNAME _R14
123#include "opreg_template.h"
124#undef REG
125#undef REGNAME
126
127#define REG (env->regs[15])
128#define REGNAME _R15
129#include "opreg_template.h"
130#undef REG
131#undef REGNAME
132
133#endif
134
135/* operations with flags */
136
137/* update flags with T0 and T1 (add/sub case) */
138void OPPROTO op_update2_cc(void)
139{
140 CC_SRC = T1;
141 CC_DST = T0;
142}
143
144/* update flags with T0 (logic operation case) */
145void OPPROTO op_update1_cc(void)
146{
147 CC_DST = T0;
148}
149
150void OPPROTO op_update_neg_cc(void)
151{
152 CC_SRC = -T0;
153 CC_DST = T0;
154}
155
156void OPPROTO op_cmpl_T0_T1_cc(void)
157{
158 CC_SRC = T1;
159 CC_DST = T0 - T1;
160}
161
162void OPPROTO op_update_inc_cc(void)
163{
164 CC_SRC = cc_table[CC_OP].compute_c();
165 CC_DST = T0;
166}
167
168void OPPROTO op_testl_T0_T1_cc(void)
169{
170 CC_DST = T0 & T1;
171}
172
173/* operations without flags */
174
175void OPPROTO op_addl_T0_T1(void)
176{
177 T0 += T1;
178}
179
180void OPPROTO op_orl_T0_T1(void)
181{
182 T0 |= T1;
183}
184
185void OPPROTO op_andl_T0_T1(void)
186{
187 T0 &= T1;
188}
189
190void OPPROTO op_subl_T0_T1(void)
191{
192 T0 -= T1;
193}
194
195void OPPROTO op_xorl_T0_T1(void)
196{
197 T0 ^= T1;
198}
199
200void OPPROTO op_negl_T0(void)
201{
202 T0 = -T0;
203}
204
205void OPPROTO op_incl_T0(void)
206{
207 T0++;
208}
209
210void OPPROTO op_decl_T0(void)
211{
212 T0--;
213}
214
215void OPPROTO op_notl_T0(void)
216{
217 T0 = ~T0;
218}
219
220void OPPROTO op_bswapl_T0(void)
221{
222 T0 = bswap32(T0);
223}
224
225#ifdef TARGET_X86_64
226void OPPROTO op_bswapq_T0(void)
227{
228 T0 = bswap64(T0);
229}
230#endif
231
232/* multiply/divide */
233
234/* XXX: add eflags optimizations */
235/* XXX: add non P4 style flags */
236
237void OPPROTO op_mulb_AL_T0(void)
238{
239 unsigned int res;
240 res = (uint8_t)EAX * (uint8_t)T0;
241 EAX = (EAX & ~0xffff) | res;
242 CC_DST = res;
243 CC_SRC = (res & 0xff00);
244}
245
246void OPPROTO op_imulb_AL_T0(void)
247{
248 int res;
249 res = (int8_t)EAX * (int8_t)T0;
250 EAX = (EAX & ~0xffff) | (res & 0xffff);
251 CC_DST = res;
252 CC_SRC = (res != (int8_t)res);
253}
254
255void OPPROTO op_mulw_AX_T0(void)
256{
257 unsigned int res;
258 res = (uint16_t)EAX * (uint16_t)T0;
259 EAX = (EAX & ~0xffff) | (res & 0xffff);
260 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
261 CC_DST = res;
262 CC_SRC = res >> 16;
263}
264
265void OPPROTO op_imulw_AX_T0(void)
266{
267 int res;
268 res = (int16_t)EAX * (int16_t)T0;
269 EAX = (EAX & ~0xffff) | (res & 0xffff);
270 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
271 CC_DST = res;
272 CC_SRC = (res != (int16_t)res);
273}
274
275void OPPROTO op_mull_EAX_T0(void)
276{
277 uint64_t res;
278 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
279 EAX = (uint32_t)res;
280 EDX = (uint32_t)(res >> 32);
281 CC_DST = (uint32_t)res;
282 CC_SRC = (uint32_t)(res >> 32);
283}
284
285void OPPROTO op_imull_EAX_T0(void)
286{
287 int64_t res;
288 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
289 EAX = (uint32_t)(res);
290 EDX = (uint32_t)(res >> 32);
291 CC_DST = res;
292 CC_SRC = (res != (int32_t)res);
293}
294
295void OPPROTO op_imulw_T0_T1(void)
296{
297 int res;
298 res = (int16_t)T0 * (int16_t)T1;
299 T0 = res;
300 CC_DST = res;
301 CC_SRC = (res != (int16_t)res);
302}
303
304void OPPROTO op_imull_T0_T1(void)
305{
306 int64_t res;
307 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308 T0 = res;
309 CC_DST = res;
310 CC_SRC = (res != (int32_t)res);
311}
312
313#ifdef TARGET_X86_64
314void OPPROTO op_mulq_EAX_T0(void)
315{
316 helper_mulq_EAX_T0();
317}
318
319void OPPROTO op_imulq_EAX_T0(void)
320{
321 helper_imulq_EAX_T0();
322}
323
324void OPPROTO op_imulq_T0_T1(void)
325{
326 helper_imulq_T0_T1();
327}
328#endif
329
330/* division, flags are undefined */
331
332void OPPROTO op_divb_AL_T0(void)
333{
334 unsigned int num, den, q, r;
335
336 num = (EAX & 0xffff);
337 den = (T0 & 0xff);
338 if (den == 0) {
339 raise_exception(EXCP00_DIVZ);
340 }
341 q = (num / den);
342 if (q > 0xff)
343 raise_exception(EXCP00_DIVZ);
344 q &= 0xff;
345 r = (num % den) & 0xff;
346 EAX = (EAX & ~0xffff) | (r << 8) | q;
347}
348
349void OPPROTO op_idivb_AL_T0(void)
350{
351 int num, den, q, r;
352
353 num = (int16_t)EAX;
354 den = (int8_t)T0;
355 if (den == 0) {
356 raise_exception(EXCP00_DIVZ);
357 }
358 q = (num / den);
359 if (q != (int8_t)q)
360 raise_exception(EXCP00_DIVZ);
361 q &= 0xff;
362 r = (num % den) & 0xff;
363 EAX = (EAX & ~0xffff) | (r << 8) | q;
364}
365
366void OPPROTO op_divw_AX_T0(void)
367{
368 unsigned int num, den, q, r;
369
370 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
371 den = (T0 & 0xffff);
372 if (den == 0) {
373 raise_exception(EXCP00_DIVZ);
374 }
375 q = (num / den);
376 if (q > 0xffff)
377 raise_exception(EXCP00_DIVZ);
378 q &= 0xffff;
379 r = (num % den) & 0xffff;
380 EAX = (EAX & ~0xffff) | q;
381 EDX = (EDX & ~0xffff) | r;
382}
383
384void OPPROTO op_idivw_AX_T0(void)
385{
386 int num, den, q, r;
387
388 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
389 den = (int16_t)T0;
390 if (den == 0) {
391 raise_exception(EXCP00_DIVZ);
392 }
393 q = (num / den);
394 if (q != (int16_t)q)
395 raise_exception(EXCP00_DIVZ);
396 q &= 0xffff;
397 r = (num % den) & 0xffff;
398 EAX = (EAX & ~0xffff) | q;
399 EDX = (EDX & ~0xffff) | r;
400}
401
402void OPPROTO op_divl_EAX_T0(void)
403{
404 helper_divl_EAX_T0();
405}
406
407void OPPROTO op_idivl_EAX_T0(void)
408{
409 helper_idivl_EAX_T0();
410}
411
412#ifdef TARGET_X86_64
413void OPPROTO op_divq_EAX_T0(void)
414{
415 helper_divq_EAX_T0();
416}
417
418void OPPROTO op_idivq_EAX_T0(void)
419{
420 helper_idivq_EAX_T0();
421}
422#endif
423
424/* constant load & misc op */
425
426/* XXX: consistent names */
427void OPPROTO op_movl_T0_imu(void)
428{
429 T0 = (uint32_t)PARAM1;
430}
431
432void OPPROTO op_movl_T0_im(void)
433{
434 T0 = (int32_t)PARAM1;
435}
436
437void OPPROTO op_addl_T0_im(void)
438{
439 T0 += PARAM1;
440}
441
442void OPPROTO op_andl_T0_ffff(void)
443{
444 T0 = T0 & 0xffff;
445}
446
447void OPPROTO op_andl_T0_im(void)
448{
449 T0 = T0 & PARAM1;
450}
451
452void OPPROTO op_movl_T0_T1(void)
453{
454 T0 = T1;
455}
456
457void OPPROTO op_movl_T1_imu(void)
458{
459 T1 = (uint32_t)PARAM1;
460}
461
462void OPPROTO op_movl_T1_im(void)
463{
464 T1 = (int32_t)PARAM1;
465}
466
467void OPPROTO op_addl_T1_im(void)
468{
469 T1 += PARAM1;
470}
471
472void OPPROTO op_movl_T1_A0(void)
473{
474 T1 = A0;
475}
476
477void OPPROTO op_movl_A0_im(void)
478{
479 A0 = (uint32_t)PARAM1;
480}
481
482void OPPROTO op_addl_A0_im(void)
483{
484 A0 = (uint32_t)(A0 + PARAM1);
485}
486
487void OPPROTO op_movl_A0_seg(void)
488{
489#ifdef VBOX
490 /** @todo Not very efficient, but the least invasive. */
491 /** @todo Pass segment register index as parameter in translate.c. */
492 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
493
494 if (env->segs[idx].newselector && !(env->eflags & VM_MASK))
495 {
496 sync_seg(env, idx, env->segs[idx].newselector);
497 }
498 /* Loading a null selector into a segment register is valid, but using it is most definitely not! */
499 if ( (env->cr[0] & (CR0_PE_MASK|CR0_PG_MASK)) == (CR0_PE_MASK|CR0_PG_MASK)
500 && !(env->eflags & VM_MASK)
501 && env->segs[idx].selector == 0
502 )
503 {
504 raise_exception(EXCP0D_GPF);
505 }
506
507 A0 = (uint32_t)env->segs[idx].base;
508#else
509 A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
510#endif
511}
512
513void OPPROTO op_addl_A0_seg(void)
514{
515#ifdef VBOX
516 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
517
518 if (env->segs[idx].newselector && !(env->eflags & VM_MASK))
519 {
520 sync_seg(env, idx, env->segs[idx].newselector);
521 }
522 /* Loading a null selector into a segment register is valid, but using it is most definitely not! */
523 if ( (env->cr[0] & (CR0_PE_MASK|CR0_PG_MASK)) == (CR0_PE_MASK|CR0_PG_MASK)
524 && !(env->eflags & VM_MASK)
525 && env->segs[idx].selector == 0
526 )
527 {
528 raise_exception(EXCP0D_GPF);
529 }
530
531 A0 = (uint32_t)(A0 + env->segs[idx].base);
532#else
533 A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
534#endif
535}
536
537void OPPROTO op_addl_A0_AL(void)
538{
539 A0 = (uint32_t)(A0 + (EAX & 0xff));
540}
541
542#ifdef WORDS_BIGENDIAN
543typedef union UREG64 {
544 struct { uint16_t v3, v2, v1, v0; } w;
545 struct { uint32_t v1, v0; } l;
546 uint64_t q;
547} UREG64;
548#else
549typedef union UREG64 {
550 struct { uint16_t v0, v1, v2, v3; } w;
551 struct { uint32_t v0, v1; } l;
552 uint64_t q;
553} UREG64;
554#endif
555
556#ifdef TARGET_X86_64
557
558#define PARAMQ1 \
559({\
560 UREG64 __p;\
561 __p.l.v1 = PARAM1;\
562 __p.l.v0 = PARAM2;\
563 __p.q;\
564})
565
566void OPPROTO op_movq_T0_im64(void)
567{
568 T0 = PARAMQ1;
569}
570
571void OPPROTO op_movq_T1_im64(void)
572{
573 T1 = PARAMQ1;
574}
575
576void OPPROTO op_movq_A0_im(void)
577{
578 A0 = (int32_t)PARAM1;
579}
580
581void OPPROTO op_movq_A0_im64(void)
582{
583 A0 = PARAMQ1;
584}
585
586void OPPROTO op_addq_A0_im(void)
587{
588 A0 = (A0 + (int32_t)PARAM1);
589}
590
591void OPPROTO op_addq_A0_im64(void)
592{
593 A0 = (A0 + PARAMQ1);
594}
595
596void OPPROTO op_movq_A0_seg(void)
597{
598#ifdef VBOX
599 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
600
601 if (env->segs[idx].newselector && !(env->eflags & VM_MASK))
602 {
603 sync_seg(env, idx, env->segs[idx].newselector);
604 }
605 A0 = (target_ulong)env->segs[idx].base;
606#else
607 A0 = *(target_ulong *)((char *)env + PARAM1);
608#endif
609}
610
611void OPPROTO op_addq_A0_seg(void)
612{
613#ifdef VBOX
614 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
615
616 if (env->segs[idx].newselector && !(env->eflags & VM_MASK))
617 {
618 sync_seg(env, idx, env->segs[idx].newselector);
619 }
620 A0 += (target_ulong)env->segs[idx].base;
621#else
622 A0 += *(target_ulong *)((char *)env + PARAM1);
623#endif
624}
625
626void OPPROTO op_addq_A0_AL(void)
627{
628 A0 = (A0 + (EAX & 0xff));
629}
630
631#endif
632
633void OPPROTO op_andl_A0_ffff(void)
634{
635 A0 = A0 & 0xffff;
636}
637
638/* memory access */
639
640#define MEMSUFFIX _raw
641#include "ops_mem.h"
642
643#if !defined(CONFIG_USER_ONLY)
644#define MEMSUFFIX _kernel
645#include "ops_mem.h"
646
647#define MEMSUFFIX _user
648#include "ops_mem.h"
649#endif
650
651/* indirect jump */
652
653void OPPROTO op_jmp_T0(void)
654{
655 EIP = T0;
656}
657
658void OPPROTO op_movl_eip_im(void)
659{
660 EIP = (uint32_t)PARAM1;
661}
662
663#ifdef TARGET_X86_64
664void OPPROTO op_movq_eip_im(void)
665{
666 EIP = (int32_t)PARAM1;
667}
668
669void OPPROTO op_movq_eip_im64(void)
670{
671 EIP = PARAMQ1;
672}
673#endif
674
675void OPPROTO op_hlt(void)
676{
677 helper_hlt();
678}
679
680void OPPROTO op_monitor(void)
681{
682 helper_monitor();
683}
684
685void OPPROTO op_mwait(void)
686{
687 helper_mwait();
688}
689
690void OPPROTO op_debug(void)
691{
692 env->exception_index = EXCP_DEBUG;
693 cpu_loop_exit();
694}
695
696void OPPROTO op_raise_interrupt(void)
697{
698 int intno, next_eip_addend;
699 intno = PARAM1;
700 next_eip_addend = PARAM2;
701 raise_interrupt(intno, 1, 0, next_eip_addend);
702}
703
704void OPPROTO op_raise_exception(void)
705{
706 int exception_index;
707 exception_index = PARAM1;
708 raise_exception(exception_index);
709}
710
711void OPPROTO op_into(void)
712{
713 int eflags;
714 eflags = cc_table[CC_OP].compute_all();
715 if (eflags & CC_O) {
716 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
717 }
718 FORCE_RET();
719}
720
721void OPPROTO op_cli(void)
722{
723 env->eflags &= ~IF_MASK;
724}
725
726void OPPROTO op_sti(void)
727{
728 env->eflags |= IF_MASK;
729}
730
731void OPPROTO op_set_inhibit_irq(void)
732{
733 env->hflags |= HF_INHIBIT_IRQ_MASK;
734}
735
736void OPPROTO op_reset_inhibit_irq(void)
737{
738 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
739}
740
741#ifdef VBOX
742/* vm86plus instructions */
743void OPPROTO op_cli_vme(void)
744{
745 env->eflags &= ~VIF_MASK;
746}
747
748void OPPROTO op_sti_vme(void)
749{
750 /* First check, then change eflags according to the AMD manual */
751 if (env->eflags & VIP_MASK) {
752 raise_exception(EXCP0D_GPF);
753 }
754 env->eflags |= VIF_MASK;
755 FORCE_RET();
756}
757#endif
758
759void OPPROTO op_boundw(void)
760{
761 int low, high, v;
762 low = ldsw(A0);
763 high = ldsw(A0 + 2);
764 v = (int16_t)T0;
765 if (v < low || v > high) {
766 raise_exception(EXCP05_BOUND);
767 }
768 FORCE_RET();
769}
770
771void OPPROTO op_boundl(void)
772{
773 int low, high, v;
774 low = ldl(A0);
775 high = ldl(A0 + 4);
776 v = T0;
777 if (v < low || v > high) {
778 raise_exception(EXCP05_BOUND);
779 }
780 FORCE_RET();
781}
782
783void OPPROTO op_cmpxchg8b(void)
784{
785 helper_cmpxchg8b();
786}
787
788void OPPROTO op_movl_T0_0(void)
789{
790 T0 = 0;
791}
792
793#ifdef VBOX
794
795/** @todo Ugly: Exit current TB to process an external interrupt request */
796#define CPU_INTERRUPT_EXTERNAL_EXIT 0x0200 /* also defined in cpu-all.h!! */
797#define CPU_INTERRUPT_EXTERNAL_HARD 0x0400 /* also defined in cpu-all.h!! */
798#define CPU_INTERRUPT_EXTERNAL_TIMER 0x0800 /* also defined in cpu-all.h!! */
799#define CPU_INTERRUPT_EXTERNAL_DMA 0x1000 /* also defined in cpu-all.h!! */
800
801void OPPROTO op_check_external_event(void)
802{
803 if ( (env->interrupt_request & ( CPU_INTERRUPT_EXTERNAL_EXIT
804 | CPU_INTERRUPT_EXTERNAL_TIMER
805 | CPU_INTERRUPT_EXTERNAL_DMA))
806 || ( (env->interrupt_request & CPU_INTERRUPT_EXTERNAL_HARD)
807 && (env->eflags & IF_MASK)
808 && !(env->hflags & HF_INHIBIT_IRQ_MASK) ) )
809 {
810 helper_external_event();
811 }
812}
813#endif /* VBOX */
814
815void OPPROTO op_exit_tb(void)
816{
817 EXIT_TB();
818}
819
820/* multiple size ops */
821
822#define ldul ldl
823
824#define SHIFT 0
825#include "ops_template.h"
826#undef SHIFT
827
828#define SHIFT 1
829#include "ops_template.h"
830#undef SHIFT
831
832#define SHIFT 2
833#include "ops_template.h"
834#undef SHIFT
835
836#ifdef TARGET_X86_64
837
838#define SHIFT 3
839#include "ops_template.h"
840#undef SHIFT
841
842#endif
843
844/* sign extend */
845
846void OPPROTO op_movsbl_T0_T0(void)
847{
848 T0 = (int8_t)T0;
849}
850
851void OPPROTO op_movzbl_T0_T0(void)
852{
853 T0 = (uint8_t)T0;
854}
855
856void OPPROTO op_movswl_T0_T0(void)
857{
858 T0 = (int16_t)T0;
859}
860
861void OPPROTO op_movzwl_T0_T0(void)
862{
863 T0 = (uint16_t)T0;
864}
865
866void OPPROTO op_movswl_EAX_AX(void)
867{
868 EAX = (int16_t)EAX;
869}
870
871#ifdef TARGET_X86_64
872void OPPROTO op_movslq_T0_T0(void)
873{
874 T0 = (int32_t)T0;
875}
876
877void OPPROTO op_movslq_RAX_EAX(void)
878{
879 EAX = (int32_t)EAX;
880}
881#endif
882
883void OPPROTO op_movsbw_AX_AL(void)
884{
885 EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
886}
887
888void OPPROTO op_movslq_EDX_EAX(void)
889{
890 EDX = (int32_t)EAX >> 31;
891}
892
893void OPPROTO op_movswl_DX_AX(void)
894{
895 EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
896}
897
898#ifdef TARGET_X86_64
899void OPPROTO op_movsqo_RDX_RAX(void)
900{
901 EDX = (int64_t)EAX >> 63;
902}
903#endif
904
905/* string ops helpers */
906
907void OPPROTO op_addl_ESI_T0(void)
908{
909 ESI = (uint32_t)(ESI + T0);
910}
911
912void OPPROTO op_addw_ESI_T0(void)
913{
914 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
915}
916
917void OPPROTO op_addl_EDI_T0(void)
918{
919 EDI = (uint32_t)(EDI + T0);
920}
921
922void OPPROTO op_addw_EDI_T0(void)
923{
924 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
925}
926
927void OPPROTO op_decl_ECX(void)
928{
929 ECX = (uint32_t)(ECX - 1);
930}
931
932void OPPROTO op_decw_ECX(void)
933{
934 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
935}
936
937#ifdef TARGET_X86_64
938void OPPROTO op_addq_ESI_T0(void)
939{
940 ESI = (ESI + T0);
941}
942
943void OPPROTO op_addq_EDI_T0(void)
944{
945 EDI = (EDI + T0);
946}
947
948void OPPROTO op_decq_ECX(void)
949{
950 ECX--;
951}
952#endif
953
954/* push/pop utils */
955
956void op_addl_A0_SS(void)
957{
958 A0 += (long)env->segs[R_SS].base;
959}
960
961void op_subl_A0_2(void)
962{
963 A0 = (uint32_t)(A0 - 2);
964}
965
966void op_subl_A0_4(void)
967{
968 A0 = (uint32_t)(A0 - 4);
969}
970
971void op_addl_ESP_4(void)
972{
973 ESP = (uint32_t)(ESP + 4);
974}
975
976void op_addl_ESP_2(void)
977{
978 ESP = (uint32_t)(ESP + 2);
979}
980
981void op_addw_ESP_4(void)
982{
983 ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
984}
985
986void op_addw_ESP_2(void)
987{
988 ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
989}
990
991void op_addl_ESP_im(void)
992{
993 ESP = (uint32_t)(ESP + PARAM1);
994}
995
996void op_addw_ESP_im(void)
997{
998 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
999}
1000
1001#ifdef TARGET_X86_64
1002void op_subq_A0_8(void)
1003{
1004 A0 -= 8;
1005}
1006
1007void op_addq_ESP_8(void)
1008{
1009 ESP += 8;
1010}
1011
1012void op_addq_ESP_im(void)
1013{
1014 ESP += PARAM1;
1015}
1016#endif
1017
1018void OPPROTO op_rdtsc(void)
1019{
1020 helper_rdtsc();
1021}
1022
1023void OPPROTO op_cpuid(void)
1024{
1025 helper_cpuid();
1026}
1027
1028void OPPROTO op_enter_level(void)
1029{
1030 helper_enter_level(PARAM1, PARAM2);
1031}
1032
1033void OPPROTO op_sysenter(void)
1034{
1035 helper_sysenter();
1036}
1037
1038void OPPROTO op_sysexit(void)
1039{
1040 helper_sysexit();
1041}
1042
1043#ifdef TARGET_X86_64
1044void OPPROTO op_syscall(void)
1045{
1046 helper_syscall(PARAM1);
1047}
1048
1049void OPPROTO op_sysret(void)
1050{
1051 helper_sysret(PARAM1);
1052}
1053#endif
1054
1055void OPPROTO op_rdmsr(void)
1056{
1057 helper_rdmsr();
1058}
1059
1060void OPPROTO op_wrmsr(void)
1061{
1062 helper_wrmsr();
1063}
1064
1065/* bcd */
1066
1067/* XXX: exception */
1068void OPPROTO op_aam(void)
1069{
1070 int base = PARAM1;
1071 int al, ah;
1072 al = EAX & 0xff;
1073 ah = al / base;
1074 al = al % base;
1075 EAX = (EAX & ~0xffff) | al | (ah << 8);
1076 CC_DST = al;
1077}
1078
1079void OPPROTO op_aad(void)
1080{
1081 int base = PARAM1;
1082 int al, ah;
1083 al = EAX & 0xff;
1084 ah = (EAX >> 8) & 0xff;
1085 al = ((ah * base) + al) & 0xff;
1086 EAX = (EAX & ~0xffff) | al;
1087 CC_DST = al;
1088}
1089
1090void OPPROTO op_aaa(void)
1091{
1092 int icarry;
1093 int al, ah, af;
1094 int eflags;
1095
1096 eflags = cc_table[CC_OP].compute_all();
1097 af = eflags & CC_A;
1098 al = EAX & 0xff;
1099 ah = (EAX >> 8) & 0xff;
1100
1101 icarry = (al > 0xf9);
1102 if (((al & 0x0f) > 9 ) || af) {
1103 al = (al + 6) & 0x0f;
1104 ah = (ah + 1 + icarry) & 0xff;
1105 eflags |= CC_C | CC_A;
1106 } else {
1107 eflags &= ~(CC_C | CC_A);
1108 al &= 0x0f;
1109 }
1110 EAX = (EAX & ~0xffff) | al | (ah << 8);
1111 CC_SRC = eflags;
1112 FORCE_RET();
1113}
1114
1115void OPPROTO op_aas(void)
1116{
1117 int icarry;
1118 int al, ah, af;
1119 int eflags;
1120
1121 eflags = cc_table[CC_OP].compute_all();
1122 af = eflags & CC_A;
1123 al = EAX & 0xff;
1124 ah = (EAX >> 8) & 0xff;
1125
1126 icarry = (al < 6);
1127 if (((al & 0x0f) > 9 ) || af) {
1128 al = (al - 6) & 0x0f;
1129 ah = (ah - 1 - icarry) & 0xff;
1130 eflags |= CC_C | CC_A;
1131 } else {
1132 eflags &= ~(CC_C | CC_A);
1133 al &= 0x0f;
1134 }
1135 EAX = (EAX & ~0xffff) | al | (ah << 8);
1136 CC_SRC = eflags;
1137 FORCE_RET();
1138}
1139
1140void OPPROTO op_daa(void)
1141{
1142 int al, af, cf;
1143 int eflags;
1144
1145 eflags = cc_table[CC_OP].compute_all();
1146 cf = eflags & CC_C;
1147 af = eflags & CC_A;
1148 al = EAX & 0xff;
1149
1150 eflags = 0;
1151 if (((al & 0x0f) > 9 ) || af) {
1152 al = (al + 6) & 0xff;
1153 eflags |= CC_A;
1154 }
1155 if ((al > 0x9f) || cf) {
1156 al = (al + 0x60) & 0xff;
1157 eflags |= CC_C;
1158 }
1159 EAX = (EAX & ~0xff) | al;
1160 /* well, speed is not an issue here, so we compute the flags by hand */
1161 eflags |= (al == 0) << 6; /* zf */
1162 eflags |= parity_table[al]; /* pf */
1163 eflags |= (al & 0x80); /* sf */
1164 CC_SRC = eflags;
1165 FORCE_RET();
1166}
1167
1168void OPPROTO op_das(void)
1169{
1170 int al, al1, af, cf;
1171 int eflags;
1172
1173 eflags = cc_table[CC_OP].compute_all();
1174 cf = eflags & CC_C;
1175 af = eflags & CC_A;
1176 al = EAX & 0xff;
1177
1178 eflags = 0;
1179 al1 = al;
1180 if (((al & 0x0f) > 9 ) || af) {
1181 eflags |= CC_A;
1182 if (al < 6 || cf)
1183 eflags |= CC_C;
1184 al = (al - 6) & 0xff;
1185 }
1186 if ((al1 > 0x99) || cf) {
1187 al = (al - 0x60) & 0xff;
1188 eflags |= CC_C;
1189 }
1190 EAX = (EAX & ~0xff) | al;
1191 /* well, speed is not an issue here, so we compute the flags by hand */
1192 eflags |= (al == 0) << 6; /* zf */
1193 eflags |= parity_table[al]; /* pf */
1194 eflags |= (al & 0x80); /* sf */
1195 CC_SRC = eflags;
1196 FORCE_RET();
1197}
1198
1199/* segment handling */
1200
1201/* never use it with R_CS */
1202void OPPROTO op_movl_seg_T0(void)
1203{
1204 load_seg(PARAM1, T0);
1205}
1206
1207/* faster VM86 version */
1208void OPPROTO op_movl_seg_T0_vm(void)
1209{
1210 int selector;
1211 SegmentCache *sc;
1212
1213 selector = T0 & 0xffff;
1214 /* env->segs[] access */
1215 sc = (SegmentCache *)((char *)env + PARAM1);
1216 sc->selector = selector;
1217 sc->base = (selector << 4);
1218#ifdef VBOX
1219 sc->flags = 0; /* clear attributes */
1220#endif
1221}
1222
1223void OPPROTO op_movl_T0_seg(void)
1224{
1225 T0 = env->segs[PARAM1].selector;
1226}
1227
1228void OPPROTO op_lsl(void)
1229{
1230 helper_lsl();
1231}
1232
1233void OPPROTO op_lar(void)
1234{
1235 helper_lar();
1236}
1237
1238void OPPROTO op_verr(void)
1239{
1240 helper_verr();
1241}
1242
1243void OPPROTO op_verw(void)
1244{
1245 helper_verw();
1246}
1247
1248void OPPROTO op_arpl(void)
1249{
1250 if ((T0 & 3) < (T1 & 3)) {
1251 /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1252 T0 = (T0 & ~3) | (T1 & 3);
1253 T1 = CC_Z;
1254 } else {
1255 T1 = 0;
1256 }
1257 FORCE_RET();
1258}
1259
1260void OPPROTO op_arpl_update(void)
1261{
1262 int eflags;
1263 eflags = cc_table[CC_OP].compute_all();
1264 CC_SRC = (eflags & ~CC_Z) | T1;
1265}
1266
1267/* T0: segment, T1:eip */
1268void OPPROTO op_ljmp_protected_T0_T1(void)
1269{
1270 helper_ljmp_protected_T0_T1(PARAM1);
1271}
1272
1273void OPPROTO op_lcall_real_T0_T1(void)
1274{
1275 helper_lcall_real_T0_T1(PARAM1, PARAM2);
1276}
1277
1278void OPPROTO op_lcall_protected_T0_T1(void)
1279{
1280 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1281}
1282
1283void OPPROTO op_iret_real(void)
1284{
1285 helper_iret_real(PARAM1);
1286}
1287
1288void OPPROTO op_iret_protected(void)
1289{
1290 helper_iret_protected(PARAM1, PARAM2);
1291}
1292
1293void OPPROTO op_lret_protected(void)
1294{
1295 helper_lret_protected(PARAM1, PARAM2);
1296}
1297
1298void OPPROTO op_lldt_T0(void)
1299{
1300 helper_lldt_T0();
1301}
1302
1303void OPPROTO op_ltr_T0(void)
1304{
1305 helper_ltr_T0();
1306}
1307
1308/* CR registers access */
1309void OPPROTO op_movl_crN_T0(void)
1310{
1311 helper_movl_crN_T0(PARAM1);
1312}
1313
1314#if !defined(CONFIG_USER_ONLY)
1315void OPPROTO op_movtl_T0_cr8(void)
1316{
1317 T0 = cpu_get_apic_tpr(env);
1318}
1319#endif
1320
1321/* DR registers access */
1322void OPPROTO op_movl_drN_T0(void)
1323{
1324 helper_movl_drN_T0(PARAM1);
1325}
1326
1327void OPPROTO op_lmsw_T0(void)
1328{
1329 /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1330 if already set to one. */
1331 T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
1332 helper_movl_crN_T0(0);
1333}
1334
1335void OPPROTO op_invlpg_A0(void)
1336{
1337 helper_invlpg(A0);
1338}
1339
1340void OPPROTO op_movl_T0_env(void)
1341{
1342 T0 = *(uint32_t *)((char *)env + PARAM1);
1343}
1344
1345void OPPROTO op_movl_env_T0(void)
1346{
1347 *(uint32_t *)((char *)env + PARAM1) = T0;
1348}
1349
1350void OPPROTO op_movl_env_T1(void)
1351{
1352 *(uint32_t *)((char *)env + PARAM1) = T1;
1353}
1354
1355void OPPROTO op_movtl_T0_env(void)
1356{
1357 T0 = *(target_ulong *)((char *)env + PARAM1);
1358}
1359
1360void OPPROTO op_movtl_env_T0(void)
1361{
1362 *(target_ulong *)((char *)env + PARAM1) = T0;
1363}
1364
1365void OPPROTO op_movtl_T1_env(void)
1366{
1367 T1 = *(target_ulong *)((char *)env + PARAM1);
1368}
1369
1370void OPPROTO op_movtl_env_T1(void)
1371{
1372 *(target_ulong *)((char *)env + PARAM1) = T1;
1373}
1374
1375void OPPROTO op_clts(void)
1376{
1377 env->cr[0] &= ~CR0_TS_MASK;
1378 env->hflags &= ~HF_TS_MASK;
1379}
1380
1381/* flags handling */
1382
1383void OPPROTO op_goto_tb0(void)
1384{
1385 GOTO_TB(op_goto_tb0, PARAM1, 0);
1386}
1387
1388void OPPROTO op_goto_tb1(void)
1389{
1390 GOTO_TB(op_goto_tb1, PARAM1, 1);
1391}
1392
1393void OPPROTO op_jmp_label(void)
1394{
1395 GOTO_LABEL_PARAM(1);
1396}
1397
1398void OPPROTO op_jnz_T0_label(void)
1399{
1400 if (T0)
1401 GOTO_LABEL_PARAM(1);
1402 FORCE_RET();
1403}
1404
1405void OPPROTO op_jz_T0_label(void)
1406{
1407 if (!T0)
1408 GOTO_LABEL_PARAM(1);
1409 FORCE_RET();
1410}
1411
1412/* slow set cases (compute x86 flags) */
1413void OPPROTO op_seto_T0_cc(void)
1414{
1415 int eflags;
1416 eflags = cc_table[CC_OP].compute_all();
1417 T0 = (eflags >> 11) & 1;
1418}
1419
1420void OPPROTO op_setb_T0_cc(void)
1421{
1422 T0 = cc_table[CC_OP].compute_c();
1423}
1424
1425void OPPROTO op_setz_T0_cc(void)
1426{
1427 int eflags;
1428 eflags = cc_table[CC_OP].compute_all();
1429 T0 = (eflags >> 6) & 1;
1430}
1431
1432void OPPROTO op_setbe_T0_cc(void)
1433{
1434 int eflags;
1435 eflags = cc_table[CC_OP].compute_all();
1436 T0 = (eflags & (CC_Z | CC_C)) != 0;
1437}
1438
1439void OPPROTO op_sets_T0_cc(void)
1440{
1441 int eflags;
1442 eflags = cc_table[CC_OP].compute_all();
1443 T0 = (eflags >> 7) & 1;
1444}
1445
1446void OPPROTO op_setp_T0_cc(void)
1447{
1448 int eflags;
1449 eflags = cc_table[CC_OP].compute_all();
1450 T0 = (eflags >> 2) & 1;
1451}
1452
1453void OPPROTO op_setl_T0_cc(void)
1454{
1455 int eflags;
1456 eflags = cc_table[CC_OP].compute_all();
1457 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1458}
1459
1460void OPPROTO op_setle_T0_cc(void)
1461{
1462 int eflags;
1463 eflags = cc_table[CC_OP].compute_all();
1464 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1465}
1466
1467void OPPROTO op_xor_T0_1(void)
1468{
1469 T0 ^= 1;
1470}
1471
1472void OPPROTO op_set_cc_op(void)
1473{
1474 CC_OP = PARAM1;
1475}
1476
1477void OPPROTO op_mov_T0_cc(void)
1478{
1479 T0 = cc_table[CC_OP].compute_all();
1480}
1481
1482/* XXX: clear VIF/VIP in all ops ? */
1483#ifdef VBOX
1484/* XXX: AMD docs say they remain unchanged. */
1485#endif
1486
1487void OPPROTO op_movl_eflags_T0(void)
1488{
1489 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1490}
1491
1492void OPPROTO op_movw_eflags_T0(void)
1493{
1494 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1495}
1496
1497void OPPROTO op_movl_eflags_T0_io(void)
1498{
1499 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1500}
1501
1502void OPPROTO op_movw_eflags_T0_io(void)
1503{
1504 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1505}
1506
1507void OPPROTO op_movl_eflags_T0_cpl0(void)
1508{
1509 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1510}
1511
1512void OPPROTO op_movw_eflags_T0_cpl0(void)
1513{
1514 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1515}
1516
1517/* vm86plus version */
1518#ifdef VBOX
1519/* IOPL != 3, CR4.VME=1 */
1520void OPPROTO op_movw_eflags_T0_vme(void)
1521{
1522 unsigned int new_eflags = T0;
1523
1524 /* if virtual interrupt pending and (virtual) interrupts will be enabled -> #GP */
1525 /* if TF will be set -> #GP */
1526 if ( ((new_eflags & IF_MASK) && (env->eflags & VIP_MASK))
1527 || (new_eflags & TF_MASK))
1528 {
1529 raise_exception(EXCP0D_GPF);
1530 }
1531 else
1532 {
1533 load_eflags(new_eflags, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1534
1535 if (new_eflags & IF_MASK)
1536 env->eflags |= VIF_MASK;
1537 else
1538 env->eflags &= ~VIF_MASK;
1539 }
1540
1541 FORCE_RET();
1542}
1543#endif
1544
1545#if 0
1546void OPPROTO op_movl_eflags_T0_vm(void)
1547{
1548 int eflags;
1549 eflags = T0;
1550 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1551 DF = 1 - (2 * ((eflags >> 10) & 1));
1552 /* we also update some system flags as in user mode */
1553 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1554 (eflags & FL_UPDATE_MASK32);
1555 if (eflags & IF_MASK) {
1556 env->eflags |= VIF_MASK;
1557 if (env->eflags & VIP_MASK) {
1558 EIP = PARAM1;
1559 raise_exception(EXCP0D_GPF);
1560 }
1561 }
1562 FORCE_RET();
1563}
1564#endif
1565
1566/* XXX: compute only O flag */
1567void OPPROTO op_movb_eflags_T0(void)
1568{
1569 int of;
1570 of = cc_table[CC_OP].compute_all() & CC_O;
1571 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1572}
1573
1574void OPPROTO op_movl_T0_eflags(void)
1575{
1576 int eflags;
1577 eflags = cc_table[CC_OP].compute_all();
1578 eflags |= (DF & DF_MASK);
1579 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1580 T0 = eflags;
1581}
1582
1583/* vm86plus version */
1584#ifdef VBOX
1585void OPPROTO op_movl_T0_eflags_vme(void)
1586{
1587 int eflags;
1588 eflags = cc_table[CC_OP].compute_all();
1589 eflags |= (DF & DF_MASK);
1590 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1591 if (env->eflags & VIF_MASK)
1592 eflags |= IF_MASK;
1593 T0 = eflags;
1594}
1595#endif
1596
1597void OPPROTO op_cld(void)
1598{
1599 DF = 1;
1600}
1601
1602void OPPROTO op_std(void)
1603{
1604 DF = -1;
1605}
1606
1607void OPPROTO op_clc(void)
1608{
1609 int eflags;
1610 eflags = cc_table[CC_OP].compute_all();
1611 eflags &= ~CC_C;
1612 CC_SRC = eflags;
1613}
1614
1615void OPPROTO op_stc(void)
1616{
1617 int eflags;
1618 eflags = cc_table[CC_OP].compute_all();
1619 eflags |= CC_C;
1620 CC_SRC = eflags;
1621}
1622
1623void OPPROTO op_cmc(void)
1624{
1625 int eflags;
1626 eflags = cc_table[CC_OP].compute_all();
1627 eflags ^= CC_C;
1628 CC_SRC = eflags;
1629}
1630
1631void OPPROTO op_salc(void)
1632{
1633 int cf;
1634 cf = cc_table[CC_OP].compute_c();
1635 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1636}
1637
1638static int compute_all_eflags(void)
1639{
1640 return CC_SRC;
1641}
1642
1643static int compute_c_eflags(void)
1644{
1645 return CC_SRC & CC_C;
1646}
1647
1648CCTable cc_table[CC_OP_NB] = {
1649 [CC_OP_DYNAMIC] = { /* should never happen */ },
1650
1651 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1652
1653 [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1654 [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1655 [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1656
1657 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1658 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1659 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1660
1661 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1662 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1663 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1664
1665 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1666 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1667 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
1668
1669 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1670 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1671 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
1672
1673 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1674 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1675 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1676
1677 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1678 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1679 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1680
1681 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1682 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1683 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1684
1685 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1686 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1687 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1688
1689 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1690 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1691 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1692
1693#ifdef TARGET_X86_64
1694 [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1695
1696 [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
1697
1698 [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
1699
1700 [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
1701
1702 [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
1703
1704 [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1705
1706 [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1707
1708 [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1709
1710 [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1711
1712 [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1713#endif
1714};
1715
1716/* floating point support. Some of the code for complicated x87
1717 functions comes from the LGPL'ed x86 emulator found in the Willows
1718 TWIN windows emulator. */
1719
1720/* fp load FT0 */
1721
1722void OPPROTO op_flds_FT0_A0(void)
1723{
1724#ifdef USE_FP_CONVERT
1725 FP_CONVERT.i32 = ldl(A0);
1726 FT0 = FP_CONVERT.f;
1727#else
1728 FT0 = ldfl(A0);
1729#endif
1730}
1731
1732void OPPROTO op_fldl_FT0_A0(void)
1733{
1734#ifdef USE_FP_CONVERT
1735 FP_CONVERT.i64 = ldq(A0);
1736 FT0 = FP_CONVERT.d;
1737#else
1738 FT0 = ldfq(A0);
1739#endif
1740}
1741
1742/* helpers are needed to avoid static constant reference. XXX: find a better way */
1743#ifdef USE_INT_TO_FLOAT_HELPERS
1744
1745void helper_fild_FT0_A0(void)
1746{
1747 FT0 = (CPU86_LDouble)ldsw(A0);
1748}
1749
1750void helper_fildl_FT0_A0(void)
1751{
1752 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1753}
1754
1755void helper_fildll_FT0_A0(void)
1756{
1757 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1758}
1759
1760void OPPROTO op_fild_FT0_A0(void)
1761{
1762 helper_fild_FT0_A0();
1763}
1764
1765void OPPROTO op_fildl_FT0_A0(void)
1766{
1767 helper_fildl_FT0_A0();
1768}
1769
1770void OPPROTO op_fildll_FT0_A0(void)
1771{
1772 helper_fildll_FT0_A0();
1773}
1774
1775#else
1776
1777void OPPROTO op_fild_FT0_A0(void)
1778{
1779#ifdef USE_FP_CONVERT
1780 FP_CONVERT.i32 = ldsw(A0);
1781 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1782#else
1783 FT0 = (CPU86_LDouble)ldsw(A0);
1784#endif
1785}
1786
1787void OPPROTO op_fildl_FT0_A0(void)
1788{
1789#ifdef USE_FP_CONVERT
1790 FP_CONVERT.i32 = (int32_t) ldl(A0);
1791 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1792#else
1793 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1794#endif
1795}
1796
1797void OPPROTO op_fildll_FT0_A0(void)
1798{
1799#ifdef USE_FP_CONVERT
1800 FP_CONVERT.i64 = (int64_t) ldq(A0);
1801 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1802#else
1803 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1804#endif
1805}
1806#endif
1807
1808/* fp load ST0 */
1809
1810void OPPROTO op_flds_ST0_A0(void)
1811{
1812 int new_fpstt;
1813 new_fpstt = (env->fpstt - 1) & 7;
1814#ifdef USE_FP_CONVERT
1815 FP_CONVERT.i32 = ldl(A0);
1816 env->fpregs[new_fpstt].d = FP_CONVERT.f;
1817#else
1818 env->fpregs[new_fpstt].d = ldfl(A0);
1819#endif
1820 env->fpstt = new_fpstt;
1821 env->fptags[new_fpstt] = 0; /* validate stack entry */
1822}
1823
1824void OPPROTO op_fldl_ST0_A0(void)
1825{
1826 int new_fpstt;
1827 new_fpstt = (env->fpstt - 1) & 7;
1828#ifdef USE_FP_CONVERT
1829 FP_CONVERT.i64 = ldq(A0);
1830 env->fpregs[new_fpstt].d = FP_CONVERT.d;
1831#else
1832 env->fpregs[new_fpstt].d = ldfq(A0);
1833#endif
1834 env->fpstt = new_fpstt;
1835 env->fptags[new_fpstt] = 0; /* validate stack entry */
1836}
1837
1838void OPPROTO op_fldt_ST0_A0(void)
1839{
1840 helper_fldt_ST0_A0();
1841}
1842
1843/* helpers are needed to avoid static constant reference. XXX: find a better way */
1844#ifdef USE_INT_TO_FLOAT_HELPERS
1845
1846void helper_fild_ST0_A0(void)
1847{
1848 int new_fpstt;
1849 new_fpstt = (env->fpstt - 1) & 7;
1850 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1851 env->fpstt = new_fpstt;
1852 env->fptags[new_fpstt] = 0; /* validate stack entry */
1853}
1854
1855void helper_fildl_ST0_A0(void)
1856{
1857 int new_fpstt;
1858 new_fpstt = (env->fpstt - 1) & 7;
1859 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1860 env->fpstt = new_fpstt;
1861 env->fptags[new_fpstt] = 0; /* validate stack entry */
1862}
1863
1864void helper_fildll_ST0_A0(void)
1865{
1866 int new_fpstt;
1867 new_fpstt = (env->fpstt - 1) & 7;
1868 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1869 env->fpstt = new_fpstt;
1870 env->fptags[new_fpstt] = 0; /* validate stack entry */
1871}
1872
1873void OPPROTO op_fild_ST0_A0(void)
1874{
1875 helper_fild_ST0_A0();
1876}
1877
1878void OPPROTO op_fildl_ST0_A0(void)
1879{
1880 helper_fildl_ST0_A0();
1881}
1882
1883void OPPROTO op_fildll_ST0_A0(void)
1884{
1885 helper_fildll_ST0_A0();
1886}
1887
1888#else
1889
1890void OPPROTO op_fild_ST0_A0(void)
1891{
1892 int new_fpstt;
1893 new_fpstt = (env->fpstt - 1) & 7;
1894#ifdef USE_FP_CONVERT
1895 FP_CONVERT.i32 = ldsw(A0);
1896 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1897#else
1898 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1899#endif
1900 env->fpstt = new_fpstt;
1901 env->fptags[new_fpstt] = 0; /* validate stack entry */
1902}
1903
1904void OPPROTO op_fildl_ST0_A0(void)
1905{
1906 int new_fpstt;
1907 new_fpstt = (env->fpstt - 1) & 7;
1908#ifdef USE_FP_CONVERT
1909 FP_CONVERT.i32 = (int32_t) ldl(A0);
1910 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1911#else
1912 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1913#endif
1914 env->fpstt = new_fpstt;
1915 env->fptags[new_fpstt] = 0; /* validate stack entry */
1916}
1917
1918void OPPROTO op_fildll_ST0_A0(void)
1919{
1920 int new_fpstt;
1921 new_fpstt = (env->fpstt - 1) & 7;
1922#ifdef USE_FP_CONVERT
1923 FP_CONVERT.i64 = (int64_t) ldq(A0);
1924 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
1925#else
1926 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1927#endif
1928 env->fpstt = new_fpstt;
1929 env->fptags[new_fpstt] = 0; /* validate stack entry */
1930}
1931
1932#endif
1933
1934/* fp store */
1935
1936void OPPROTO op_fsts_ST0_A0(void)
1937{
1938#ifdef USE_FP_CONVERT
1939 FP_CONVERT.f = (float)ST0;
1940 stfl(A0, FP_CONVERT.f);
1941#else
1942 stfl(A0, (float)ST0);
1943#endif
1944 FORCE_RET();
1945}
1946
1947void OPPROTO op_fstl_ST0_A0(void)
1948{
1949 stfq(A0, (double)ST0);
1950 FORCE_RET();
1951}
1952
1953void OPPROTO op_fstt_ST0_A0(void)
1954{
1955 helper_fstt_ST0_A0();
1956}
1957
1958void OPPROTO op_fist_ST0_A0(void)
1959{
1960#if defined(__sparc__) && !defined(__sparc_v9__)
1961 register CPU86_LDouble d asm("o0");
1962#else
1963 CPU86_LDouble d;
1964#endif
1965 int val;
1966
1967 d = ST0;
1968 val = lrint(d);
1969 if (val != (int16_t)val)
1970 val = -32768;
1971 stw(A0, val);
1972 FORCE_RET();
1973}
1974
1975void OPPROTO op_fistl_ST0_A0(void)
1976{
1977#if defined(__sparc__) && !defined(__sparc_v9__)
1978 register CPU86_LDouble d asm("o0");
1979#else
1980 CPU86_LDouble d;
1981#endif
1982 int val;
1983
1984 d = ST0;
1985 val = lrint(d);
1986 stl(A0, val);
1987 FORCE_RET();
1988}
1989
1990void OPPROTO op_fistll_ST0_A0(void)
1991{
1992#if defined(__sparc__) && !defined(__sparc_v9__)
1993 register CPU86_LDouble d asm("o0");
1994#else
1995 CPU86_LDouble d;
1996#endif
1997 int64_t val;
1998
1999 d = ST0;
2000 val = llrint(d);
2001 stq(A0, val);
2002 FORCE_RET();
2003}
2004
2005void OPPROTO op_fbld_ST0_A0(void)
2006{
2007 helper_fbld_ST0_A0();
2008}
2009
2010void OPPROTO op_fbst_ST0_A0(void)
2011{
2012 helper_fbst_ST0_A0();
2013}
2014
2015/* FPU move */
2016
2017void OPPROTO op_fpush(void)
2018{
2019 fpush();
2020}
2021
2022void OPPROTO op_fpop(void)
2023{
2024 fpop();
2025}
2026
2027void OPPROTO op_fdecstp(void)
2028{
2029 env->fpstt = (env->fpstt - 1) & 7;
2030 env->fpus &= (~0x4700);
2031}
2032
2033void OPPROTO op_fincstp(void)
2034{
2035 env->fpstt = (env->fpstt + 1) & 7;
2036 env->fpus &= (~0x4700);
2037}
2038
2039void OPPROTO op_ffree_STN(void)
2040{
2041 env->fptags[(env->fpstt + PARAM1) & 7] = 1;
2042}
2043
2044void OPPROTO op_fmov_ST0_FT0(void)
2045{
2046 ST0 = FT0;
2047}
2048
2049void OPPROTO op_fmov_FT0_STN(void)
2050{
2051 FT0 = ST(PARAM1);
2052}
2053
2054void OPPROTO op_fmov_ST0_STN(void)
2055{
2056 ST0 = ST(PARAM1);
2057}
2058
2059void OPPROTO op_fmov_STN_ST0(void)
2060{
2061 ST(PARAM1) = ST0;
2062}
2063
2064void OPPROTO op_fxchg_ST0_STN(void)
2065{
2066 CPU86_LDouble tmp;
2067 tmp = ST(PARAM1);
2068 ST(PARAM1) = ST0;
2069 ST0 = tmp;
2070}
2071
2072/* FPU operations */
2073
2074/* XXX: handle nans */
2075void OPPROTO op_fcom_ST0_FT0(void)
2076{
2077 env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
2078 if (ST0 < FT0)
2079 env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
2080 else if (ST0 == FT0)
2081 env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
2082 FORCE_RET();
2083}
2084
2085/* XXX: handle nans */
2086void OPPROTO op_fucom_ST0_FT0(void)
2087{
2088 env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
2089 if (ST0 < FT0)
2090 env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
2091 else if (ST0 == FT0)
2092 env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
2093 FORCE_RET();
2094}
2095
2096/* XXX: handle nans */
2097void OPPROTO op_fcomi_ST0_FT0(void)
2098{
2099 int eflags;
2100 eflags = cc_table[CC_OP].compute_all();
2101 eflags &= ~(CC_Z | CC_P | CC_C);
2102 if (ST0 < FT0)
2103 eflags |= CC_C;
2104 else if (ST0 == FT0)
2105 eflags |= CC_Z;
2106 CC_SRC = eflags;
2107 FORCE_RET();
2108}
2109
2110/* XXX: handle nans */
2111void OPPROTO op_fucomi_ST0_FT0(void)
2112{
2113 int eflags;
2114 eflags = cc_table[CC_OP].compute_all();
2115 eflags &= ~(CC_Z | CC_P | CC_C);
2116 if (ST0 < FT0)
2117 eflags |= CC_C;
2118 else if (ST0 == FT0)
2119 eflags |= CC_Z;
2120 CC_SRC = eflags;
2121 FORCE_RET();
2122}
2123
2124void OPPROTO op_fcmov_ST0_STN_T0(void)
2125{
2126 if (T0) {
2127 ST0 = ST(PARAM1);
2128 }
2129 FORCE_RET();
2130}
2131
2132void OPPROTO op_fadd_ST0_FT0(void)
2133{
2134 ST0 += FT0;
2135}
2136
2137void OPPROTO op_fmul_ST0_FT0(void)
2138{
2139 ST0 *= FT0;
2140}
2141
2142void OPPROTO op_fsub_ST0_FT0(void)
2143{
2144 ST0 -= FT0;
2145}
2146
2147void OPPROTO op_fsubr_ST0_FT0(void)
2148{
2149 ST0 = FT0 - ST0;
2150}
2151
2152void OPPROTO op_fdiv_ST0_FT0(void)
2153{
2154 ST0 = helper_fdiv(ST0, FT0);
2155}
2156
2157void OPPROTO op_fdivr_ST0_FT0(void)
2158{
2159 ST0 = helper_fdiv(FT0, ST0);
2160}
2161
2162/* fp operations between STN and ST0 */
2163
2164void OPPROTO op_fadd_STN_ST0(void)
2165{
2166 ST(PARAM1) += ST0;
2167}
2168
2169void OPPROTO op_fmul_STN_ST0(void)
2170{
2171 ST(PARAM1) *= ST0;
2172}
2173
2174void OPPROTO op_fsub_STN_ST0(void)
2175{
2176 ST(PARAM1) -= ST0;
2177}
2178
2179void OPPROTO op_fsubr_STN_ST0(void)
2180{
2181 CPU86_LDouble *p;
2182 p = &ST(PARAM1);
2183 *p = ST0 - *p;
2184}
2185
2186void OPPROTO op_fdiv_STN_ST0(void)
2187{
2188 CPU86_LDouble *p;
2189 p = &ST(PARAM1);
2190 *p = helper_fdiv(*p, ST0);
2191}
2192
2193void OPPROTO op_fdivr_STN_ST0(void)
2194{
2195 CPU86_LDouble *p;
2196 p = &ST(PARAM1);
2197 *p = helper_fdiv(ST0, *p);
2198}
2199
2200/* misc FPU operations */
2201void OPPROTO op_fchs_ST0(void)
2202{
2203 ST0 = -ST0;
2204}
2205
2206void OPPROTO op_fabs_ST0(void)
2207{
2208 ST0 = fabs(ST0);
2209}
2210
2211void OPPROTO op_fxam_ST0(void)
2212{
2213 helper_fxam_ST0();
2214}
2215
2216void OPPROTO op_fld1_ST0(void)
2217{
2218 ST0 = f15rk[1];
2219}
2220
2221void OPPROTO op_fldl2t_ST0(void)
2222{
2223 ST0 = f15rk[6];
2224}
2225
2226void OPPROTO op_fldl2e_ST0(void)
2227{
2228 ST0 = f15rk[5];
2229}
2230
2231void OPPROTO op_fldpi_ST0(void)
2232{
2233 ST0 = f15rk[2];
2234}
2235
2236void OPPROTO op_fldlg2_ST0(void)
2237{
2238 ST0 = f15rk[3];
2239}
2240
2241void OPPROTO op_fldln2_ST0(void)
2242{
2243 ST0 = f15rk[4];
2244}
2245
2246void OPPROTO op_fldz_ST0(void)
2247{
2248 ST0 = f15rk[0];
2249}
2250
2251void OPPROTO op_fldz_FT0(void)
2252{
2253 FT0 = f15rk[0];
2254}
2255
2256/* associated heplers to reduce generated code length and to simplify
2257 relocation (FP constants are usually stored in .rodata section) */
2258
2259void OPPROTO op_f2xm1(void)
2260{
2261 helper_f2xm1();
2262}
2263
2264void OPPROTO op_fyl2x(void)
2265{
2266 helper_fyl2x();
2267}
2268
2269void OPPROTO op_fptan(void)
2270{
2271 helper_fptan();
2272}
2273
2274void OPPROTO op_fpatan(void)
2275{
2276 helper_fpatan();
2277}
2278
2279void OPPROTO op_fxtract(void)
2280{
2281 helper_fxtract();
2282}
2283
2284void OPPROTO op_fprem1(void)
2285{
2286 helper_fprem1();
2287}
2288
2289
2290void OPPROTO op_fprem(void)
2291{
2292 helper_fprem();
2293}
2294
2295void OPPROTO op_fyl2xp1(void)
2296{
2297 helper_fyl2xp1();
2298}
2299
2300void OPPROTO op_fsqrt(void)
2301{
2302 helper_fsqrt();
2303}
2304
2305void OPPROTO op_fsincos(void)
2306{
2307 helper_fsincos();
2308}
2309
2310void OPPROTO op_frndint(void)
2311{
2312 helper_frndint();
2313}
2314
2315void OPPROTO op_fscale(void)
2316{
2317 helper_fscale();
2318}
2319
2320void OPPROTO op_fsin(void)
2321{
2322 helper_fsin();
2323}
2324
2325void OPPROTO op_fcos(void)
2326{
2327 helper_fcos();
2328}
2329
2330void OPPROTO op_fnstsw_A0(void)
2331{
2332 int fpus;
2333 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2334 stw(A0, fpus);
2335 FORCE_RET();
2336}
2337
2338void OPPROTO op_fnstsw_EAX(void)
2339{
2340 int fpus;
2341 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2342 EAX = (EAX & ~0xffff) | fpus;
2343}
2344
2345void OPPROTO op_fnstcw_A0(void)
2346{
2347 stw(A0, env->fpuc);
2348 FORCE_RET();
2349}
2350
2351void OPPROTO op_fldcw_A0(void)
2352{
2353 int rnd_type;
2354 env->fpuc = lduw(A0);
2355 /* set rounding mode */
2356 switch(env->fpuc & RC_MASK) {
2357 default:
2358 case RC_NEAR:
2359 rnd_type = FE_TONEAREST;
2360 break;
2361 case RC_DOWN:
2362 rnd_type = FE_DOWNWARD;
2363 break;
2364 case RC_UP:
2365 rnd_type = FE_UPWARD;
2366 break;
2367 case RC_CHOP:
2368 rnd_type = FE_TOWARDZERO;
2369 break;
2370 }
2371 fesetround(rnd_type);
2372}
2373
2374void OPPROTO op_fclex(void)
2375{
2376 env->fpus &= 0x7f00;
2377}
2378
2379void OPPROTO op_fwait(void)
2380{
2381 if (env->fpus & FPUS_SE)
2382 fpu_raise_exception();
2383 FORCE_RET();
2384}
2385
2386void OPPROTO op_fninit(void)
2387{
2388 env->fpus = 0;
2389 env->fpstt = 0;
2390 env->fpuc = 0x37f;
2391 env->fptags[0] = 1;
2392 env->fptags[1] = 1;
2393 env->fptags[2] = 1;
2394 env->fptags[3] = 1;
2395 env->fptags[4] = 1;
2396 env->fptags[5] = 1;
2397 env->fptags[6] = 1;
2398 env->fptags[7] = 1;
2399}
2400
2401void OPPROTO op_fnstenv_A0(void)
2402{
2403 helper_fstenv(A0, PARAM1);
2404}
2405
2406void OPPROTO op_fldenv_A0(void)
2407{
2408 helper_fldenv(A0, PARAM1);
2409}
2410
2411void OPPROTO op_fnsave_A0(void)
2412{
2413 helper_fsave(A0, PARAM1);
2414}
2415
2416void OPPROTO op_frstor_A0(void)
2417{
2418 helper_frstor(A0, PARAM1);
2419}
2420
2421/* threading support */
2422void OPPROTO op_lock(void)
2423{
2424 cpu_lock();
2425}
2426
2427void OPPROTO op_unlock(void)
2428{
2429 cpu_unlock();
2430}
2431
2432/* SSE support */
2433static inline void memcpy16(void *d, void *s)
2434{
2435 ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2436 ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2437 ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2438 ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2439}
2440
2441void OPPROTO op_movo(void)
2442{
2443 /* XXX: badly generated code */
2444 XMMReg *d, *s;
2445 d = (XMMReg *)((char *)env + PARAM1);
2446 s = (XMMReg *)((char *)env + PARAM2);
2447 memcpy16(d, s);
2448}
2449
2450void OPPROTO op_movq(void)
2451{
2452 uint64_t *d, *s;
2453 d = (uint64_t *)((char *)env + PARAM1);
2454 s = (uint64_t *)((char *)env + PARAM2);
2455 *d = *s;
2456}
2457
2458void OPPROTO op_movl(void)
2459{
2460 uint32_t *d, *s;
2461 d = (uint32_t *)((char *)env + PARAM1);
2462 s = (uint32_t *)((char *)env + PARAM2);
2463 *d = *s;
2464}
2465
2466void OPPROTO op_movq_env_0(void)
2467{
2468 uint64_t *d;
2469 d = (uint64_t *)((char *)env + PARAM1);
2470 *d = 0;
2471}
2472
2473void OPPROTO op_fxsave_A0(void)
2474{
2475 helper_fxsave(A0, PARAM1);
2476}
2477
2478void OPPROTO op_fxrstor_A0(void)
2479{
2480 helper_fxrstor(A0, PARAM1);
2481}
2482
2483/* XXX: optimize by storing fptt and fptags in the static cpu state */
2484void OPPROTO op_enter_mmx(void)
2485{
2486 env->fpstt = 0;
2487 *(uint32_t *)(env->fptags) = 0;
2488 *(uint32_t *)(env->fptags + 4) = 0;
2489}
2490
2491void OPPROTO op_emms(void)
2492{
2493 /* set to empty state */
2494 *(uint32_t *)(env->fptags) = 0x01010101;
2495 *(uint32_t *)(env->fptags + 4) = 0x01010101;
2496}
2497
2498#define SHIFT 0
2499#include "ops_sse.h"
2500
2501#define SHIFT 1
2502#include "ops_sse.h"
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