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source: vbox/trunk/src/recompiler/target-i386/op.c@ 1511

Last change on this file since 1511 was 1511, checked in by vboxsync, 18 years ago

Needs more testing

  • Property svn:eol-style set to native
File size: 44.4 KB
Line 
1/*
2 * i386 micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#define ASM_SOFTMMU
22#include "exec.h"
23
24/* n must be a constant to be efficient */
25static inline target_long lshift(target_long x, int n)
26{
27 if (n >= 0)
28 return x << n;
29 else
30 return x >> (-n);
31}
32
33/* we define the various pieces of code used by the JIT */
34
35#define REG EAX
36#define REGNAME _EAX
37#include "opreg_template.h"
38#undef REG
39#undef REGNAME
40
41#define REG ECX
42#define REGNAME _ECX
43#include "opreg_template.h"
44#undef REG
45#undef REGNAME
46
47#define REG EDX
48#define REGNAME _EDX
49#include "opreg_template.h"
50#undef REG
51#undef REGNAME
52
53#define REG EBX
54#define REGNAME _EBX
55#include "opreg_template.h"
56#undef REG
57#undef REGNAME
58
59#define REG ESP
60#define REGNAME _ESP
61#include "opreg_template.h"
62#undef REG
63#undef REGNAME
64
65#define REG EBP
66#define REGNAME _EBP
67#include "opreg_template.h"
68#undef REG
69#undef REGNAME
70
71#define REG ESI
72#define REGNAME _ESI
73#include "opreg_template.h"
74#undef REG
75#undef REGNAME
76
77#define REG EDI
78#define REGNAME _EDI
79#include "opreg_template.h"
80#undef REG
81#undef REGNAME
82
83#ifdef TARGET_X86_64
84
85#define REG (env->regs[8])
86#define REGNAME _R8
87#include "opreg_template.h"
88#undef REG
89#undef REGNAME
90
91#define REG (env->regs[9])
92#define REGNAME _R9
93#include "opreg_template.h"
94#undef REG
95#undef REGNAME
96
97#define REG (env->regs[10])
98#define REGNAME _R10
99#include "opreg_template.h"
100#undef REG
101#undef REGNAME
102
103#define REG (env->regs[11])
104#define REGNAME _R11
105#include "opreg_template.h"
106#undef REG
107#undef REGNAME
108
109#define REG (env->regs[12])
110#define REGNAME _R12
111#include "opreg_template.h"
112#undef REG
113#undef REGNAME
114
115#define REG (env->regs[13])
116#define REGNAME _R13
117#include "opreg_template.h"
118#undef REG
119#undef REGNAME
120
121#define REG (env->regs[14])
122#define REGNAME _R14
123#include "opreg_template.h"
124#undef REG
125#undef REGNAME
126
127#define REG (env->regs[15])
128#define REGNAME _R15
129#include "opreg_template.h"
130#undef REG
131#undef REGNAME
132
133#endif
134
135/* operations with flags */
136
137/* update flags with T0 and T1 (add/sub case) */
138void OPPROTO op_update2_cc(void)
139{
140 CC_SRC = T1;
141 CC_DST = T0;
142}
143
144/* update flags with T0 (logic operation case) */
145void OPPROTO op_update1_cc(void)
146{
147 CC_DST = T0;
148}
149
150void OPPROTO op_update_neg_cc(void)
151{
152 CC_SRC = -T0;
153 CC_DST = T0;
154}
155
156void OPPROTO op_cmpl_T0_T1_cc(void)
157{
158 CC_SRC = T1;
159 CC_DST = T0 - T1;
160}
161
162void OPPROTO op_update_inc_cc(void)
163{
164 CC_SRC = cc_table[CC_OP].compute_c();
165 CC_DST = T0;
166}
167
168void OPPROTO op_testl_T0_T1_cc(void)
169{
170 CC_DST = T0 & T1;
171}
172
173/* operations without flags */
174
175void OPPROTO op_addl_T0_T1(void)
176{
177 T0 += T1;
178}
179
180void OPPROTO op_orl_T0_T1(void)
181{
182 T0 |= T1;
183}
184
185void OPPROTO op_andl_T0_T1(void)
186{
187 T0 &= T1;
188}
189
190void OPPROTO op_subl_T0_T1(void)
191{
192 T0 -= T1;
193}
194
195void OPPROTO op_xorl_T0_T1(void)
196{
197 T0 ^= T1;
198}
199
200void OPPROTO op_negl_T0(void)
201{
202 T0 = -T0;
203}
204
205void OPPROTO op_incl_T0(void)
206{
207 T0++;
208}
209
210void OPPROTO op_decl_T0(void)
211{
212 T0--;
213}
214
215void OPPROTO op_notl_T0(void)
216{
217 T0 = ~T0;
218}
219
220void OPPROTO op_bswapl_T0(void)
221{
222 T0 = bswap32(T0);
223}
224
225#ifdef TARGET_X86_64
226void OPPROTO op_bswapq_T0(void)
227{
228 T0 = bswap64(T0);
229}
230#endif
231
232/* multiply/divide */
233
234/* XXX: add eflags optimizations */
235/* XXX: add non P4 style flags */
236
237void OPPROTO op_mulb_AL_T0(void)
238{
239 unsigned int res;
240 res = (uint8_t)EAX * (uint8_t)T0;
241 EAX = (EAX & ~0xffff) | res;
242 CC_DST = res;
243 CC_SRC = (res & 0xff00);
244}
245
246void OPPROTO op_imulb_AL_T0(void)
247{
248 int res;
249 res = (int8_t)EAX * (int8_t)T0;
250 EAX = (EAX & ~0xffff) | (res & 0xffff);
251 CC_DST = res;
252 CC_SRC = (res != (int8_t)res);
253}
254
255void OPPROTO op_mulw_AX_T0(void)
256{
257 unsigned int res;
258 res = (uint16_t)EAX * (uint16_t)T0;
259 EAX = (EAX & ~0xffff) | (res & 0xffff);
260 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
261 CC_DST = res;
262 CC_SRC = res >> 16;
263}
264
265void OPPROTO op_imulw_AX_T0(void)
266{
267 int res;
268 res = (int16_t)EAX * (int16_t)T0;
269 EAX = (EAX & ~0xffff) | (res & 0xffff);
270 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
271 CC_DST = res;
272 CC_SRC = (res != (int16_t)res);
273}
274
275void OPPROTO op_mull_EAX_T0(void)
276{
277 uint64_t res;
278 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
279 EAX = (uint32_t)res;
280 EDX = (uint32_t)(res >> 32);
281 CC_DST = (uint32_t)res;
282 CC_SRC = (uint32_t)(res >> 32);
283}
284
285void OPPROTO op_imull_EAX_T0(void)
286{
287 int64_t res;
288 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
289 EAX = (uint32_t)(res);
290 EDX = (uint32_t)(res >> 32);
291 CC_DST = res;
292 CC_SRC = (res != (int32_t)res);
293}
294
295void OPPROTO op_imulw_T0_T1(void)
296{
297 int res;
298 res = (int16_t)T0 * (int16_t)T1;
299 T0 = res;
300 CC_DST = res;
301 CC_SRC = (res != (int16_t)res);
302}
303
304void OPPROTO op_imull_T0_T1(void)
305{
306 int64_t res;
307 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308 T0 = res;
309 CC_DST = res;
310 CC_SRC = (res != (int32_t)res);
311}
312
313#ifdef TARGET_X86_64
314void OPPROTO op_mulq_EAX_T0(void)
315{
316 helper_mulq_EAX_T0();
317}
318
319void OPPROTO op_imulq_EAX_T0(void)
320{
321 helper_imulq_EAX_T0();
322}
323
324void OPPROTO op_imulq_T0_T1(void)
325{
326 helper_imulq_T0_T1();
327}
328#endif
329
330/* division, flags are undefined */
331
332void OPPROTO op_divb_AL_T0(void)
333{
334 unsigned int num, den, q, r;
335
336 num = (EAX & 0xffff);
337 den = (T0 & 0xff);
338 if (den == 0) {
339 raise_exception(EXCP00_DIVZ);
340 }
341 q = (num / den);
342 if (q > 0xff)
343 raise_exception(EXCP00_DIVZ);
344 q &= 0xff;
345 r = (num % den) & 0xff;
346 EAX = (EAX & ~0xffff) | (r << 8) | q;
347}
348
349void OPPROTO op_idivb_AL_T0(void)
350{
351 int num, den, q, r;
352
353 num = (int16_t)EAX;
354 den = (int8_t)T0;
355 if (den == 0) {
356 raise_exception(EXCP00_DIVZ);
357 }
358 q = (num / den);
359 if (q != (int8_t)q)
360 raise_exception(EXCP00_DIVZ);
361 q &= 0xff;
362 r = (num % den) & 0xff;
363 EAX = (EAX & ~0xffff) | (r << 8) | q;
364}
365
366void OPPROTO op_divw_AX_T0(void)
367{
368 unsigned int num, den, q, r;
369
370 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
371 den = (T0 & 0xffff);
372 if (den == 0) {
373 raise_exception(EXCP00_DIVZ);
374 }
375 q = (num / den);
376 if (q > 0xffff)
377 raise_exception(EXCP00_DIVZ);
378 q &= 0xffff;
379 r = (num % den) & 0xffff;
380 EAX = (EAX & ~0xffff) | q;
381 EDX = (EDX & ~0xffff) | r;
382}
383
384void OPPROTO op_idivw_AX_T0(void)
385{
386 int num, den, q, r;
387
388 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
389 den = (int16_t)T0;
390 if (den == 0) {
391 raise_exception(EXCP00_DIVZ);
392 }
393 q = (num / den);
394 if (q != (int16_t)q)
395 raise_exception(EXCP00_DIVZ);
396 q &= 0xffff;
397 r = (num % den) & 0xffff;
398 EAX = (EAX & ~0xffff) | q;
399 EDX = (EDX & ~0xffff) | r;
400}
401
402void OPPROTO op_divl_EAX_T0(void)
403{
404 helper_divl_EAX_T0();
405}
406
407void OPPROTO op_idivl_EAX_T0(void)
408{
409 helper_idivl_EAX_T0();
410}
411
412#ifdef TARGET_X86_64
413void OPPROTO op_divq_EAX_T0(void)
414{
415 helper_divq_EAX_T0();
416}
417
418void OPPROTO op_idivq_EAX_T0(void)
419{
420 helper_idivq_EAX_T0();
421}
422#endif
423
424/* constant load & misc op */
425
426/* XXX: consistent names */
427void OPPROTO op_movl_T0_imu(void)
428{
429 T0 = (uint32_t)PARAM1;
430}
431
432void OPPROTO op_movl_T0_im(void)
433{
434 T0 = (int32_t)PARAM1;
435}
436
437void OPPROTO op_addl_T0_im(void)
438{
439 T0 += PARAM1;
440}
441
442void OPPROTO op_andl_T0_ffff(void)
443{
444 T0 = T0 & 0xffff;
445}
446
447void OPPROTO op_andl_T0_im(void)
448{
449 T0 = T0 & PARAM1;
450}
451
452void OPPROTO op_movl_T0_T1(void)
453{
454 T0 = T1;
455}
456
457void OPPROTO op_movl_T1_imu(void)
458{
459 T1 = (uint32_t)PARAM1;
460}
461
462void OPPROTO op_movl_T1_im(void)
463{
464 T1 = (int32_t)PARAM1;
465}
466
467void OPPROTO op_addl_T1_im(void)
468{
469 T1 += PARAM1;
470}
471
472void OPPROTO op_movl_T1_A0(void)
473{
474 T1 = A0;
475}
476
477void OPPROTO op_movl_A0_im(void)
478{
479 A0 = (uint32_t)PARAM1;
480}
481
482void OPPROTO op_addl_A0_im(void)
483{
484 A0 = (uint32_t)(A0 + PARAM1);
485}
486
487void OPPROTO op_movl_A0_seg(void)
488{
489#ifdef VBOX
490 /** @todo Not very efficient, but the least invasive. */
491 /** @todo Pass segment register index as parameter in translate.c. */
492 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
493
494 if (env->segs[idx].newselector && !(env->eflags & VM_MASK))
495 {
496 sync_seg(env, idx, env->segs[idx].newselector);
497 }
498#if 0
499 /* Loading a null selector into a segment register is valid, but using it is most definitely not! */
500 if ( (env->cr[0] & (CR0_PE_MASK|CR0_PG_MASK)) == (CR0_PE_MASK|CR0_PG_MASK)
501 && !(env->eflags & VM_MASK)
502 && env->segs[idx].selector == 0
503 )
504 {
505 raise_exception(EXCP0D_GPF);
506 }
507#endif
508
509 A0 = (uint32_t)env->segs[idx].base;
510#else
511 A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
512#endif
513}
514
515void OPPROTO op_addl_A0_seg(void)
516{
517#ifdef VBOX
518 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
519
520 if (env->segs[idx].newselector && !(env->eflags & VM_MASK))
521 {
522 sync_seg(env, idx, env->segs[idx].newselector);
523 }
524#if 0
525 /* Loading a null selector into a segment register is valid, but using it is most definitely not! */
526 if ( (env->cr[0] & (CR0_PE_MASK|CR0_PG_MASK)) == (CR0_PE_MASK|CR0_PG_MASK)
527 && !(env->eflags & VM_MASK)
528 && env->segs[idx].selector == 0
529 )
530 {
531 raise_exception(EXCP0D_GPF);
532 }
533#endif
534 A0 = (uint32_t)(A0 + env->segs[idx].base);
535#else
536 A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
537#endif
538}
539
540void OPPROTO op_addl_A0_AL(void)
541{
542 A0 = (uint32_t)(A0 + (EAX & 0xff));
543}
544
545#ifdef WORDS_BIGENDIAN
546typedef union UREG64 {
547 struct { uint16_t v3, v2, v1, v0; } w;
548 struct { uint32_t v1, v0; } l;
549 uint64_t q;
550} UREG64;
551#else
552typedef union UREG64 {
553 struct { uint16_t v0, v1, v2, v3; } w;
554 struct { uint32_t v0, v1; } l;
555 uint64_t q;
556} UREG64;
557#endif
558
559#ifdef TARGET_X86_64
560
561#define PARAMQ1 \
562({\
563 UREG64 __p;\
564 __p.l.v1 = PARAM1;\
565 __p.l.v0 = PARAM2;\
566 __p.q;\
567})
568
569void OPPROTO op_movq_T0_im64(void)
570{
571 T0 = PARAMQ1;
572}
573
574void OPPROTO op_movq_T1_im64(void)
575{
576 T1 = PARAMQ1;
577}
578
579void OPPROTO op_movq_A0_im(void)
580{
581 A0 = (int32_t)PARAM1;
582}
583
584void OPPROTO op_movq_A0_im64(void)
585{
586 A0 = PARAMQ1;
587}
588
589void OPPROTO op_addq_A0_im(void)
590{
591 A0 = (A0 + (int32_t)PARAM1);
592}
593
594void OPPROTO op_addq_A0_im64(void)
595{
596 A0 = (A0 + PARAMQ1);
597}
598
599void OPPROTO op_movq_A0_seg(void)
600{
601#ifdef VBOX
602 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
603
604 if (env->segs[idx].newselector && !(env->eflags & VM_MASK))
605 {
606 sync_seg(env, idx, env->segs[idx].newselector);
607 }
608 A0 = (target_ulong)env->segs[idx].base;
609#else
610 A0 = *(target_ulong *)((char *)env + PARAM1);
611#endif
612}
613
614void OPPROTO op_addq_A0_seg(void)
615{
616#ifdef VBOX
617 uint32_t idx = (PARAM1 - offsetof(CPUX86State,segs[0].base)) / sizeof(SegmentCache);
618
619 if (env->segs[idx].newselector && !(env->eflags & VM_MASK))
620 {
621 sync_seg(env, idx, env->segs[idx].newselector);
622 }
623 A0 += (target_ulong)env->segs[idx].base;
624#else
625 A0 += *(target_ulong *)((char *)env + PARAM1);
626#endif
627}
628
629void OPPROTO op_addq_A0_AL(void)
630{
631 A0 = (A0 + (EAX & 0xff));
632}
633
634#endif
635
636void OPPROTO op_andl_A0_ffff(void)
637{
638 A0 = A0 & 0xffff;
639}
640
641/* memory access */
642
643#define MEMSUFFIX _raw
644#include "ops_mem.h"
645
646#if !defined(CONFIG_USER_ONLY)
647#define MEMSUFFIX _kernel
648#include "ops_mem.h"
649
650#define MEMSUFFIX _user
651#include "ops_mem.h"
652#endif
653
654/* indirect jump */
655
656void OPPROTO op_jmp_T0(void)
657{
658 EIP = T0;
659}
660
661void OPPROTO op_movl_eip_im(void)
662{
663 EIP = (uint32_t)PARAM1;
664}
665
666#ifdef TARGET_X86_64
667void OPPROTO op_movq_eip_im(void)
668{
669 EIP = (int32_t)PARAM1;
670}
671
672void OPPROTO op_movq_eip_im64(void)
673{
674 EIP = PARAMQ1;
675}
676#endif
677
678void OPPROTO op_hlt(void)
679{
680 helper_hlt();
681}
682
683void OPPROTO op_monitor(void)
684{
685 helper_monitor();
686}
687
688void OPPROTO op_mwait(void)
689{
690 helper_mwait();
691}
692
693void OPPROTO op_debug(void)
694{
695 env->exception_index = EXCP_DEBUG;
696 cpu_loop_exit();
697}
698
699void OPPROTO op_raise_interrupt(void)
700{
701 int intno, next_eip_addend;
702 intno = PARAM1;
703 next_eip_addend = PARAM2;
704 raise_interrupt(intno, 1, 0, next_eip_addend);
705}
706
707void OPPROTO op_raise_exception(void)
708{
709 int exception_index;
710 exception_index = PARAM1;
711 raise_exception(exception_index);
712}
713
714void OPPROTO op_into(void)
715{
716 int eflags;
717 eflags = cc_table[CC_OP].compute_all();
718 if (eflags & CC_O) {
719 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
720 }
721 FORCE_RET();
722}
723
724void OPPROTO op_cli(void)
725{
726 env->eflags &= ~IF_MASK;
727}
728
729void OPPROTO op_sti(void)
730{
731 env->eflags |= IF_MASK;
732}
733
734void OPPROTO op_set_inhibit_irq(void)
735{
736 env->hflags |= HF_INHIBIT_IRQ_MASK;
737}
738
739void OPPROTO op_reset_inhibit_irq(void)
740{
741 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
742}
743
744#ifdef VBOX
745/* vm86plus instructions */
746void OPPROTO op_cli_vme(void)
747{
748 env->eflags &= ~VIF_MASK;
749}
750
751void OPPROTO op_sti_vme(void)
752{
753 /* First check, then change eflags according to the AMD manual */
754 if (env->eflags & VIP_MASK) {
755 raise_exception(EXCP0D_GPF);
756 }
757 env->eflags |= VIF_MASK;
758 FORCE_RET();
759}
760#endif
761
762void OPPROTO op_boundw(void)
763{
764 int low, high, v;
765 low = ldsw(A0);
766 high = ldsw(A0 + 2);
767 v = (int16_t)T0;
768 if (v < low || v > high) {
769 raise_exception(EXCP05_BOUND);
770 }
771 FORCE_RET();
772}
773
774void OPPROTO op_boundl(void)
775{
776 int low, high, v;
777 low = ldl(A0);
778 high = ldl(A0 + 4);
779 v = T0;
780 if (v < low || v > high) {
781 raise_exception(EXCP05_BOUND);
782 }
783 FORCE_RET();
784}
785
786void OPPROTO op_cmpxchg8b(void)
787{
788 helper_cmpxchg8b();
789}
790
791void OPPROTO op_movl_T0_0(void)
792{
793 T0 = 0;
794}
795
796#ifdef VBOX
797
798/** @todo Ugly: Exit current TB to process an external interrupt request */
799#define CPU_INTERRUPT_EXTERNAL_EXIT 0x0200 /* also defined in cpu-all.h!! */
800#define CPU_INTERRUPT_EXTERNAL_HARD 0x0400 /* also defined in cpu-all.h!! */
801#define CPU_INTERRUPT_EXTERNAL_TIMER 0x0800 /* also defined in cpu-all.h!! */
802#define CPU_INTERRUPT_EXTERNAL_DMA 0x1000 /* also defined in cpu-all.h!! */
803
804void OPPROTO op_check_external_event(void)
805{
806 if ( (env->interrupt_request & ( CPU_INTERRUPT_EXTERNAL_EXIT
807 | CPU_INTERRUPT_EXTERNAL_TIMER
808 | CPU_INTERRUPT_EXTERNAL_DMA))
809 || ( (env->interrupt_request & CPU_INTERRUPT_EXTERNAL_HARD)
810 && (env->eflags & IF_MASK)
811 && !(env->hflags & HF_INHIBIT_IRQ_MASK) ) )
812 {
813 helper_external_event();
814 }
815}
816#endif /* VBOX */
817
818void OPPROTO op_exit_tb(void)
819{
820 EXIT_TB();
821}
822
823/* multiple size ops */
824
825#define ldul ldl
826
827#define SHIFT 0
828#include "ops_template.h"
829#undef SHIFT
830
831#define SHIFT 1
832#include "ops_template.h"
833#undef SHIFT
834
835#define SHIFT 2
836#include "ops_template.h"
837#undef SHIFT
838
839#ifdef TARGET_X86_64
840
841#define SHIFT 3
842#include "ops_template.h"
843#undef SHIFT
844
845#endif
846
847/* sign extend */
848
849void OPPROTO op_movsbl_T0_T0(void)
850{
851 T0 = (int8_t)T0;
852}
853
854void OPPROTO op_movzbl_T0_T0(void)
855{
856 T0 = (uint8_t)T0;
857}
858
859void OPPROTO op_movswl_T0_T0(void)
860{
861 T0 = (int16_t)T0;
862}
863
864void OPPROTO op_movzwl_T0_T0(void)
865{
866 T0 = (uint16_t)T0;
867}
868
869void OPPROTO op_movswl_EAX_AX(void)
870{
871 EAX = (int16_t)EAX;
872}
873
874#ifdef TARGET_X86_64
875void OPPROTO op_movslq_T0_T0(void)
876{
877 T0 = (int32_t)T0;
878}
879
880void OPPROTO op_movslq_RAX_EAX(void)
881{
882 EAX = (int32_t)EAX;
883}
884#endif
885
886void OPPROTO op_movsbw_AX_AL(void)
887{
888 EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
889}
890
891void OPPROTO op_movslq_EDX_EAX(void)
892{
893 EDX = (int32_t)EAX >> 31;
894}
895
896void OPPROTO op_movswl_DX_AX(void)
897{
898 EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
899}
900
901#ifdef TARGET_X86_64
902void OPPROTO op_movsqo_RDX_RAX(void)
903{
904 EDX = (int64_t)EAX >> 63;
905}
906#endif
907
908/* string ops helpers */
909
910void OPPROTO op_addl_ESI_T0(void)
911{
912 ESI = (uint32_t)(ESI + T0);
913}
914
915void OPPROTO op_addw_ESI_T0(void)
916{
917 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
918}
919
920void OPPROTO op_addl_EDI_T0(void)
921{
922 EDI = (uint32_t)(EDI + T0);
923}
924
925void OPPROTO op_addw_EDI_T0(void)
926{
927 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
928}
929
930void OPPROTO op_decl_ECX(void)
931{
932 ECX = (uint32_t)(ECX - 1);
933}
934
935void OPPROTO op_decw_ECX(void)
936{
937 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
938}
939
940#ifdef TARGET_X86_64
941void OPPROTO op_addq_ESI_T0(void)
942{
943 ESI = (ESI + T0);
944}
945
946void OPPROTO op_addq_EDI_T0(void)
947{
948 EDI = (EDI + T0);
949}
950
951void OPPROTO op_decq_ECX(void)
952{
953 ECX--;
954}
955#endif
956
957/* push/pop utils */
958
959void op_addl_A0_SS(void)
960{
961 A0 += (long)env->segs[R_SS].base;
962}
963
964void op_subl_A0_2(void)
965{
966 A0 = (uint32_t)(A0 - 2);
967}
968
969void op_subl_A0_4(void)
970{
971 A0 = (uint32_t)(A0 - 4);
972}
973
974void op_addl_ESP_4(void)
975{
976 ESP = (uint32_t)(ESP + 4);
977}
978
979void op_addl_ESP_2(void)
980{
981 ESP = (uint32_t)(ESP + 2);
982}
983
984void op_addw_ESP_4(void)
985{
986 ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
987}
988
989void op_addw_ESP_2(void)
990{
991 ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
992}
993
994void op_addl_ESP_im(void)
995{
996 ESP = (uint32_t)(ESP + PARAM1);
997}
998
999void op_addw_ESP_im(void)
1000{
1001 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
1002}
1003
1004#ifdef TARGET_X86_64
1005void op_subq_A0_8(void)
1006{
1007 A0 -= 8;
1008}
1009
1010void op_addq_ESP_8(void)
1011{
1012 ESP += 8;
1013}
1014
1015void op_addq_ESP_im(void)
1016{
1017 ESP += PARAM1;
1018}
1019#endif
1020
1021void OPPROTO op_rdtsc(void)
1022{
1023 helper_rdtsc();
1024}
1025
1026void OPPROTO op_cpuid(void)
1027{
1028 helper_cpuid();
1029}
1030
1031void OPPROTO op_enter_level(void)
1032{
1033 helper_enter_level(PARAM1, PARAM2);
1034}
1035
1036void OPPROTO op_sysenter(void)
1037{
1038 helper_sysenter();
1039}
1040
1041void OPPROTO op_sysexit(void)
1042{
1043 helper_sysexit();
1044}
1045
1046#ifdef TARGET_X86_64
1047void OPPROTO op_syscall(void)
1048{
1049 helper_syscall(PARAM1);
1050}
1051
1052void OPPROTO op_sysret(void)
1053{
1054 helper_sysret(PARAM1);
1055}
1056#endif
1057
1058void OPPROTO op_rdmsr(void)
1059{
1060 helper_rdmsr();
1061}
1062
1063void OPPROTO op_wrmsr(void)
1064{
1065 helper_wrmsr();
1066}
1067
1068/* bcd */
1069
1070/* XXX: exception */
1071void OPPROTO op_aam(void)
1072{
1073 int base = PARAM1;
1074 int al, ah;
1075 al = EAX & 0xff;
1076 ah = al / base;
1077 al = al % base;
1078 EAX = (EAX & ~0xffff) | al | (ah << 8);
1079 CC_DST = al;
1080}
1081
1082void OPPROTO op_aad(void)
1083{
1084 int base = PARAM1;
1085 int al, ah;
1086 al = EAX & 0xff;
1087 ah = (EAX >> 8) & 0xff;
1088 al = ((ah * base) + al) & 0xff;
1089 EAX = (EAX & ~0xffff) | al;
1090 CC_DST = al;
1091}
1092
1093void OPPROTO op_aaa(void)
1094{
1095 int icarry;
1096 int al, ah, af;
1097 int eflags;
1098
1099 eflags = cc_table[CC_OP].compute_all();
1100 af = eflags & CC_A;
1101 al = EAX & 0xff;
1102 ah = (EAX >> 8) & 0xff;
1103
1104 icarry = (al > 0xf9);
1105 if (((al & 0x0f) > 9 ) || af) {
1106 al = (al + 6) & 0x0f;
1107 ah = (ah + 1 + icarry) & 0xff;
1108 eflags |= CC_C | CC_A;
1109 } else {
1110 eflags &= ~(CC_C | CC_A);
1111 al &= 0x0f;
1112 }
1113 EAX = (EAX & ~0xffff) | al | (ah << 8);
1114 CC_SRC = eflags;
1115 FORCE_RET();
1116}
1117
1118void OPPROTO op_aas(void)
1119{
1120 int icarry;
1121 int al, ah, af;
1122 int eflags;
1123
1124 eflags = cc_table[CC_OP].compute_all();
1125 af = eflags & CC_A;
1126 al = EAX & 0xff;
1127 ah = (EAX >> 8) & 0xff;
1128
1129 icarry = (al < 6);
1130 if (((al & 0x0f) > 9 ) || af) {
1131 al = (al - 6) & 0x0f;
1132 ah = (ah - 1 - icarry) & 0xff;
1133 eflags |= CC_C | CC_A;
1134 } else {
1135 eflags &= ~(CC_C | CC_A);
1136 al &= 0x0f;
1137 }
1138 EAX = (EAX & ~0xffff) | al | (ah << 8);
1139 CC_SRC = eflags;
1140 FORCE_RET();
1141}
1142
1143void OPPROTO op_daa(void)
1144{
1145 int al, af, cf;
1146 int eflags;
1147
1148 eflags = cc_table[CC_OP].compute_all();
1149 cf = eflags & CC_C;
1150 af = eflags & CC_A;
1151 al = EAX & 0xff;
1152
1153 eflags = 0;
1154 if (((al & 0x0f) > 9 ) || af) {
1155 al = (al + 6) & 0xff;
1156 eflags |= CC_A;
1157 }
1158 if ((al > 0x9f) || cf) {
1159 al = (al + 0x60) & 0xff;
1160 eflags |= CC_C;
1161 }
1162 EAX = (EAX & ~0xff) | al;
1163 /* well, speed is not an issue here, so we compute the flags by hand */
1164 eflags |= (al == 0) << 6; /* zf */
1165 eflags |= parity_table[al]; /* pf */
1166 eflags |= (al & 0x80); /* sf */
1167 CC_SRC = eflags;
1168 FORCE_RET();
1169}
1170
1171void OPPROTO op_das(void)
1172{
1173 int al, al1, af, cf;
1174 int eflags;
1175
1176 eflags = cc_table[CC_OP].compute_all();
1177 cf = eflags & CC_C;
1178 af = eflags & CC_A;
1179 al = EAX & 0xff;
1180
1181 eflags = 0;
1182 al1 = al;
1183 if (((al & 0x0f) > 9 ) || af) {
1184 eflags |= CC_A;
1185 if (al < 6 || cf)
1186 eflags |= CC_C;
1187 al = (al - 6) & 0xff;
1188 }
1189 if ((al1 > 0x99) || cf) {
1190 al = (al - 0x60) & 0xff;
1191 eflags |= CC_C;
1192 }
1193 EAX = (EAX & ~0xff) | al;
1194 /* well, speed is not an issue here, so we compute the flags by hand */
1195 eflags |= (al == 0) << 6; /* zf */
1196 eflags |= parity_table[al]; /* pf */
1197 eflags |= (al & 0x80); /* sf */
1198 CC_SRC = eflags;
1199 FORCE_RET();
1200}
1201
1202/* segment handling */
1203
1204/* never use it with R_CS */
1205void OPPROTO op_movl_seg_T0(void)
1206{
1207 load_seg(PARAM1, T0);
1208}
1209
1210/* faster VM86 version */
1211void OPPROTO op_movl_seg_T0_vm(void)
1212{
1213 int selector;
1214 SegmentCache *sc;
1215
1216 selector = T0 & 0xffff;
1217 /* env->segs[] access */
1218 sc = (SegmentCache *)((char *)env + PARAM1);
1219 sc->selector = selector;
1220 sc->base = (selector << 4);
1221#ifdef VBOX
1222 sc->flags = 0; /* clear attributes */
1223#endif
1224}
1225
1226void OPPROTO op_movl_T0_seg(void)
1227{
1228 T0 = env->segs[PARAM1].selector;
1229}
1230
1231void OPPROTO op_lsl(void)
1232{
1233 helper_lsl();
1234}
1235
1236void OPPROTO op_lar(void)
1237{
1238 helper_lar();
1239}
1240
1241void OPPROTO op_verr(void)
1242{
1243 helper_verr();
1244}
1245
1246void OPPROTO op_verw(void)
1247{
1248 helper_verw();
1249}
1250
1251void OPPROTO op_arpl(void)
1252{
1253 if ((T0 & 3) < (T1 & 3)) {
1254 /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1255 T0 = (T0 & ~3) | (T1 & 3);
1256 T1 = CC_Z;
1257 } else {
1258 T1 = 0;
1259 }
1260 FORCE_RET();
1261}
1262
1263void OPPROTO op_arpl_update(void)
1264{
1265 int eflags;
1266 eflags = cc_table[CC_OP].compute_all();
1267 CC_SRC = (eflags & ~CC_Z) | T1;
1268}
1269
1270/* T0: segment, T1:eip */
1271void OPPROTO op_ljmp_protected_T0_T1(void)
1272{
1273 helper_ljmp_protected_T0_T1(PARAM1);
1274}
1275
1276void OPPROTO op_lcall_real_T0_T1(void)
1277{
1278 helper_lcall_real_T0_T1(PARAM1, PARAM2);
1279}
1280
1281void OPPROTO op_lcall_protected_T0_T1(void)
1282{
1283 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1284}
1285
1286void OPPROTO op_iret_real(void)
1287{
1288 helper_iret_real(PARAM1);
1289}
1290
1291void OPPROTO op_iret_protected(void)
1292{
1293 helper_iret_protected(PARAM1, PARAM2);
1294}
1295
1296void OPPROTO op_lret_protected(void)
1297{
1298 helper_lret_protected(PARAM1, PARAM2);
1299}
1300
1301void OPPROTO op_lldt_T0(void)
1302{
1303 helper_lldt_T0();
1304}
1305
1306void OPPROTO op_ltr_T0(void)
1307{
1308 helper_ltr_T0();
1309}
1310
1311/* CR registers access */
1312void OPPROTO op_movl_crN_T0(void)
1313{
1314 helper_movl_crN_T0(PARAM1);
1315}
1316
1317#if !defined(CONFIG_USER_ONLY)
1318void OPPROTO op_movtl_T0_cr8(void)
1319{
1320 T0 = cpu_get_apic_tpr(env);
1321}
1322#endif
1323
1324/* DR registers access */
1325void OPPROTO op_movl_drN_T0(void)
1326{
1327 helper_movl_drN_T0(PARAM1);
1328}
1329
1330void OPPROTO op_lmsw_T0(void)
1331{
1332 /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1333 if already set to one. */
1334 T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
1335 helper_movl_crN_T0(0);
1336}
1337
1338void OPPROTO op_invlpg_A0(void)
1339{
1340 helper_invlpg(A0);
1341}
1342
1343void OPPROTO op_movl_T0_env(void)
1344{
1345 T0 = *(uint32_t *)((char *)env + PARAM1);
1346}
1347
1348void OPPROTO op_movl_env_T0(void)
1349{
1350 *(uint32_t *)((char *)env + PARAM1) = T0;
1351}
1352
1353void OPPROTO op_movl_env_T1(void)
1354{
1355 *(uint32_t *)((char *)env + PARAM1) = T1;
1356}
1357
1358void OPPROTO op_movtl_T0_env(void)
1359{
1360 T0 = *(target_ulong *)((char *)env + PARAM1);
1361}
1362
1363void OPPROTO op_movtl_env_T0(void)
1364{
1365 *(target_ulong *)((char *)env + PARAM1) = T0;
1366}
1367
1368void OPPROTO op_movtl_T1_env(void)
1369{
1370 T1 = *(target_ulong *)((char *)env + PARAM1);
1371}
1372
1373void OPPROTO op_movtl_env_T1(void)
1374{
1375 *(target_ulong *)((char *)env + PARAM1) = T1;
1376}
1377
1378void OPPROTO op_clts(void)
1379{
1380 env->cr[0] &= ~CR0_TS_MASK;
1381 env->hflags &= ~HF_TS_MASK;
1382}
1383
1384/* flags handling */
1385
1386void OPPROTO op_goto_tb0(void)
1387{
1388 GOTO_TB(op_goto_tb0, PARAM1, 0);
1389}
1390
1391void OPPROTO op_goto_tb1(void)
1392{
1393 GOTO_TB(op_goto_tb1, PARAM1, 1);
1394}
1395
1396void OPPROTO op_jmp_label(void)
1397{
1398 GOTO_LABEL_PARAM(1);
1399}
1400
1401void OPPROTO op_jnz_T0_label(void)
1402{
1403 if (T0)
1404 GOTO_LABEL_PARAM(1);
1405 FORCE_RET();
1406}
1407
1408void OPPROTO op_jz_T0_label(void)
1409{
1410 if (!T0)
1411 GOTO_LABEL_PARAM(1);
1412 FORCE_RET();
1413}
1414
1415/* slow set cases (compute x86 flags) */
1416void OPPROTO op_seto_T0_cc(void)
1417{
1418 int eflags;
1419 eflags = cc_table[CC_OP].compute_all();
1420 T0 = (eflags >> 11) & 1;
1421}
1422
1423void OPPROTO op_setb_T0_cc(void)
1424{
1425 T0 = cc_table[CC_OP].compute_c();
1426}
1427
1428void OPPROTO op_setz_T0_cc(void)
1429{
1430 int eflags;
1431 eflags = cc_table[CC_OP].compute_all();
1432 T0 = (eflags >> 6) & 1;
1433}
1434
1435void OPPROTO op_setbe_T0_cc(void)
1436{
1437 int eflags;
1438 eflags = cc_table[CC_OP].compute_all();
1439 T0 = (eflags & (CC_Z | CC_C)) != 0;
1440}
1441
1442void OPPROTO op_sets_T0_cc(void)
1443{
1444 int eflags;
1445 eflags = cc_table[CC_OP].compute_all();
1446 T0 = (eflags >> 7) & 1;
1447}
1448
1449void OPPROTO op_setp_T0_cc(void)
1450{
1451 int eflags;
1452 eflags = cc_table[CC_OP].compute_all();
1453 T0 = (eflags >> 2) & 1;
1454}
1455
1456void OPPROTO op_setl_T0_cc(void)
1457{
1458 int eflags;
1459 eflags = cc_table[CC_OP].compute_all();
1460 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1461}
1462
1463void OPPROTO op_setle_T0_cc(void)
1464{
1465 int eflags;
1466 eflags = cc_table[CC_OP].compute_all();
1467 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1468}
1469
1470void OPPROTO op_xor_T0_1(void)
1471{
1472 T0 ^= 1;
1473}
1474
1475void OPPROTO op_set_cc_op(void)
1476{
1477 CC_OP = PARAM1;
1478}
1479
1480void OPPROTO op_mov_T0_cc(void)
1481{
1482 T0 = cc_table[CC_OP].compute_all();
1483}
1484
1485/* XXX: clear VIF/VIP in all ops ? */
1486#ifdef VBOX
1487/* XXX: AMD docs say they remain unchanged. */
1488#endif
1489
1490void OPPROTO op_movl_eflags_T0(void)
1491{
1492 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1493}
1494
1495void OPPROTO op_movw_eflags_T0(void)
1496{
1497 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1498}
1499
1500void OPPROTO op_movl_eflags_T0_io(void)
1501{
1502 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1503}
1504
1505void OPPROTO op_movw_eflags_T0_io(void)
1506{
1507 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1508}
1509
1510void OPPROTO op_movl_eflags_T0_cpl0(void)
1511{
1512 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1513}
1514
1515void OPPROTO op_movw_eflags_T0_cpl0(void)
1516{
1517 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1518}
1519
1520/* vm86plus version */
1521#ifdef VBOX
1522/* IOPL != 3, CR4.VME=1 */
1523void OPPROTO op_movw_eflags_T0_vme(void)
1524{
1525 unsigned int new_eflags = T0;
1526
1527 /* if virtual interrupt pending and (virtual) interrupts will be enabled -> #GP */
1528 /* if TF will be set -> #GP */
1529 if ( ((new_eflags & IF_MASK) && (env->eflags & VIP_MASK))
1530 || (new_eflags & TF_MASK))
1531 {
1532 raise_exception(EXCP0D_GPF);
1533 }
1534 else
1535 {
1536 load_eflags(new_eflags, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1537
1538 if (new_eflags & IF_MASK)
1539 env->eflags |= VIF_MASK;
1540 else
1541 env->eflags &= ~VIF_MASK;
1542 }
1543
1544 FORCE_RET();
1545}
1546#endif
1547
1548#if 0
1549void OPPROTO op_movl_eflags_T0_vm(void)
1550{
1551 int eflags;
1552 eflags = T0;
1553 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1554 DF = 1 - (2 * ((eflags >> 10) & 1));
1555 /* we also update some system flags as in user mode */
1556 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1557 (eflags & FL_UPDATE_MASK32);
1558 if (eflags & IF_MASK) {
1559 env->eflags |= VIF_MASK;
1560 if (env->eflags & VIP_MASK) {
1561 EIP = PARAM1;
1562 raise_exception(EXCP0D_GPF);
1563 }
1564 }
1565 FORCE_RET();
1566}
1567#endif
1568
1569/* XXX: compute only O flag */
1570void OPPROTO op_movb_eflags_T0(void)
1571{
1572 int of;
1573 of = cc_table[CC_OP].compute_all() & CC_O;
1574 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1575}
1576
1577void OPPROTO op_movl_T0_eflags(void)
1578{
1579 int eflags;
1580 eflags = cc_table[CC_OP].compute_all();
1581 eflags |= (DF & DF_MASK);
1582 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1583 T0 = eflags;
1584}
1585
1586/* vm86plus version */
1587#ifdef VBOX
1588void OPPROTO op_movl_T0_eflags_vme(void)
1589{
1590 int eflags;
1591 eflags = cc_table[CC_OP].compute_all();
1592 eflags |= (DF & DF_MASK);
1593 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1594 if (env->eflags & VIF_MASK)
1595 eflags |= IF_MASK;
1596 T0 = eflags;
1597}
1598#endif
1599
1600void OPPROTO op_cld(void)
1601{
1602 DF = 1;
1603}
1604
1605void OPPROTO op_std(void)
1606{
1607 DF = -1;
1608}
1609
1610void OPPROTO op_clc(void)
1611{
1612 int eflags;
1613 eflags = cc_table[CC_OP].compute_all();
1614 eflags &= ~CC_C;
1615 CC_SRC = eflags;
1616}
1617
1618void OPPROTO op_stc(void)
1619{
1620 int eflags;
1621 eflags = cc_table[CC_OP].compute_all();
1622 eflags |= CC_C;
1623 CC_SRC = eflags;
1624}
1625
1626void OPPROTO op_cmc(void)
1627{
1628 int eflags;
1629 eflags = cc_table[CC_OP].compute_all();
1630 eflags ^= CC_C;
1631 CC_SRC = eflags;
1632}
1633
1634void OPPROTO op_salc(void)
1635{
1636 int cf;
1637 cf = cc_table[CC_OP].compute_c();
1638 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1639}
1640
1641static int compute_all_eflags(void)
1642{
1643 return CC_SRC;
1644}
1645
1646static int compute_c_eflags(void)
1647{
1648 return CC_SRC & CC_C;
1649}
1650
1651CCTable cc_table[CC_OP_NB] = {
1652 [CC_OP_DYNAMIC] = { /* should never happen */ },
1653
1654 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1655
1656 [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1657 [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1658 [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1659
1660 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1661 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1662 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1663
1664 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1665 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1666 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1667
1668 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1669 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1670 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
1671
1672 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1673 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1674 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
1675
1676 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1677 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1678 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1679
1680 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1681 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1682 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1683
1684 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1685 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1686 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1687
1688 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1689 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1690 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1691
1692 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1693 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1694 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1695
1696#ifdef TARGET_X86_64
1697 [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1698
1699 [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
1700
1701 [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
1702
1703 [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
1704
1705 [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
1706
1707 [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1708
1709 [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1710
1711 [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1712
1713 [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1714
1715 [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1716#endif
1717};
1718
1719/* floating point support. Some of the code for complicated x87
1720 functions comes from the LGPL'ed x86 emulator found in the Willows
1721 TWIN windows emulator. */
1722
1723/* fp load FT0 */
1724
1725void OPPROTO op_flds_FT0_A0(void)
1726{
1727#ifdef USE_FP_CONVERT
1728 FP_CONVERT.i32 = ldl(A0);
1729 FT0 = FP_CONVERT.f;
1730#else
1731 FT0 = ldfl(A0);
1732#endif
1733}
1734
1735void OPPROTO op_fldl_FT0_A0(void)
1736{
1737#ifdef USE_FP_CONVERT
1738 FP_CONVERT.i64 = ldq(A0);
1739 FT0 = FP_CONVERT.d;
1740#else
1741 FT0 = ldfq(A0);
1742#endif
1743}
1744
1745/* helpers are needed to avoid static constant reference. XXX: find a better way */
1746#ifdef USE_INT_TO_FLOAT_HELPERS
1747
1748void helper_fild_FT0_A0(void)
1749{
1750 FT0 = (CPU86_LDouble)ldsw(A0);
1751}
1752
1753void helper_fildl_FT0_A0(void)
1754{
1755 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1756}
1757
1758void helper_fildll_FT0_A0(void)
1759{
1760 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1761}
1762
1763void OPPROTO op_fild_FT0_A0(void)
1764{
1765 helper_fild_FT0_A0();
1766}
1767
1768void OPPROTO op_fildl_FT0_A0(void)
1769{
1770 helper_fildl_FT0_A0();
1771}
1772
1773void OPPROTO op_fildll_FT0_A0(void)
1774{
1775 helper_fildll_FT0_A0();
1776}
1777
1778#else
1779
1780void OPPROTO op_fild_FT0_A0(void)
1781{
1782#ifdef USE_FP_CONVERT
1783 FP_CONVERT.i32 = ldsw(A0);
1784 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1785#else
1786 FT0 = (CPU86_LDouble)ldsw(A0);
1787#endif
1788}
1789
1790void OPPROTO op_fildl_FT0_A0(void)
1791{
1792#ifdef USE_FP_CONVERT
1793 FP_CONVERT.i32 = (int32_t) ldl(A0);
1794 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1795#else
1796 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1797#endif
1798}
1799
1800void OPPROTO op_fildll_FT0_A0(void)
1801{
1802#ifdef USE_FP_CONVERT
1803 FP_CONVERT.i64 = (int64_t) ldq(A0);
1804 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1805#else
1806 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1807#endif
1808}
1809#endif
1810
1811/* fp load ST0 */
1812
1813void OPPROTO op_flds_ST0_A0(void)
1814{
1815 int new_fpstt;
1816 new_fpstt = (env->fpstt - 1) & 7;
1817#ifdef USE_FP_CONVERT
1818 FP_CONVERT.i32 = ldl(A0);
1819 env->fpregs[new_fpstt].d = FP_CONVERT.f;
1820#else
1821 env->fpregs[new_fpstt].d = ldfl(A0);
1822#endif
1823 env->fpstt = new_fpstt;
1824 env->fptags[new_fpstt] = 0; /* validate stack entry */
1825}
1826
1827void OPPROTO op_fldl_ST0_A0(void)
1828{
1829 int new_fpstt;
1830 new_fpstt = (env->fpstt - 1) & 7;
1831#ifdef USE_FP_CONVERT
1832 FP_CONVERT.i64 = ldq(A0);
1833 env->fpregs[new_fpstt].d = FP_CONVERT.d;
1834#else
1835 env->fpregs[new_fpstt].d = ldfq(A0);
1836#endif
1837 env->fpstt = new_fpstt;
1838 env->fptags[new_fpstt] = 0; /* validate stack entry */
1839}
1840
1841void OPPROTO op_fldt_ST0_A0(void)
1842{
1843 helper_fldt_ST0_A0();
1844}
1845
1846/* helpers are needed to avoid static constant reference. XXX: find a better way */
1847#ifdef USE_INT_TO_FLOAT_HELPERS
1848
1849void helper_fild_ST0_A0(void)
1850{
1851 int new_fpstt;
1852 new_fpstt = (env->fpstt - 1) & 7;
1853 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1854 env->fpstt = new_fpstt;
1855 env->fptags[new_fpstt] = 0; /* validate stack entry */
1856}
1857
1858void helper_fildl_ST0_A0(void)
1859{
1860 int new_fpstt;
1861 new_fpstt = (env->fpstt - 1) & 7;
1862 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1863 env->fpstt = new_fpstt;
1864 env->fptags[new_fpstt] = 0; /* validate stack entry */
1865}
1866
1867void helper_fildll_ST0_A0(void)
1868{
1869 int new_fpstt;
1870 new_fpstt = (env->fpstt - 1) & 7;
1871 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1872 env->fpstt = new_fpstt;
1873 env->fptags[new_fpstt] = 0; /* validate stack entry */
1874}
1875
1876void OPPROTO op_fild_ST0_A0(void)
1877{
1878 helper_fild_ST0_A0();
1879}
1880
1881void OPPROTO op_fildl_ST0_A0(void)
1882{
1883 helper_fildl_ST0_A0();
1884}
1885
1886void OPPROTO op_fildll_ST0_A0(void)
1887{
1888 helper_fildll_ST0_A0();
1889}
1890
1891#else
1892
1893void OPPROTO op_fild_ST0_A0(void)
1894{
1895 int new_fpstt;
1896 new_fpstt = (env->fpstt - 1) & 7;
1897#ifdef USE_FP_CONVERT
1898 FP_CONVERT.i32 = ldsw(A0);
1899 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1900#else
1901 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1902#endif
1903 env->fpstt = new_fpstt;
1904 env->fptags[new_fpstt] = 0; /* validate stack entry */
1905}
1906
1907void OPPROTO op_fildl_ST0_A0(void)
1908{
1909 int new_fpstt;
1910 new_fpstt = (env->fpstt - 1) & 7;
1911#ifdef USE_FP_CONVERT
1912 FP_CONVERT.i32 = (int32_t) ldl(A0);
1913 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1914#else
1915 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1916#endif
1917 env->fpstt = new_fpstt;
1918 env->fptags[new_fpstt] = 0; /* validate stack entry */
1919}
1920
1921void OPPROTO op_fildll_ST0_A0(void)
1922{
1923 int new_fpstt;
1924 new_fpstt = (env->fpstt - 1) & 7;
1925#ifdef USE_FP_CONVERT
1926 FP_CONVERT.i64 = (int64_t) ldq(A0);
1927 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
1928#else
1929 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1930#endif
1931 env->fpstt = new_fpstt;
1932 env->fptags[new_fpstt] = 0; /* validate stack entry */
1933}
1934
1935#endif
1936
1937/* fp store */
1938
1939void OPPROTO op_fsts_ST0_A0(void)
1940{
1941#ifdef USE_FP_CONVERT
1942 FP_CONVERT.f = (float)ST0;
1943 stfl(A0, FP_CONVERT.f);
1944#else
1945 stfl(A0, (float)ST0);
1946#endif
1947 FORCE_RET();
1948}
1949
1950void OPPROTO op_fstl_ST0_A0(void)
1951{
1952 stfq(A0, (double)ST0);
1953 FORCE_RET();
1954}
1955
1956void OPPROTO op_fstt_ST0_A0(void)
1957{
1958 helper_fstt_ST0_A0();
1959}
1960
1961void OPPROTO op_fist_ST0_A0(void)
1962{
1963#if defined(__sparc__) && !defined(__sparc_v9__)
1964 register CPU86_LDouble d asm("o0");
1965#else
1966 CPU86_LDouble d;
1967#endif
1968 int val;
1969
1970 d = ST0;
1971 val = lrint(d);
1972 if (val != (int16_t)val)
1973 val = -32768;
1974 stw(A0, val);
1975 FORCE_RET();
1976}
1977
1978void OPPROTO op_fistl_ST0_A0(void)
1979{
1980#if defined(__sparc__) && !defined(__sparc_v9__)
1981 register CPU86_LDouble d asm("o0");
1982#else
1983 CPU86_LDouble d;
1984#endif
1985 int val;
1986
1987 d = ST0;
1988 val = lrint(d);
1989 stl(A0, val);
1990 FORCE_RET();
1991}
1992
1993void OPPROTO op_fistll_ST0_A0(void)
1994{
1995#if defined(__sparc__) && !defined(__sparc_v9__)
1996 register CPU86_LDouble d asm("o0");
1997#else
1998 CPU86_LDouble d;
1999#endif
2000 int64_t val;
2001
2002 d = ST0;
2003 val = llrint(d);
2004 stq(A0, val);
2005 FORCE_RET();
2006}
2007
2008void OPPROTO op_fbld_ST0_A0(void)
2009{
2010 helper_fbld_ST0_A0();
2011}
2012
2013void OPPROTO op_fbst_ST0_A0(void)
2014{
2015 helper_fbst_ST0_A0();
2016}
2017
2018/* FPU move */
2019
2020void OPPROTO op_fpush(void)
2021{
2022 fpush();
2023}
2024
2025void OPPROTO op_fpop(void)
2026{
2027 fpop();
2028}
2029
2030void OPPROTO op_fdecstp(void)
2031{
2032 env->fpstt = (env->fpstt - 1) & 7;
2033 env->fpus &= (~0x4700);
2034}
2035
2036void OPPROTO op_fincstp(void)
2037{
2038 env->fpstt = (env->fpstt + 1) & 7;
2039 env->fpus &= (~0x4700);
2040}
2041
2042void OPPROTO op_ffree_STN(void)
2043{
2044 env->fptags[(env->fpstt + PARAM1) & 7] = 1;
2045}
2046
2047void OPPROTO op_fmov_ST0_FT0(void)
2048{
2049 ST0 = FT0;
2050}
2051
2052void OPPROTO op_fmov_FT0_STN(void)
2053{
2054 FT0 = ST(PARAM1);
2055}
2056
2057void OPPROTO op_fmov_ST0_STN(void)
2058{
2059 ST0 = ST(PARAM1);
2060}
2061
2062void OPPROTO op_fmov_STN_ST0(void)
2063{
2064 ST(PARAM1) = ST0;
2065}
2066
2067void OPPROTO op_fxchg_ST0_STN(void)
2068{
2069 CPU86_LDouble tmp;
2070 tmp = ST(PARAM1);
2071 ST(PARAM1) = ST0;
2072 ST0 = tmp;
2073}
2074
2075/* FPU operations */
2076
2077/* XXX: handle nans */
2078void OPPROTO op_fcom_ST0_FT0(void)
2079{
2080 env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
2081 if (ST0 < FT0)
2082 env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
2083 else if (ST0 == FT0)
2084 env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
2085 FORCE_RET();
2086}
2087
2088/* XXX: handle nans */
2089void OPPROTO op_fucom_ST0_FT0(void)
2090{
2091 env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
2092 if (ST0 < FT0)
2093 env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
2094 else if (ST0 == FT0)
2095 env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
2096 FORCE_RET();
2097}
2098
2099/* XXX: handle nans */
2100void OPPROTO op_fcomi_ST0_FT0(void)
2101{
2102 int eflags;
2103 eflags = cc_table[CC_OP].compute_all();
2104 eflags &= ~(CC_Z | CC_P | CC_C);
2105 if (ST0 < FT0)
2106 eflags |= CC_C;
2107 else if (ST0 == FT0)
2108 eflags |= CC_Z;
2109 CC_SRC = eflags;
2110 FORCE_RET();
2111}
2112
2113/* XXX: handle nans */
2114void OPPROTO op_fucomi_ST0_FT0(void)
2115{
2116 int eflags;
2117 eflags = cc_table[CC_OP].compute_all();
2118 eflags &= ~(CC_Z | CC_P | CC_C);
2119 if (ST0 < FT0)
2120 eflags |= CC_C;
2121 else if (ST0 == FT0)
2122 eflags |= CC_Z;
2123 CC_SRC = eflags;
2124 FORCE_RET();
2125}
2126
2127void OPPROTO op_fcmov_ST0_STN_T0(void)
2128{
2129 if (T0) {
2130 ST0 = ST(PARAM1);
2131 }
2132 FORCE_RET();
2133}
2134
2135void OPPROTO op_fadd_ST0_FT0(void)
2136{
2137 ST0 += FT0;
2138}
2139
2140void OPPROTO op_fmul_ST0_FT0(void)
2141{
2142 ST0 *= FT0;
2143}
2144
2145void OPPROTO op_fsub_ST0_FT0(void)
2146{
2147 ST0 -= FT0;
2148}
2149
2150void OPPROTO op_fsubr_ST0_FT0(void)
2151{
2152 ST0 = FT0 - ST0;
2153}
2154
2155void OPPROTO op_fdiv_ST0_FT0(void)
2156{
2157 ST0 = helper_fdiv(ST0, FT0);
2158}
2159
2160void OPPROTO op_fdivr_ST0_FT0(void)
2161{
2162 ST0 = helper_fdiv(FT0, ST0);
2163}
2164
2165/* fp operations between STN and ST0 */
2166
2167void OPPROTO op_fadd_STN_ST0(void)
2168{
2169 ST(PARAM1) += ST0;
2170}
2171
2172void OPPROTO op_fmul_STN_ST0(void)
2173{
2174 ST(PARAM1) *= ST0;
2175}
2176
2177void OPPROTO op_fsub_STN_ST0(void)
2178{
2179 ST(PARAM1) -= ST0;
2180}
2181
2182void OPPROTO op_fsubr_STN_ST0(void)
2183{
2184 CPU86_LDouble *p;
2185 p = &ST(PARAM1);
2186 *p = ST0 - *p;
2187}
2188
2189void OPPROTO op_fdiv_STN_ST0(void)
2190{
2191 CPU86_LDouble *p;
2192 p = &ST(PARAM1);
2193 *p = helper_fdiv(*p, ST0);
2194}
2195
2196void OPPROTO op_fdivr_STN_ST0(void)
2197{
2198 CPU86_LDouble *p;
2199 p = &ST(PARAM1);
2200 *p = helper_fdiv(ST0, *p);
2201}
2202
2203/* misc FPU operations */
2204void OPPROTO op_fchs_ST0(void)
2205{
2206 ST0 = -ST0;
2207}
2208
2209void OPPROTO op_fabs_ST0(void)
2210{
2211 ST0 = fabs(ST0);
2212}
2213
2214void OPPROTO op_fxam_ST0(void)
2215{
2216 helper_fxam_ST0();
2217}
2218
2219void OPPROTO op_fld1_ST0(void)
2220{
2221 ST0 = f15rk[1];
2222}
2223
2224void OPPROTO op_fldl2t_ST0(void)
2225{
2226 ST0 = f15rk[6];
2227}
2228
2229void OPPROTO op_fldl2e_ST0(void)
2230{
2231 ST0 = f15rk[5];
2232}
2233
2234void OPPROTO op_fldpi_ST0(void)
2235{
2236 ST0 = f15rk[2];
2237}
2238
2239void OPPROTO op_fldlg2_ST0(void)
2240{
2241 ST0 = f15rk[3];
2242}
2243
2244void OPPROTO op_fldln2_ST0(void)
2245{
2246 ST0 = f15rk[4];
2247}
2248
2249void OPPROTO op_fldz_ST0(void)
2250{
2251 ST0 = f15rk[0];
2252}
2253
2254void OPPROTO op_fldz_FT0(void)
2255{
2256 FT0 = f15rk[0];
2257}
2258
2259/* associated heplers to reduce generated code length and to simplify
2260 relocation (FP constants are usually stored in .rodata section) */
2261
2262void OPPROTO op_f2xm1(void)
2263{
2264 helper_f2xm1();
2265}
2266
2267void OPPROTO op_fyl2x(void)
2268{
2269 helper_fyl2x();
2270}
2271
2272void OPPROTO op_fptan(void)
2273{
2274 helper_fptan();
2275}
2276
2277void OPPROTO op_fpatan(void)
2278{
2279 helper_fpatan();
2280}
2281
2282void OPPROTO op_fxtract(void)
2283{
2284 helper_fxtract();
2285}
2286
2287void OPPROTO op_fprem1(void)
2288{
2289 helper_fprem1();
2290}
2291
2292
2293void OPPROTO op_fprem(void)
2294{
2295 helper_fprem();
2296}
2297
2298void OPPROTO op_fyl2xp1(void)
2299{
2300 helper_fyl2xp1();
2301}
2302
2303void OPPROTO op_fsqrt(void)
2304{
2305 helper_fsqrt();
2306}
2307
2308void OPPROTO op_fsincos(void)
2309{
2310 helper_fsincos();
2311}
2312
2313void OPPROTO op_frndint(void)
2314{
2315 helper_frndint();
2316}
2317
2318void OPPROTO op_fscale(void)
2319{
2320 helper_fscale();
2321}
2322
2323void OPPROTO op_fsin(void)
2324{
2325 helper_fsin();
2326}
2327
2328void OPPROTO op_fcos(void)
2329{
2330 helper_fcos();
2331}
2332
2333void OPPROTO op_fnstsw_A0(void)
2334{
2335 int fpus;
2336 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2337 stw(A0, fpus);
2338 FORCE_RET();
2339}
2340
2341void OPPROTO op_fnstsw_EAX(void)
2342{
2343 int fpus;
2344 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2345 EAX = (EAX & ~0xffff) | fpus;
2346}
2347
2348void OPPROTO op_fnstcw_A0(void)
2349{
2350 stw(A0, env->fpuc);
2351 FORCE_RET();
2352}
2353
2354void OPPROTO op_fldcw_A0(void)
2355{
2356 int rnd_type;
2357 env->fpuc = lduw(A0);
2358 /* set rounding mode */
2359 switch(env->fpuc & RC_MASK) {
2360 default:
2361 case RC_NEAR:
2362 rnd_type = FE_TONEAREST;
2363 break;
2364 case RC_DOWN:
2365 rnd_type = FE_DOWNWARD;
2366 break;
2367 case RC_UP:
2368 rnd_type = FE_UPWARD;
2369 break;
2370 case RC_CHOP:
2371 rnd_type = FE_TOWARDZERO;
2372 break;
2373 }
2374 fesetround(rnd_type);
2375}
2376
2377void OPPROTO op_fclex(void)
2378{
2379 env->fpus &= 0x7f00;
2380}
2381
2382void OPPROTO op_fwait(void)
2383{
2384 if (env->fpus & FPUS_SE)
2385 fpu_raise_exception();
2386 FORCE_RET();
2387}
2388
2389void OPPROTO op_fninit(void)
2390{
2391 env->fpus = 0;
2392 env->fpstt = 0;
2393 env->fpuc = 0x37f;
2394 env->fptags[0] = 1;
2395 env->fptags[1] = 1;
2396 env->fptags[2] = 1;
2397 env->fptags[3] = 1;
2398 env->fptags[4] = 1;
2399 env->fptags[5] = 1;
2400 env->fptags[6] = 1;
2401 env->fptags[7] = 1;
2402}
2403
2404void OPPROTO op_fnstenv_A0(void)
2405{
2406 helper_fstenv(A0, PARAM1);
2407}
2408
2409void OPPROTO op_fldenv_A0(void)
2410{
2411 helper_fldenv(A0, PARAM1);
2412}
2413
2414void OPPROTO op_fnsave_A0(void)
2415{
2416 helper_fsave(A0, PARAM1);
2417}
2418
2419void OPPROTO op_frstor_A0(void)
2420{
2421 helper_frstor(A0, PARAM1);
2422}
2423
2424/* threading support */
2425void OPPROTO op_lock(void)
2426{
2427 cpu_lock();
2428}
2429
2430void OPPROTO op_unlock(void)
2431{
2432 cpu_unlock();
2433}
2434
2435/* SSE support */
2436static inline void memcpy16(void *d, void *s)
2437{
2438 ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2439 ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2440 ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2441 ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2442}
2443
2444void OPPROTO op_movo(void)
2445{
2446 /* XXX: badly generated code */
2447 XMMReg *d, *s;
2448 d = (XMMReg *)((char *)env + PARAM1);
2449 s = (XMMReg *)((char *)env + PARAM2);
2450 memcpy16(d, s);
2451}
2452
2453void OPPROTO op_movq(void)
2454{
2455 uint64_t *d, *s;
2456 d = (uint64_t *)((char *)env + PARAM1);
2457 s = (uint64_t *)((char *)env + PARAM2);
2458 *d = *s;
2459}
2460
2461void OPPROTO op_movl(void)
2462{
2463 uint32_t *d, *s;
2464 d = (uint32_t *)((char *)env + PARAM1);
2465 s = (uint32_t *)((char *)env + PARAM2);
2466 *d = *s;
2467}
2468
2469void OPPROTO op_movq_env_0(void)
2470{
2471 uint64_t *d;
2472 d = (uint64_t *)((char *)env + PARAM1);
2473 *d = 0;
2474}
2475
2476void OPPROTO op_fxsave_A0(void)
2477{
2478 helper_fxsave(A0, PARAM1);
2479}
2480
2481void OPPROTO op_fxrstor_A0(void)
2482{
2483 helper_fxrstor(A0, PARAM1);
2484}
2485
2486/* XXX: optimize by storing fptt and fptags in the static cpu state */
2487void OPPROTO op_enter_mmx(void)
2488{
2489 env->fpstt = 0;
2490 *(uint32_t *)(env->fptags) = 0;
2491 *(uint32_t *)(env->fptags + 4) = 0;
2492}
2493
2494void OPPROTO op_emms(void)
2495{
2496 /* set to empty state */
2497 *(uint32_t *)(env->fptags) = 0x01010101;
2498 *(uint32_t *)(env->fptags + 4) = 0x01010101;
2499}
2500
2501#define SHIFT 0
2502#include "ops_sse.h"
2503
2504#define SHIFT 1
2505#include "ops_sse.h"
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