| 1 | /*
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| 2 | * Tiny Code Generator for QEMU
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| 3 | *
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| 4 | * Copyright (c) 2008 Fabrice Bellard
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| 5 | *
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| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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| 7 | * of this software and associated documentation files (the "Software"), to deal
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| 8 | * in the Software without restriction, including without limitation the rights
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| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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| 10 | * copies of the Software, and to permit persons to whom the Software is
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| 11 | * furnished to do so, subject to the following conditions:
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| 12 | *
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| 13 | * The above copyright notice and this permission notice shall be included in
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| 14 | * all copies or substantial portions of the Software.
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| 15 | *
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| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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| 22 | * THE SOFTWARE.
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| 23 | */
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| 24 |
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| 25 | #define TCG_TARGET_X86_64 1
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| 26 |
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| 27 | #define TCG_TARGET_REG_BITS 64
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| 28 | //#define TCG_TARGET_WORDS_BIGENDIAN
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| 29 |
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| 30 | #define TCG_TARGET_NB_REGS 16
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| 31 |
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| 32 | enum {
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| 33 | TCG_REG_RAX = 0,
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| 34 | TCG_REG_RCX,
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| 35 | TCG_REG_RDX,
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| 36 | TCG_REG_RBX,
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| 37 | TCG_REG_RSP,
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| 38 | TCG_REG_RBP,
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| 39 | TCG_REG_RSI,
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| 40 | TCG_REG_RDI,
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| 41 | TCG_REG_R8,
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| 42 | TCG_REG_R9,
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| 43 | TCG_REG_R10,
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| 44 | TCG_REG_R11,
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| 45 | TCG_REG_R12,
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| 46 | TCG_REG_R13,
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| 47 | TCG_REG_R14,
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| 48 | TCG_REG_R15,
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| 49 | };
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| 50 |
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| 51 | #define TCG_CT_CONST_S32 0x100
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| 52 | #define TCG_CT_CONST_U32 0x200
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| 53 |
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| 54 | /* used for function call generation */
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| 55 | #define TCG_REG_CALL_STACK TCG_REG_RSP
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| 56 | #define TCG_TARGET_STACK_ALIGN 16
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| 57 | #define TCG_TARGET_CALL_STACK_OFFSET 0
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| 58 |
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| 59 | /* optional instructions */
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| 60 | #define TCG_TARGET_HAS_bswap_i32
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| 61 | #define TCG_TARGET_HAS_bswap_i64
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| 62 | #define TCG_TARGET_HAS_neg_i32
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| 63 | #define TCG_TARGET_HAS_neg_i64
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| 64 | #define TCG_TARGET_HAS_ext8s_i32
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| 65 | #define TCG_TARGET_HAS_ext16s_i32
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| 66 | #define TCG_TARGET_HAS_ext8s_i64
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| 67 | #define TCG_TARGET_HAS_ext16s_i64
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| 68 | #define TCG_TARGET_HAS_ext32s_i64
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| 69 |
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| 70 | /* Must be in sync with dyngen register notion, see dyngen-exec.h */
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| 71 | #define TCG_AREG0 TCG_REG_R14
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| 72 | #define TCG_AREG1 TCG_REG_R15
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| 73 | #define TCG_AREG2 TCG_REG_R12
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| 74 | #define TCG_AREG3 TCG_REG_R13
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| 75 |
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| 76 | static inline void flush_icache_range(unsigned long start, unsigned long stop)
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| 77 | {
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| 78 | }
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