VirtualBox

source: vbox/trunk/src/recompiler_new/target-i386/ops_sse.h@ 13428

Last change on this file since 13428 was 13337, checked in by vboxsync, 16 years ago

more recompiler work

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 58.0 KB
Line 
1/*
2 * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support
3 *
4 * Copyright (c) 2005 Fabrice Bellard
5 * Copyright (c) 2008 Intel Corporation <[email protected]>
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21/*
22 * Sun LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
23 * other than GPL or LGPL is available it will apply instead, Sun elects to use only
24 * the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
25 * a choice of LGPL license versions is made available with the language indicating
26 * that LGPLv2 or any later version may be used, or where a choice of which version
27 * of the LGPL is applied is otherwise unspecified.
28 */
29
30#if SHIFT == 0
31#define Reg MMXReg
32#define XMM_ONLY(x...)
33#define B(n) MMX_B(n)
34#define W(n) MMX_W(n)
35#define L(n) MMX_L(n)
36#define Q(n) q
37#define SUFFIX _mmx
38#else
39#define Reg XMMReg
40#define XMM_ONLY(x...) x
41#define B(n) XMM_B(n)
42#define W(n) XMM_W(n)
43#define L(n) XMM_L(n)
44#define Q(n) XMM_Q(n)
45#define SUFFIX _xmm
46#endif
47
48void glue(helper_psrlw, SUFFIX)(Reg *d, Reg *s)
49{
50 int shift;
51
52 if (s->Q(0) > 15) {
53 d->Q(0) = 0;
54#if SHIFT == 1
55 d->Q(1) = 0;
56#endif
57 } else {
58 shift = s->B(0);
59 d->W(0) >>= shift;
60 d->W(1) >>= shift;
61 d->W(2) >>= shift;
62 d->W(3) >>= shift;
63#if SHIFT == 1
64 d->W(4) >>= shift;
65 d->W(5) >>= shift;
66 d->W(6) >>= shift;
67 d->W(7) >>= shift;
68#endif
69 }
70 FORCE_RET();
71}
72
73void glue(helper_psraw, SUFFIX)(Reg *d, Reg *s)
74{
75 int shift;
76
77 if (s->Q(0) > 15) {
78 shift = 15;
79 } else {
80 shift = s->B(0);
81 }
82 d->W(0) = (int16_t)d->W(0) >> shift;
83 d->W(1) = (int16_t)d->W(1) >> shift;
84 d->W(2) = (int16_t)d->W(2) >> shift;
85 d->W(3) = (int16_t)d->W(3) >> shift;
86#if SHIFT == 1
87 d->W(4) = (int16_t)d->W(4) >> shift;
88 d->W(5) = (int16_t)d->W(5) >> shift;
89 d->W(6) = (int16_t)d->W(6) >> shift;
90 d->W(7) = (int16_t)d->W(7) >> shift;
91#endif
92}
93
94void glue(helper_psllw, SUFFIX)(Reg *d, Reg *s)
95{
96 int shift;
97
98 if (s->Q(0) > 15) {
99 d->Q(0) = 0;
100#if SHIFT == 1
101 d->Q(1) = 0;
102#endif
103 } else {
104 shift = s->B(0);
105 d->W(0) <<= shift;
106 d->W(1) <<= shift;
107 d->W(2) <<= shift;
108 d->W(3) <<= shift;
109#if SHIFT == 1
110 d->W(4) <<= shift;
111 d->W(5) <<= shift;
112 d->W(6) <<= shift;
113 d->W(7) <<= shift;
114#endif
115 }
116 FORCE_RET();
117}
118
119void glue(helper_psrld, SUFFIX)(Reg *d, Reg *s)
120{
121 int shift;
122
123 if (s->Q(0) > 31) {
124 d->Q(0) = 0;
125#if SHIFT == 1
126 d->Q(1) = 0;
127#endif
128 } else {
129 shift = s->B(0);
130 d->L(0) >>= shift;
131 d->L(1) >>= shift;
132#if SHIFT == 1
133 d->L(2) >>= shift;
134 d->L(3) >>= shift;
135#endif
136 }
137 FORCE_RET();
138}
139
140void glue(helper_psrad, SUFFIX)(Reg *d, Reg *s)
141{
142 int shift;
143
144 if (s->Q(0) > 31) {
145 shift = 31;
146 } else {
147 shift = s->B(0);
148 }
149 d->L(0) = (int32_t)d->L(0) >> shift;
150 d->L(1) = (int32_t)d->L(1) >> shift;
151#if SHIFT == 1
152 d->L(2) = (int32_t)d->L(2) >> shift;
153 d->L(3) = (int32_t)d->L(3) >> shift;
154#endif
155}
156
157void glue(helper_pslld, SUFFIX)(Reg *d, Reg *s)
158{
159 int shift;
160
161 if (s->Q(0) > 31) {
162 d->Q(0) = 0;
163#if SHIFT == 1
164 d->Q(1) = 0;
165#endif
166 } else {
167 shift = s->B(0);
168 d->L(0) <<= shift;
169 d->L(1) <<= shift;
170#if SHIFT == 1
171 d->L(2) <<= shift;
172 d->L(3) <<= shift;
173#endif
174 }
175 FORCE_RET();
176}
177
178void glue(helper_psrlq, SUFFIX)(Reg *d, Reg *s)
179{
180 int shift;
181
182 if (s->Q(0) > 63) {
183 d->Q(0) = 0;
184#if SHIFT == 1
185 d->Q(1) = 0;
186#endif
187 } else {
188 shift = s->B(0);
189 d->Q(0) >>= shift;
190#if SHIFT == 1
191 d->Q(1) >>= shift;
192#endif
193 }
194 FORCE_RET();
195}
196
197void glue(helper_psllq, SUFFIX)(Reg *d, Reg *s)
198{
199 int shift;
200
201 if (s->Q(0) > 63) {
202 d->Q(0) = 0;
203#if SHIFT == 1
204 d->Q(1) = 0;
205#endif
206 } else {
207 shift = s->B(0);
208 d->Q(0) <<= shift;
209#if SHIFT == 1
210 d->Q(1) <<= shift;
211#endif
212 }
213 FORCE_RET();
214}
215
216#if SHIFT == 1
217void glue(helper_psrldq, SUFFIX)(Reg *d, Reg *s)
218{
219 int shift, i;
220
221 shift = s->L(0);
222 if (shift > 16)
223 shift = 16;
224 for(i = 0; i < 16 - shift; i++)
225 d->B(i) = d->B(i + shift);
226 for(i = 16 - shift; i < 16; i++)
227 d->B(i) = 0;
228 FORCE_RET();
229}
230
231void glue(helper_pslldq, SUFFIX)(Reg *d, Reg *s)
232{
233 int shift, i;
234
235 shift = s->L(0);
236 if (shift > 16)
237 shift = 16;
238 for(i = 15; i >= shift; i--)
239 d->B(i) = d->B(i - shift);
240 for(i = 0; i < shift; i++)
241 d->B(i) = 0;
242 FORCE_RET();
243}
244#endif
245
246#define SSE_HELPER_B(name, F)\
247void glue(name, SUFFIX) (Reg *d, Reg *s)\
248{\
249 d->B(0) = F(d->B(0), s->B(0));\
250 d->B(1) = F(d->B(1), s->B(1));\
251 d->B(2) = F(d->B(2), s->B(2));\
252 d->B(3) = F(d->B(3), s->B(3));\
253 d->B(4) = F(d->B(4), s->B(4));\
254 d->B(5) = F(d->B(5), s->B(5));\
255 d->B(6) = F(d->B(6), s->B(6));\
256 d->B(7) = F(d->B(7), s->B(7));\
257 XMM_ONLY(\
258 d->B(8) = F(d->B(8), s->B(8));\
259 d->B(9) = F(d->B(9), s->B(9));\
260 d->B(10) = F(d->B(10), s->B(10));\
261 d->B(11) = F(d->B(11), s->B(11));\
262 d->B(12) = F(d->B(12), s->B(12));\
263 d->B(13) = F(d->B(13), s->B(13));\
264 d->B(14) = F(d->B(14), s->B(14));\
265 d->B(15) = F(d->B(15), s->B(15));\
266 )\
267}
268
269#define SSE_HELPER_W(name, F)\
270void glue(name, SUFFIX) (Reg *d, Reg *s)\
271{\
272 d->W(0) = F(d->W(0), s->W(0));\
273 d->W(1) = F(d->W(1), s->W(1));\
274 d->W(2) = F(d->W(2), s->W(2));\
275 d->W(3) = F(d->W(3), s->W(3));\
276 XMM_ONLY(\
277 d->W(4) = F(d->W(4), s->W(4));\
278 d->W(5) = F(d->W(5), s->W(5));\
279 d->W(6) = F(d->W(6), s->W(6));\
280 d->W(7) = F(d->W(7), s->W(7));\
281 )\
282}
283
284#define SSE_HELPER_L(name, F)\
285void glue(name, SUFFIX) (Reg *d, Reg *s)\
286{\
287 d->L(0) = F(d->L(0), s->L(0));\
288 d->L(1) = F(d->L(1), s->L(1));\
289 XMM_ONLY(\
290 d->L(2) = F(d->L(2), s->L(2));\
291 d->L(3) = F(d->L(3), s->L(3));\
292 )\
293}
294
295#define SSE_HELPER_Q(name, F)\
296void glue(name, SUFFIX) (Reg *d, Reg *s)\
297{\
298 d->Q(0) = F(d->Q(0), s->Q(0));\
299 XMM_ONLY(\
300 d->Q(1) = F(d->Q(1), s->Q(1));\
301 )\
302}
303
304#if SHIFT == 0
305static inline int satub(int x)
306{
307 if (x < 0)
308 return 0;
309 else if (x > 255)
310 return 255;
311 else
312 return x;
313}
314
315static inline int satuw(int x)
316{
317 if (x < 0)
318 return 0;
319 else if (x > 65535)
320 return 65535;
321 else
322 return x;
323}
324
325static inline int satsb(int x)
326{
327 if (x < -128)
328 return -128;
329 else if (x > 127)
330 return 127;
331 else
332 return x;
333}
334
335static inline int satsw(int x)
336{
337 if (x < -32768)
338 return -32768;
339 else if (x > 32767)
340 return 32767;
341 else
342 return x;
343}
344
345#define FADD(a, b) ((a) + (b))
346#define FADDUB(a, b) satub((a) + (b))
347#define FADDUW(a, b) satuw((a) + (b))
348#define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
349#define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
350
351#define FSUB(a, b) ((a) - (b))
352#define FSUBUB(a, b) satub((a) - (b))
353#define FSUBUW(a, b) satuw((a) - (b))
354#define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
355#define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b))
356#define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
357#define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
358#define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
359#define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
360
361#define FAND(a, b) (a) & (b)
362#define FANDN(a, b) ((~(a)) & (b))
363#define FOR(a, b) (a) | (b)
364#define FXOR(a, b) (a) ^ (b)
365
366#define FCMPGTB(a, b) (int8_t)(a) > (int8_t)(b) ? -1 : 0
367#define FCMPGTW(a, b) (int16_t)(a) > (int16_t)(b) ? -1 : 0
368#define FCMPGTL(a, b) (int32_t)(a) > (int32_t)(b) ? -1 : 0
369#define FCMPEQ(a, b) (a) == (b) ? -1 : 0
370
371#define FMULLW(a, b) (a) * (b)
372#define FMULHRW(a, b) ((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16
373#define FMULHUW(a, b) (a) * (b) >> 16
374#define FMULHW(a, b) (int16_t)(a) * (int16_t)(b) >> 16
375
376#define FAVG(a, b) ((a) + (b) + 1) >> 1
377#endif
378
379SSE_HELPER_B(helper_paddb, FADD)
380SSE_HELPER_W(helper_paddw, FADD)
381SSE_HELPER_L(helper_paddl, FADD)
382SSE_HELPER_Q(helper_paddq, FADD)
383
384SSE_HELPER_B(helper_psubb, FSUB)
385SSE_HELPER_W(helper_psubw, FSUB)
386SSE_HELPER_L(helper_psubl, FSUB)
387SSE_HELPER_Q(helper_psubq, FSUB)
388
389SSE_HELPER_B(helper_paddusb, FADDUB)
390SSE_HELPER_B(helper_paddsb, FADDSB)
391SSE_HELPER_B(helper_psubusb, FSUBUB)
392SSE_HELPER_B(helper_psubsb, FSUBSB)
393
394SSE_HELPER_W(helper_paddusw, FADDUW)
395SSE_HELPER_W(helper_paddsw, FADDSW)
396SSE_HELPER_W(helper_psubusw, FSUBUW)
397SSE_HELPER_W(helper_psubsw, FSUBSW)
398
399SSE_HELPER_B(helper_pminub, FMINUB)
400SSE_HELPER_B(helper_pmaxub, FMAXUB)
401
402SSE_HELPER_W(helper_pminsw, FMINSW)
403SSE_HELPER_W(helper_pmaxsw, FMAXSW)
404
405SSE_HELPER_Q(helper_pand, FAND)
406SSE_HELPER_Q(helper_pandn, FANDN)
407SSE_HELPER_Q(helper_por, FOR)
408SSE_HELPER_Q(helper_pxor, FXOR)
409
410SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
411SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
412SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
413
414SSE_HELPER_B(helper_pcmpeqb, FCMPEQ)
415SSE_HELPER_W(helper_pcmpeqw, FCMPEQ)
416SSE_HELPER_L(helper_pcmpeql, FCMPEQ)
417
418SSE_HELPER_W(helper_pmullw, FMULLW)
419#if SHIFT == 0
420SSE_HELPER_W(helper_pmulhrw, FMULHRW)
421#endif
422SSE_HELPER_W(helper_pmulhuw, FMULHUW)
423SSE_HELPER_W(helper_pmulhw, FMULHW)
424
425SSE_HELPER_B(helper_pavgb, FAVG)
426SSE_HELPER_W(helper_pavgw, FAVG)
427
428void glue(helper_pmuludq, SUFFIX) (Reg *d, Reg *s)
429{
430 d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0);
431#if SHIFT == 1
432 d->Q(1) = (uint64_t)s->L(2) * (uint64_t)d->L(2);
433#endif
434}
435
436void glue(helper_pmaddwd, SUFFIX) (Reg *d, Reg *s)
437{
438 int i;
439
440 for(i = 0; i < (2 << SHIFT); i++) {
441 d->L(i) = (int16_t)s->W(2*i) * (int16_t)d->W(2*i) +
442 (int16_t)s->W(2*i+1) * (int16_t)d->W(2*i+1);
443 }
444 FORCE_RET();
445}
446
447#if SHIFT == 0
448static inline int abs1(int a)
449{
450 if (a < 0)
451 return -a;
452 else
453 return a;
454}
455#endif
456void glue(helper_psadbw, SUFFIX) (Reg *d, Reg *s)
457{
458 unsigned int val;
459
460 val = 0;
461 val += abs1(d->B(0) - s->B(0));
462 val += abs1(d->B(1) - s->B(1));
463 val += abs1(d->B(2) - s->B(2));
464 val += abs1(d->B(3) - s->B(3));
465 val += abs1(d->B(4) - s->B(4));
466 val += abs1(d->B(5) - s->B(5));
467 val += abs1(d->B(6) - s->B(6));
468 val += abs1(d->B(7) - s->B(7));
469 d->Q(0) = val;
470#if SHIFT == 1
471 val = 0;
472 val += abs1(d->B(8) - s->B(8));
473 val += abs1(d->B(9) - s->B(9));
474 val += abs1(d->B(10) - s->B(10));
475 val += abs1(d->B(11) - s->B(11));
476 val += abs1(d->B(12) - s->B(12));
477 val += abs1(d->B(13) - s->B(13));
478 val += abs1(d->B(14) - s->B(14));
479 val += abs1(d->B(15) - s->B(15));
480 d->Q(1) = val;
481#endif
482}
483
484void glue(helper_maskmov, SUFFIX) (Reg *d, Reg *s, target_ulong a0)
485{
486 int i;
487 for(i = 0; i < (8 << SHIFT); i++) {
488 if (s->B(i) & 0x80)
489 stb(a0 + i, d->B(i));
490 }
491 FORCE_RET();
492}
493
494void glue(helper_movl_mm_T0, SUFFIX) (Reg *d, uint32_t val)
495{
496 d->L(0) = val;
497 d->L(1) = 0;
498#if SHIFT == 1
499 d->Q(1) = 0;
500#endif
501}
502
503#ifdef TARGET_X86_64
504void glue(helper_movq_mm_T0, SUFFIX) (Reg *d, uint64_t val)
505{
506 d->Q(0) = val;
507#if SHIFT == 1
508 d->Q(1) = 0;
509#endif
510}
511#endif
512
513#if SHIFT == 0
514void glue(helper_pshufw, SUFFIX) (Reg *d, Reg *s, int order)
515{
516 Reg r;
517 r.W(0) = s->W(order & 3);
518 r.W(1) = s->W((order >> 2) & 3);
519 r.W(2) = s->W((order >> 4) & 3);
520 r.W(3) = s->W((order >> 6) & 3);
521 *d = r;
522}
523#else
524void helper_shufps(Reg *d, Reg *s, int order)
525{
526 Reg r;
527 r.L(0) = d->L(order & 3);
528 r.L(1) = d->L((order >> 2) & 3);
529 r.L(2) = s->L((order >> 4) & 3);
530 r.L(3) = s->L((order >> 6) & 3);
531 *d = r;
532}
533
534void helper_shufpd(Reg *d, Reg *s, int order)
535{
536 Reg r;
537 r.Q(0) = d->Q(order & 1);
538 r.Q(1) = s->Q((order >> 1) & 1);
539 *d = r;
540}
541
542void glue(helper_pshufd, SUFFIX) (Reg *d, Reg *s, int order)
543{
544 Reg r;
545 r.L(0) = s->L(order & 3);
546 r.L(1) = s->L((order >> 2) & 3);
547 r.L(2) = s->L((order >> 4) & 3);
548 r.L(3) = s->L((order >> 6) & 3);
549 *d = r;
550}
551
552void glue(helper_pshuflw, SUFFIX) (Reg *d, Reg *s, int order)
553{
554 Reg r;
555 r.W(0) = s->W(order & 3);
556 r.W(1) = s->W((order >> 2) & 3);
557 r.W(2) = s->W((order >> 4) & 3);
558 r.W(3) = s->W((order >> 6) & 3);
559 r.Q(1) = s->Q(1);
560 *d = r;
561}
562
563void glue(helper_pshufhw, SUFFIX) (Reg *d, Reg *s, int order)
564{
565 Reg r;
566 r.Q(0) = s->Q(0);
567 r.W(4) = s->W(4 + (order & 3));
568 r.W(5) = s->W(4 + ((order >> 2) & 3));
569 r.W(6) = s->W(4 + ((order >> 4) & 3));
570 r.W(7) = s->W(4 + ((order >> 6) & 3));
571 *d = r;
572}
573#endif
574
575#if SHIFT == 1
576/* FPU ops */
577/* XXX: not accurate */
578
579#define SSE_HELPER_S(name, F)\
580void helper_ ## name ## ps (Reg *d, Reg *s)\
581{\
582 d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
583 d->XMM_S(1) = F(32, d->XMM_S(1), s->XMM_S(1));\
584 d->XMM_S(2) = F(32, d->XMM_S(2), s->XMM_S(2));\
585 d->XMM_S(3) = F(32, d->XMM_S(3), s->XMM_S(3));\
586}\
587\
588void helper_ ## name ## ss (Reg *d, Reg *s)\
589{\
590 d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
591}\
592void helper_ ## name ## pd (Reg *d, Reg *s)\
593{\
594 d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
595 d->XMM_D(1) = F(64, d->XMM_D(1), s->XMM_D(1));\
596}\
597\
598void helper_ ## name ## sd (Reg *d, Reg *s)\
599{\
600 d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
601}
602
603#define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status)
604#define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status)
605#define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status)
606#define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status)
607#define FPU_MIN(size, a, b) (a) < (b) ? (a) : (b)
608#define FPU_MAX(size, a, b) (a) > (b) ? (a) : (b)
609#define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status)
610
611SSE_HELPER_S(add, FPU_ADD)
612SSE_HELPER_S(sub, FPU_SUB)
613SSE_HELPER_S(mul, FPU_MUL)
614SSE_HELPER_S(div, FPU_DIV)
615SSE_HELPER_S(min, FPU_MIN)
616SSE_HELPER_S(max, FPU_MAX)
617SSE_HELPER_S(sqrt, FPU_SQRT)
618
619
620/* float to float conversions */
621void helper_cvtps2pd(Reg *d, Reg *s)
622{
623 float32 s0, s1;
624 s0 = s->XMM_S(0);
625 s1 = s->XMM_S(1);
626 d->XMM_D(0) = float32_to_float64(s0, &env->sse_status);
627 d->XMM_D(1) = float32_to_float64(s1, &env->sse_status);
628}
629
630void helper_cvtpd2ps(Reg *d, Reg *s)
631{
632 d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
633 d->XMM_S(1) = float64_to_float32(s->XMM_D(1), &env->sse_status);
634 d->Q(1) = 0;
635}
636
637void helper_cvtss2sd(Reg *d, Reg *s)
638{
639 d->XMM_D(0) = float32_to_float64(s->XMM_S(0), &env->sse_status);
640}
641
642void helper_cvtsd2ss(Reg *d, Reg *s)
643{
644 d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status);
645}
646
647/* integer to float */
648void helper_cvtdq2ps(Reg *d, Reg *s)
649{
650 d->XMM_S(0) = int32_to_float32(s->XMM_L(0), &env->sse_status);
651 d->XMM_S(1) = int32_to_float32(s->XMM_L(1), &env->sse_status);
652 d->XMM_S(2) = int32_to_float32(s->XMM_L(2), &env->sse_status);
653 d->XMM_S(3) = int32_to_float32(s->XMM_L(3), &env->sse_status);
654}
655
656void helper_cvtdq2pd(Reg *d, Reg *s)
657{
658 int32_t l0, l1;
659 l0 = (int32_t)s->XMM_L(0);
660 l1 = (int32_t)s->XMM_L(1);
661 d->XMM_D(0) = int32_to_float64(l0, &env->sse_status);
662 d->XMM_D(1) = int32_to_float64(l1, &env->sse_status);
663}
664
665void helper_cvtpi2ps(XMMReg *d, MMXReg *s)
666{
667 d->XMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status);
668 d->XMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status);
669}
670
671void helper_cvtpi2pd(XMMReg *d, MMXReg *s)
672{
673 d->XMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status);
674 d->XMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status);
675}
676
677void helper_cvtsi2ss(XMMReg *d, uint32_t val)
678{
679 d->XMM_S(0) = int32_to_float32(val, &env->sse_status);
680}
681
682void helper_cvtsi2sd(XMMReg *d, uint32_t val)
683{
684 d->XMM_D(0) = int32_to_float64(val, &env->sse_status);
685}
686
687#ifdef TARGET_X86_64
688void helper_cvtsq2ss(XMMReg *d, uint64_t val)
689{
690 d->XMM_S(0) = int64_to_float32(val, &env->sse_status);
691}
692
693void helper_cvtsq2sd(XMMReg *d, uint64_t val)
694{
695 d->XMM_D(0) = int64_to_float64(val, &env->sse_status);
696}
697#endif
698
699/* float to integer */
700void helper_cvtps2dq(XMMReg *d, XMMReg *s)
701{
702 d->XMM_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
703 d->XMM_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
704 d->XMM_L(2) = float32_to_int32(s->XMM_S(2), &env->sse_status);
705 d->XMM_L(3) = float32_to_int32(s->XMM_S(3), &env->sse_status);
706}
707
708void helper_cvtpd2dq(XMMReg *d, XMMReg *s)
709{
710 d->XMM_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
711 d->XMM_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
712 d->XMM_Q(1) = 0;
713}
714
715void helper_cvtps2pi(MMXReg *d, XMMReg *s)
716{
717 d->MMX_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status);
718 d->MMX_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status);
719}
720
721void helper_cvtpd2pi(MMXReg *d, XMMReg *s)
722{
723 d->MMX_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status);
724 d->MMX_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status);
725}
726
727int32_t helper_cvtss2si(XMMReg *s)
728{
729 return float32_to_int32(s->XMM_S(0), &env->sse_status);
730}
731
732int32_t helper_cvtsd2si(XMMReg *s)
733{
734 return float64_to_int32(s->XMM_D(0), &env->sse_status);
735}
736
737#ifdef TARGET_X86_64
738int64_t helper_cvtss2sq(XMMReg *s)
739{
740 return float32_to_int64(s->XMM_S(0), &env->sse_status);
741}
742
743int64_t helper_cvtsd2sq(XMMReg *s)
744{
745 return float64_to_int64(s->XMM_D(0), &env->sse_status);
746}
747#endif
748
749/* float to integer truncated */
750void helper_cvttps2dq(XMMReg *d, XMMReg *s)
751{
752 d->XMM_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
753 d->XMM_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
754 d->XMM_L(2) = float32_to_int32_round_to_zero(s->XMM_S(2), &env->sse_status);
755 d->XMM_L(3) = float32_to_int32_round_to_zero(s->XMM_S(3), &env->sse_status);
756}
757
758void helper_cvttpd2dq(XMMReg *d, XMMReg *s)
759{
760 d->XMM_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
761 d->XMM_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
762 d->XMM_Q(1) = 0;
763}
764
765void helper_cvttps2pi(MMXReg *d, XMMReg *s)
766{
767 d->MMX_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
768 d->MMX_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status);
769}
770
771void helper_cvttpd2pi(MMXReg *d, XMMReg *s)
772{
773 d->MMX_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
774 d->MMX_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status);
775}
776
777int32_t helper_cvttss2si(XMMReg *s)
778{
779 return float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status);
780}
781
782int32_t helper_cvttsd2si(XMMReg *s)
783{
784 return float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status);
785}
786
787#ifdef TARGET_X86_64
788int64_t helper_cvttss2sq(XMMReg *s)
789{
790 return float32_to_int64_round_to_zero(s->XMM_S(0), &env->sse_status);
791}
792
793int64_t helper_cvttsd2sq(XMMReg *s)
794{
795 return float64_to_int64_round_to_zero(s->XMM_D(0), &env->sse_status);
796}
797#endif
798
799void helper_rsqrtps(XMMReg *d, XMMReg *s)
800{
801 d->XMM_S(0) = approx_rsqrt(s->XMM_S(0));
802 d->XMM_S(1) = approx_rsqrt(s->XMM_S(1));
803 d->XMM_S(2) = approx_rsqrt(s->XMM_S(2));
804 d->XMM_S(3) = approx_rsqrt(s->XMM_S(3));
805}
806
807void helper_rsqrtss(XMMReg *d, XMMReg *s)
808{
809 d->XMM_S(0) = approx_rsqrt(s->XMM_S(0));
810}
811
812void helper_rcpps(XMMReg *d, XMMReg *s)
813{
814 d->XMM_S(0) = approx_rcp(s->XMM_S(0));
815 d->XMM_S(1) = approx_rcp(s->XMM_S(1));
816 d->XMM_S(2) = approx_rcp(s->XMM_S(2));
817 d->XMM_S(3) = approx_rcp(s->XMM_S(3));
818}
819
820void helper_rcpss(XMMReg *d, XMMReg *s)
821{
822 d->XMM_S(0) = approx_rcp(s->XMM_S(0));
823}
824
825void helper_haddps(XMMReg *d, XMMReg *s)
826{
827 XMMReg r;
828 r.XMM_S(0) = d->XMM_S(0) + d->XMM_S(1);
829 r.XMM_S(1) = d->XMM_S(2) + d->XMM_S(3);
830 r.XMM_S(2) = s->XMM_S(0) + s->XMM_S(1);
831 r.XMM_S(3) = s->XMM_S(2) + s->XMM_S(3);
832 *d = r;
833}
834
835void helper_haddpd(XMMReg *d, XMMReg *s)
836{
837 XMMReg r;
838 r.XMM_D(0) = d->XMM_D(0) + d->XMM_D(1);
839 r.XMM_D(1) = s->XMM_D(0) + s->XMM_D(1);
840 *d = r;
841}
842
843void helper_hsubps(XMMReg *d, XMMReg *s)
844{
845 XMMReg r;
846 r.XMM_S(0) = d->XMM_S(0) - d->XMM_S(1);
847 r.XMM_S(1) = d->XMM_S(2) - d->XMM_S(3);
848 r.XMM_S(2) = s->XMM_S(0) - s->XMM_S(1);
849 r.XMM_S(3) = s->XMM_S(2) - s->XMM_S(3);
850 *d = r;
851}
852
853void helper_hsubpd(XMMReg *d, XMMReg *s)
854{
855 XMMReg r;
856 r.XMM_D(0) = d->XMM_D(0) - d->XMM_D(1);
857 r.XMM_D(1) = s->XMM_D(0) - s->XMM_D(1);
858 *d = r;
859}
860
861void helper_addsubps(XMMReg *d, XMMReg *s)
862{
863 d->XMM_S(0) = d->XMM_S(0) - s->XMM_S(0);
864 d->XMM_S(1) = d->XMM_S(1) + s->XMM_S(1);
865 d->XMM_S(2) = d->XMM_S(2) - s->XMM_S(2);
866 d->XMM_S(3) = d->XMM_S(3) + s->XMM_S(3);
867}
868
869void helper_addsubpd(XMMReg *d, XMMReg *s)
870{
871 d->XMM_D(0) = d->XMM_D(0) - s->XMM_D(0);
872 d->XMM_D(1) = d->XMM_D(1) + s->XMM_D(1);
873}
874
875/* XXX: unordered */
876#define SSE_HELPER_CMP(name, F)\
877void helper_ ## name ## ps (Reg *d, Reg *s)\
878{\
879 d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
880 d->XMM_L(1) = F(32, d->XMM_S(1), s->XMM_S(1));\
881 d->XMM_L(2) = F(32, d->XMM_S(2), s->XMM_S(2));\
882 d->XMM_L(3) = F(32, d->XMM_S(3), s->XMM_S(3));\
883}\
884\
885void helper_ ## name ## ss (Reg *d, Reg *s)\
886{\
887 d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\
888}\
889void helper_ ## name ## pd (Reg *d, Reg *s)\
890{\
891 d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
892 d->XMM_Q(1) = F(64, d->XMM_D(1), s->XMM_D(1));\
893}\
894\
895void helper_ ## name ## sd (Reg *d, Reg *s)\
896{\
897 d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\
898}
899
900#define FPU_CMPEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? -1 : 0
901#define FPU_CMPLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? -1 : 0
902#define FPU_CMPLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? -1 : 0
903#define FPU_CMPUNORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? - 1 : 0
904#define FPU_CMPNEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? 0 : -1
905#define FPU_CMPNLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? 0 : -1
906#define FPU_CMPNLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? 0 : -1
907#define FPU_CMPORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? 0 : -1
908
909SSE_HELPER_CMP(cmpeq, FPU_CMPEQ)
910SSE_HELPER_CMP(cmplt, FPU_CMPLT)
911SSE_HELPER_CMP(cmple, FPU_CMPLE)
912SSE_HELPER_CMP(cmpunord, FPU_CMPUNORD)
913SSE_HELPER_CMP(cmpneq, FPU_CMPNEQ)
914SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT)
915SSE_HELPER_CMP(cmpnle, FPU_CMPNLE)
916SSE_HELPER_CMP(cmpord, FPU_CMPORD)
917
918const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
919
920void helper_ucomiss(Reg *d, Reg *s)
921{
922 int ret;
923 float32 s0, s1;
924
925 s0 = d->XMM_S(0);
926 s1 = s->XMM_S(0);
927 ret = float32_compare_quiet(s0, s1, &env->sse_status);
928 CC_SRC = comis_eflags[ret + 1];
929 FORCE_RET();
930}
931
932void helper_comiss(Reg *d, Reg *s)
933{
934 int ret;
935 float32 s0, s1;
936
937 s0 = d->XMM_S(0);
938 s1 = s->XMM_S(0);
939 ret = float32_compare(s0, s1, &env->sse_status);
940 CC_SRC = comis_eflags[ret + 1];
941 FORCE_RET();
942}
943
944void helper_ucomisd(Reg *d, Reg *s)
945{
946 int ret;
947 float64 d0, d1;
948
949 d0 = d->XMM_D(0);
950 d1 = s->XMM_D(0);
951 ret = float64_compare_quiet(d0, d1, &env->sse_status);
952 CC_SRC = comis_eflags[ret + 1];
953 FORCE_RET();
954}
955
956void helper_comisd(Reg *d, Reg *s)
957{
958 int ret;
959 float64 d0, d1;
960
961 d0 = d->XMM_D(0);
962 d1 = s->XMM_D(0);
963 ret = float64_compare(d0, d1, &env->sse_status);
964 CC_SRC = comis_eflags[ret + 1];
965 FORCE_RET();
966}
967
968uint32_t helper_movmskps(Reg *s)
969{
970 int b0, b1, b2, b3;
971 b0 = s->XMM_L(0) >> 31;
972 b1 = s->XMM_L(1) >> 31;
973 b2 = s->XMM_L(2) >> 31;
974 b3 = s->XMM_L(3) >> 31;
975 return b0 | (b1 << 1) | (b2 << 2) | (b3 << 3);
976}
977
978uint32_t helper_movmskpd(Reg *s)
979{
980 int b0, b1;
981 b0 = s->XMM_L(1) >> 31;
982 b1 = s->XMM_L(3) >> 31;
983 return b0 | (b1 << 1);
984}
985
986#endif
987
988uint32_t glue(helper_pmovmskb, SUFFIX)(Reg *s)
989{
990 uint32_t val;
991 val = 0;
992 val |= (s->XMM_B(0) >> 7);
993 val |= (s->XMM_B(1) >> 6) & 0x02;
994 val |= (s->XMM_B(2) >> 5) & 0x04;
995 val |= (s->XMM_B(3) >> 4) & 0x08;
996 val |= (s->XMM_B(4) >> 3) & 0x10;
997 val |= (s->XMM_B(5) >> 2) & 0x20;
998 val |= (s->XMM_B(6) >> 1) & 0x40;
999 val |= (s->XMM_B(7)) & 0x80;
1000#if SHIFT == 1
1001 val |= (s->XMM_B(8) << 1) & 0x0100;
1002 val |= (s->XMM_B(9) << 2) & 0x0200;
1003 val |= (s->XMM_B(10) << 3) & 0x0400;
1004 val |= (s->XMM_B(11) << 4) & 0x0800;
1005 val |= (s->XMM_B(12) << 5) & 0x1000;
1006 val |= (s->XMM_B(13) << 6) & 0x2000;
1007 val |= (s->XMM_B(14) << 7) & 0x4000;
1008 val |= (s->XMM_B(15) << 8) & 0x8000;
1009#endif
1010 return val;
1011}
1012
1013void glue(helper_packsswb, SUFFIX) (Reg *d, Reg *s)
1014{
1015 Reg r;
1016
1017 r.B(0) = satsb((int16_t)d->W(0));
1018 r.B(1) = satsb((int16_t)d->W(1));
1019 r.B(2) = satsb((int16_t)d->W(2));
1020 r.B(3) = satsb((int16_t)d->W(3));
1021#if SHIFT == 1
1022 r.B(4) = satsb((int16_t)d->W(4));
1023 r.B(5) = satsb((int16_t)d->W(5));
1024 r.B(6) = satsb((int16_t)d->W(6));
1025 r.B(7) = satsb((int16_t)d->W(7));
1026#endif
1027 r.B((4 << SHIFT) + 0) = satsb((int16_t)s->W(0));
1028 r.B((4 << SHIFT) + 1) = satsb((int16_t)s->W(1));
1029 r.B((4 << SHIFT) + 2) = satsb((int16_t)s->W(2));
1030 r.B((4 << SHIFT) + 3) = satsb((int16_t)s->W(3));
1031#if SHIFT == 1
1032 r.B(12) = satsb((int16_t)s->W(4));
1033 r.B(13) = satsb((int16_t)s->W(5));
1034 r.B(14) = satsb((int16_t)s->W(6));
1035 r.B(15) = satsb((int16_t)s->W(7));
1036#endif
1037 *d = r;
1038}
1039
1040void glue(helper_packuswb, SUFFIX) (Reg *d, Reg *s)
1041{
1042 Reg r;
1043
1044 r.B(0) = satub((int16_t)d->W(0));
1045 r.B(1) = satub((int16_t)d->W(1));
1046 r.B(2) = satub((int16_t)d->W(2));
1047 r.B(3) = satub((int16_t)d->W(3));
1048#if SHIFT == 1
1049 r.B(4) = satub((int16_t)d->W(4));
1050 r.B(5) = satub((int16_t)d->W(5));
1051 r.B(6) = satub((int16_t)d->W(6));
1052 r.B(7) = satub((int16_t)d->W(7));
1053#endif
1054 r.B((4 << SHIFT) + 0) = satub((int16_t)s->W(0));
1055 r.B((4 << SHIFT) + 1) = satub((int16_t)s->W(1));
1056 r.B((4 << SHIFT) + 2) = satub((int16_t)s->W(2));
1057 r.B((4 << SHIFT) + 3) = satub((int16_t)s->W(3));
1058#if SHIFT == 1
1059 r.B(12) = satub((int16_t)s->W(4));
1060 r.B(13) = satub((int16_t)s->W(5));
1061 r.B(14) = satub((int16_t)s->W(6));
1062 r.B(15) = satub((int16_t)s->W(7));
1063#endif
1064 *d = r;
1065}
1066
1067void glue(helper_packssdw, SUFFIX) (Reg *d, Reg *s)
1068{
1069 Reg r;
1070
1071 r.W(0) = satsw(d->L(0));
1072 r.W(1) = satsw(d->L(1));
1073#if SHIFT == 1
1074 r.W(2) = satsw(d->L(2));
1075 r.W(3) = satsw(d->L(3));
1076#endif
1077 r.W((2 << SHIFT) + 0) = satsw(s->L(0));
1078 r.W((2 << SHIFT) + 1) = satsw(s->L(1));
1079#if SHIFT == 1
1080 r.W(6) = satsw(s->L(2));
1081 r.W(7) = satsw(s->L(3));
1082#endif
1083 *d = r;
1084}
1085
1086#define UNPCK_OP(base_name, base) \
1087 \
1088void glue(helper_punpck ## base_name ## bw, SUFFIX) (Reg *d, Reg *s) \
1089{ \
1090 Reg r; \
1091 \
1092 r.B(0) = d->B((base << (SHIFT + 2)) + 0); \
1093 r.B(1) = s->B((base << (SHIFT + 2)) + 0); \
1094 r.B(2) = d->B((base << (SHIFT + 2)) + 1); \
1095 r.B(3) = s->B((base << (SHIFT + 2)) + 1); \
1096 r.B(4) = d->B((base << (SHIFT + 2)) + 2); \
1097 r.B(5) = s->B((base << (SHIFT + 2)) + 2); \
1098 r.B(6) = d->B((base << (SHIFT + 2)) + 3); \
1099 r.B(7) = s->B((base << (SHIFT + 2)) + 3); \
1100XMM_ONLY( \
1101 r.B(8) = d->B((base << (SHIFT + 2)) + 4); \
1102 r.B(9) = s->B((base << (SHIFT + 2)) + 4); \
1103 r.B(10) = d->B((base << (SHIFT + 2)) + 5); \
1104 r.B(11) = s->B((base << (SHIFT + 2)) + 5); \
1105 r.B(12) = d->B((base << (SHIFT + 2)) + 6); \
1106 r.B(13) = s->B((base << (SHIFT + 2)) + 6); \
1107 r.B(14) = d->B((base << (SHIFT + 2)) + 7); \
1108 r.B(15) = s->B((base << (SHIFT + 2)) + 7); \
1109) \
1110 *d = r; \
1111} \
1112 \
1113void glue(helper_punpck ## base_name ## wd, SUFFIX) (Reg *d, Reg *s) \
1114{ \
1115 Reg r; \
1116 \
1117 r.W(0) = d->W((base << (SHIFT + 1)) + 0); \
1118 r.W(1) = s->W((base << (SHIFT + 1)) + 0); \
1119 r.W(2) = d->W((base << (SHIFT + 1)) + 1); \
1120 r.W(3) = s->W((base << (SHIFT + 1)) + 1); \
1121XMM_ONLY( \
1122 r.W(4) = d->W((base << (SHIFT + 1)) + 2); \
1123 r.W(5) = s->W((base << (SHIFT + 1)) + 2); \
1124 r.W(6) = d->W((base << (SHIFT + 1)) + 3); \
1125 r.W(7) = s->W((base << (SHIFT + 1)) + 3); \
1126) \
1127 *d = r; \
1128} \
1129 \
1130void glue(helper_punpck ## base_name ## dq, SUFFIX) (Reg *d, Reg *s) \
1131{ \
1132 Reg r; \
1133 \
1134 r.L(0) = d->L((base << SHIFT) + 0); \
1135 r.L(1) = s->L((base << SHIFT) + 0); \
1136XMM_ONLY( \
1137 r.L(2) = d->L((base << SHIFT) + 1); \
1138 r.L(3) = s->L((base << SHIFT) + 1); \
1139) \
1140 *d = r; \
1141} \
1142 \
1143XMM_ONLY( \
1144void glue(helper_punpck ## base_name ## qdq, SUFFIX) (Reg *d, Reg *s) \
1145{ \
1146 Reg r; \
1147 \
1148 r.Q(0) = d->Q(base); \
1149 r.Q(1) = s->Q(base); \
1150 *d = r; \
1151} \
1152)
1153
1154UNPCK_OP(l, 0)
1155UNPCK_OP(h, 1)
1156
1157/* 3DNow! float ops */
1158#if SHIFT == 0
1159void helper_pi2fd(MMXReg *d, MMXReg *s)
1160{
1161 d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status);
1162 d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status);
1163}
1164
1165void helper_pi2fw(MMXReg *d, MMXReg *s)
1166{
1167 d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status);
1168 d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status);
1169}
1170
1171void helper_pf2id(MMXReg *d, MMXReg *s)
1172{
1173 d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status);
1174 d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status);
1175}
1176
1177void helper_pf2iw(MMXReg *d, MMXReg *s)
1178{
1179 d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status));
1180 d->MMX_L(1) = satsw(float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status));
1181}
1182
1183void helper_pfacc(MMXReg *d, MMXReg *s)
1184{
1185 MMXReg r;
1186 r.MMX_S(0) = float32_add(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1187 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1188 *d = r;
1189}
1190
1191void helper_pfadd(MMXReg *d, MMXReg *s)
1192{
1193 d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1194 d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1195}
1196
1197void helper_pfcmpeq(MMXReg *d, MMXReg *s)
1198{
1199 d->MMX_L(0) = float32_eq(d->MMX_S(0), s->MMX_S(0), &env->mmx_status) ? -1 : 0;
1200 d->MMX_L(1) = float32_eq(d->MMX_S(1), s->MMX_S(1), &env->mmx_status) ? -1 : 0;
1201}
1202
1203void helper_pfcmpge(MMXReg *d, MMXReg *s)
1204{
1205 d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0;
1206 d->MMX_L(1) = float32_le(s->MMX_S(1), d->MMX_S(1), &env->mmx_status) ? -1 : 0;
1207}
1208
1209void helper_pfcmpgt(MMXReg *d, MMXReg *s)
1210{
1211 d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status) ? -1 : 0;
1212 d->MMX_L(1) = float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status) ? -1 : 0;
1213}
1214
1215void helper_pfmax(MMXReg *d, MMXReg *s)
1216{
1217 if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status))
1218 d->MMX_S(0) = s->MMX_S(0);
1219 if (float32_lt(d->MMX_S(1), s->MMX_S(1), &env->mmx_status))
1220 d->MMX_S(1) = s->MMX_S(1);
1221}
1222
1223void helper_pfmin(MMXReg *d, MMXReg *s)
1224{
1225 if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status))
1226 d->MMX_S(0) = s->MMX_S(0);
1227 if (float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status))
1228 d->MMX_S(1) = s->MMX_S(1);
1229}
1230
1231void helper_pfmul(MMXReg *d, MMXReg *s)
1232{
1233 d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1234 d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1235}
1236
1237void helper_pfnacc(MMXReg *d, MMXReg *s)
1238{
1239 MMXReg r;
1240 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1241 r.MMX_S(1) = float32_sub(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1242 *d = r;
1243}
1244
1245void helper_pfpnacc(MMXReg *d, MMXReg *s)
1246{
1247 MMXReg r;
1248 r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1249 r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1250 *d = r;
1251}
1252
1253void helper_pfrcp(MMXReg *d, MMXReg *s)
1254{
1255 d->MMX_S(0) = approx_rcp(s->MMX_S(0));
1256 d->MMX_S(1) = d->MMX_S(0);
1257}
1258
1259void helper_pfrsqrt(MMXReg *d, MMXReg *s)
1260{
1261 d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff;
1262 d->MMX_S(1) = approx_rsqrt(d->MMX_S(1));
1263 d->MMX_L(1) |= s->MMX_L(0) & 0x80000000;
1264 d->MMX_L(0) = d->MMX_L(1);
1265}
1266
1267void helper_pfsub(MMXReg *d, MMXReg *s)
1268{
1269 d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1270 d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1271}
1272
1273void helper_pfsubr(MMXReg *d, MMXReg *s)
1274{
1275 d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status);
1276 d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status);
1277}
1278
1279void helper_pswapd(MMXReg *d, MMXReg *s)
1280{
1281 MMXReg r;
1282 r.MMX_L(0) = s->MMX_L(1);
1283 r.MMX_L(1) = s->MMX_L(0);
1284 *d = r;
1285}
1286#endif
1287
1288/* SSSE3 op helpers */
1289void glue(helper_pshufb, SUFFIX) (Reg *d, Reg *s)
1290{
1291 int i;
1292 Reg r;
1293
1294 for (i = 0; i < (8 << SHIFT); i++)
1295 r.B(i) = (s->B(i) & 0x80) ? 0 : (d->B(s->B(i) & ((8 << SHIFT) - 1)));
1296
1297 *d = r;
1298}
1299
1300void glue(helper_phaddw, SUFFIX) (Reg *d, Reg *s)
1301{
1302 d->W(0) = (int16_t)d->W(0) + (int16_t)d->W(1);
1303 d->W(1) = (int16_t)d->W(2) + (int16_t)d->W(3);
1304 XMM_ONLY(d->W(2) = (int16_t)d->W(4) + (int16_t)d->W(5));
1305 XMM_ONLY(d->W(3) = (int16_t)d->W(6) + (int16_t)d->W(7));
1306 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) + (int16_t)s->W(1);
1307 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) + (int16_t)s->W(3);
1308 XMM_ONLY(d->W(6) = (int16_t)s->W(4) + (int16_t)s->W(5));
1309 XMM_ONLY(d->W(7) = (int16_t)s->W(6) + (int16_t)s->W(7));
1310}
1311
1312void glue(helper_phaddd, SUFFIX) (Reg *d, Reg *s)
1313{
1314 d->L(0) = (int32_t)d->L(0) + (int32_t)d->L(1);
1315 XMM_ONLY(d->L(1) = (int32_t)d->L(2) + (int32_t)d->L(3));
1316 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) + (int32_t)s->L(1);
1317 XMM_ONLY(d->L(3) = (int32_t)s->L(2) + (int32_t)s->L(3));
1318}
1319
1320void glue(helper_phaddsw, SUFFIX) (Reg *d, Reg *s)
1321{
1322 d->W(0) = satsw((int16_t)d->W(0) + (int16_t)d->W(1));
1323 d->W(1) = satsw((int16_t)d->W(2) + (int16_t)d->W(3));
1324 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) + (int16_t)d->W(5)));
1325 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) + (int16_t)d->W(7)));
1326 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) + (int16_t)s->W(1));
1327 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) + (int16_t)s->W(3));
1328 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) + (int16_t)s->W(5)));
1329 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) + (int16_t)s->W(7)));
1330}
1331
1332void glue(helper_pmaddubsw, SUFFIX) (Reg *d, Reg *s)
1333{
1334 d->W(0) = satsw((int8_t)s->B( 0) * (uint8_t)d->B( 0) +
1335 (int8_t)s->B( 1) * (uint8_t)d->B( 1));
1336 d->W(1) = satsw((int8_t)s->B( 2) * (uint8_t)d->B( 2) +
1337 (int8_t)s->B( 3) * (uint8_t)d->B( 3));
1338 d->W(2) = satsw((int8_t)s->B( 4) * (uint8_t)d->B( 4) +
1339 (int8_t)s->B( 5) * (uint8_t)d->B( 5));
1340 d->W(3) = satsw((int8_t)s->B( 6) * (uint8_t)d->B( 6) +
1341 (int8_t)s->B( 7) * (uint8_t)d->B( 7));
1342#if SHIFT == 1
1343 d->W(4) = satsw((int8_t)s->B( 8) * (uint8_t)d->B( 8) +
1344 (int8_t)s->B( 9) * (uint8_t)d->B( 9));
1345 d->W(5) = satsw((int8_t)s->B(10) * (uint8_t)d->B(10) +
1346 (int8_t)s->B(11) * (uint8_t)d->B(11));
1347 d->W(6) = satsw((int8_t)s->B(12) * (uint8_t)d->B(12) +
1348 (int8_t)s->B(13) * (uint8_t)d->B(13));
1349 d->W(7) = satsw((int8_t)s->B(14) * (uint8_t)d->B(14) +
1350 (int8_t)s->B(15) * (uint8_t)d->B(15));
1351#endif
1352}
1353
1354void glue(helper_phsubw, SUFFIX) (Reg *d, Reg *s)
1355{
1356 d->W(0) = (int16_t)d->W(0) - (int16_t)d->W(1);
1357 d->W(1) = (int16_t)d->W(2) - (int16_t)d->W(3);
1358 XMM_ONLY(d->W(2) = (int16_t)d->W(4) - (int16_t)d->W(5));
1359 XMM_ONLY(d->W(3) = (int16_t)d->W(6) - (int16_t)d->W(7));
1360 d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) - (int16_t)s->W(1);
1361 d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) - (int16_t)s->W(3);
1362 XMM_ONLY(d->W(6) = (int16_t)s->W(4) - (int16_t)s->W(5));
1363 XMM_ONLY(d->W(7) = (int16_t)s->W(6) - (int16_t)s->W(7));
1364}
1365
1366void glue(helper_phsubd, SUFFIX) (Reg *d, Reg *s)
1367{
1368 d->L(0) = (int32_t)d->L(0) - (int32_t)d->L(1);
1369 XMM_ONLY(d->L(1) = (int32_t)d->L(2) - (int32_t)d->L(3));
1370 d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) - (int32_t)s->L(1);
1371 XMM_ONLY(d->L(3) = (int32_t)s->L(2) - (int32_t)s->L(3));
1372}
1373
1374void glue(helper_phsubsw, SUFFIX) (Reg *d, Reg *s)
1375{
1376 d->W(0) = satsw((int16_t)d->W(0) - (int16_t)d->W(1));
1377 d->W(1) = satsw((int16_t)d->W(2) - (int16_t)d->W(3));
1378 XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) - (int16_t)d->W(5)));
1379 XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) - (int16_t)d->W(7)));
1380 d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) - (int16_t)s->W(1));
1381 d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) - (int16_t)s->W(3));
1382 XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) - (int16_t)s->W(5)));
1383 XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) - (int16_t)s->W(7)));
1384}
1385
1386#define FABSB(_, x) x > INT8_MAX ? -(int8_t ) x : x
1387#define FABSW(_, x) x > INT16_MAX ? -(int16_t) x : x
1388#define FABSL(_, x) x > INT32_MAX ? -(int32_t) x : x
1389SSE_HELPER_B(helper_pabsb, FABSB)
1390SSE_HELPER_W(helper_pabsw, FABSW)
1391SSE_HELPER_L(helper_pabsd, FABSL)
1392
1393#define FMULHRSW(d, s) ((int16_t) d * (int16_t) s + 0x4000) >> 15
1394SSE_HELPER_W(helper_pmulhrsw, FMULHRSW)
1395
1396#define FSIGNB(d, s) s <= INT8_MAX ? s ? d : 0 : -(int8_t ) d
1397#define FSIGNW(d, s) s <= INT16_MAX ? s ? d : 0 : -(int16_t) d
1398#define FSIGNL(d, s) s <= INT32_MAX ? s ? d : 0 : -(int32_t) d
1399SSE_HELPER_B(helper_psignb, FSIGNB)
1400SSE_HELPER_W(helper_psignw, FSIGNW)
1401SSE_HELPER_L(helper_psignd, FSIGNL)
1402
1403void glue(helper_palignr, SUFFIX) (Reg *d, Reg *s, int32_t shift)
1404{
1405 Reg r;
1406
1407 /* XXX could be checked during translation */
1408 if (shift >= (16 << SHIFT)) {
1409 r.Q(0) = 0;
1410 XMM_ONLY(r.Q(1) = 0);
1411 } else {
1412 shift <<= 3;
1413#define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0)
1414#if SHIFT == 0
1415 r.Q(0) = SHR(s->Q(0), shift - 0) |
1416 SHR(d->Q(0), shift - 64);
1417#else
1418 r.Q(0) = SHR(s->Q(0), shift - 0) |
1419 SHR(s->Q(1), shift - 64) |
1420 SHR(d->Q(0), shift - 128) |
1421 SHR(d->Q(1), shift - 192);
1422 r.Q(1) = SHR(s->Q(0), shift + 64) |
1423 SHR(s->Q(1), shift - 0) |
1424 SHR(d->Q(0), shift - 64) |
1425 SHR(d->Q(1), shift - 128);
1426#endif
1427#undef SHR
1428 }
1429
1430 *d = r;
1431}
1432
1433#define XMM0 env->xmm_regs[0]
1434
1435#if SHIFT == 1
1436#define SSE_HELPER_V(name, elem, num, F)\
1437void glue(name, SUFFIX) (Reg *d, Reg *s)\
1438{\
1439 d->elem(0) = F(d->elem(0), s->elem(0), XMM0.elem(0));\
1440 d->elem(1) = F(d->elem(1), s->elem(1), XMM0.elem(1));\
1441 if (num > 2) {\
1442 d->elem(2) = F(d->elem(2), s->elem(2), XMM0.elem(2));\
1443 d->elem(3) = F(d->elem(3), s->elem(3), XMM0.elem(3));\
1444 if (num > 4) {\
1445 d->elem(4) = F(d->elem(4), s->elem(4), XMM0.elem(4));\
1446 d->elem(5) = F(d->elem(5), s->elem(5), XMM0.elem(5));\
1447 d->elem(6) = F(d->elem(6), s->elem(6), XMM0.elem(6));\
1448 d->elem(7) = F(d->elem(7), s->elem(7), XMM0.elem(7));\
1449 if (num > 8) {\
1450 d->elem(8) = F(d->elem(8), s->elem(8), XMM0.elem(8));\
1451 d->elem(9) = F(d->elem(9), s->elem(9), XMM0.elem(9));\
1452 d->elem(10) = F(d->elem(10), s->elem(10), XMM0.elem(10));\
1453 d->elem(11) = F(d->elem(11), s->elem(11), XMM0.elem(11));\
1454 d->elem(12) = F(d->elem(12), s->elem(12), XMM0.elem(12));\
1455 d->elem(13) = F(d->elem(13), s->elem(13), XMM0.elem(13));\
1456 d->elem(14) = F(d->elem(14), s->elem(14), XMM0.elem(14));\
1457 d->elem(15) = F(d->elem(15), s->elem(15), XMM0.elem(15));\
1458 }\
1459 }\
1460 }\
1461}
1462
1463#define SSE_HELPER_I(name, elem, num, F)\
1464void glue(name, SUFFIX) (Reg *d, Reg *s, uint32_t imm)\
1465{\
1466 d->elem(0) = F(d->elem(0), s->elem(0), ((imm >> 0) & 1));\
1467 d->elem(1) = F(d->elem(1), s->elem(1), ((imm >> 1) & 1));\
1468 if (num > 2) {\
1469 d->elem(2) = F(d->elem(2), s->elem(2), ((imm >> 2) & 1));\
1470 d->elem(3) = F(d->elem(3), s->elem(3), ((imm >> 3) & 1));\
1471 if (num > 4) {\
1472 d->elem(4) = F(d->elem(4), s->elem(4), ((imm >> 4) & 1));\
1473 d->elem(5) = F(d->elem(5), s->elem(5), ((imm >> 5) & 1));\
1474 d->elem(6) = F(d->elem(6), s->elem(6), ((imm >> 6) & 1));\
1475 d->elem(7) = F(d->elem(7), s->elem(7), ((imm >> 7) & 1));\
1476 if (num > 8) {\
1477 d->elem(8) = F(d->elem(8), s->elem(8), ((imm >> 8) & 1));\
1478 d->elem(9) = F(d->elem(9), s->elem(9), ((imm >> 9) & 1));\
1479 d->elem(10) = F(d->elem(10), s->elem(10), ((imm >> 10) & 1));\
1480 d->elem(11) = F(d->elem(11), s->elem(11), ((imm >> 11) & 1));\
1481 d->elem(12) = F(d->elem(12), s->elem(12), ((imm >> 12) & 1));\
1482 d->elem(13) = F(d->elem(13), s->elem(13), ((imm >> 13) & 1));\
1483 d->elem(14) = F(d->elem(14), s->elem(14), ((imm >> 14) & 1));\
1484 d->elem(15) = F(d->elem(15), s->elem(15), ((imm >> 15) & 1));\
1485 }\
1486 }\
1487 }\
1488}
1489
1490/* SSE4.1 op helpers */
1491#define FBLENDVB(d, s, m) (m & 0x80) ? s : d
1492#define FBLENDVPS(d, s, m) (m & 0x80000000) ? s : d
1493#define FBLENDVPD(d, s, m) (m & 0x8000000000000000LL) ? s : d
1494SSE_HELPER_V(helper_pblendvb, B, 16, FBLENDVB)
1495SSE_HELPER_V(helper_blendvps, L, 4, FBLENDVPS)
1496SSE_HELPER_V(helper_blendvpd, Q, 2, FBLENDVPD)
1497
1498void glue(helper_ptest, SUFFIX) (Reg *d, Reg *s)
1499{
1500 uint64_t zf = (s->Q(0) & d->Q(0)) | (s->Q(1) & d->Q(1));
1501 uint64_t cf = (s->Q(0) & ~d->Q(0)) | (s->Q(1) & ~d->Q(1));
1502
1503 CC_SRC = (zf ? 0 : CC_Z) | (cf ? 0 : CC_C);
1504}
1505
1506#define SSE_HELPER_F(name, elem, num, F)\
1507void glue(name, SUFFIX) (Reg *d, Reg *s)\
1508{\
1509 d->elem(0) = F(0);\
1510 d->elem(1) = F(1);\
1511 d->elem(2) = F(2);\
1512 d->elem(3) = F(3);\
1513 if (num > 3) {\
1514 d->elem(4) = F(4);\
1515 d->elem(5) = F(5);\
1516 if (num > 5) {\
1517 d->elem(6) = F(6);\
1518 d->elem(7) = F(7);\
1519 }\
1520 }\
1521}
1522
1523SSE_HELPER_F(helper_pmovsxbw, W, 8, (int8_t) s->B)
1524SSE_HELPER_F(helper_pmovsxbd, L, 4, (int8_t) s->B)
1525SSE_HELPER_F(helper_pmovsxbq, Q, 2, (int8_t) s->B)
1526SSE_HELPER_F(helper_pmovsxwd, L, 4, (int16_t) s->W)
1527SSE_HELPER_F(helper_pmovsxwq, Q, 2, (int16_t) s->W)
1528SSE_HELPER_F(helper_pmovsxdq, Q, 2, (int32_t) s->L)
1529SSE_HELPER_F(helper_pmovzxbw, W, 8, s->B)
1530SSE_HELPER_F(helper_pmovzxbd, L, 4, s->B)
1531SSE_HELPER_F(helper_pmovzxbq, Q, 2, s->B)
1532SSE_HELPER_F(helper_pmovzxwd, L, 4, s->W)
1533SSE_HELPER_F(helper_pmovzxwq, Q, 2, s->W)
1534SSE_HELPER_F(helper_pmovzxdq, Q, 2, s->L)
1535
1536void glue(helper_pmuldq, SUFFIX) (Reg *d, Reg *s)
1537{
1538 d->Q(0) = (int64_t) (int32_t) d->L(0) * (int32_t) s->L(0);
1539 d->Q(1) = (int64_t) (int32_t) d->L(2) * (int32_t) s->L(2);
1540}
1541
1542#define FCMPEQQ(d, s) d == s ? -1 : 0
1543SSE_HELPER_Q(helper_pcmpeqq, FCMPEQQ)
1544
1545void glue(helper_packusdw, SUFFIX) (Reg *d, Reg *s)
1546{
1547 d->W(0) = satuw((int32_t) d->L(0));
1548 d->W(1) = satuw((int32_t) d->L(1));
1549 d->W(2) = satuw((int32_t) d->L(2));
1550 d->W(3) = satuw((int32_t) d->L(3));
1551 d->W(4) = satuw((int32_t) s->L(0));
1552 d->W(5) = satuw((int32_t) s->L(1));
1553 d->W(6) = satuw((int32_t) s->L(2));
1554 d->W(7) = satuw((int32_t) s->L(3));
1555}
1556
1557#define FMINSB(d, s) MIN((int8_t) d, (int8_t) s)
1558#define FMINSD(d, s) MIN((int32_t) d, (int32_t) s)
1559#define FMAXSB(d, s) MAX((int8_t) d, (int8_t) s)
1560#define FMAXSD(d, s) MAX((int32_t) d, (int32_t) s)
1561SSE_HELPER_B(helper_pminsb, FMINSB)
1562SSE_HELPER_L(helper_pminsd, FMINSD)
1563SSE_HELPER_W(helper_pminuw, MIN)
1564SSE_HELPER_L(helper_pminud, MIN)
1565SSE_HELPER_B(helper_pmaxsb, FMAXSB)
1566SSE_HELPER_L(helper_pmaxsd, FMAXSD)
1567SSE_HELPER_W(helper_pmaxuw, MAX)
1568SSE_HELPER_L(helper_pmaxud, MAX)
1569
1570#define FMULLD(d, s) (int32_t) d * (int32_t) s
1571SSE_HELPER_L(helper_pmulld, FMULLD)
1572
1573void glue(helper_phminposuw, SUFFIX) (Reg *d, Reg *s)
1574{
1575 int idx = 0;
1576
1577 if (s->W(1) < s->W(idx))
1578 idx = 1;
1579 if (s->W(2) < s->W(idx))
1580 idx = 2;
1581 if (s->W(3) < s->W(idx))
1582 idx = 3;
1583 if (s->W(4) < s->W(idx))
1584 idx = 4;
1585 if (s->W(5) < s->W(idx))
1586 idx = 5;
1587 if (s->W(6) < s->W(idx))
1588 idx = 6;
1589 if (s->W(7) < s->W(idx))
1590 idx = 7;
1591
1592 d->Q(1) = 0;
1593 d->L(1) = 0;
1594 d->W(1) = idx;
1595 d->W(0) = s->W(idx);
1596}
1597
1598void glue(helper_roundps, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1599{
1600 signed char prev_rounding_mode;
1601
1602 prev_rounding_mode = env->sse_status.float_rounding_mode;
1603 if (!(mode & (1 << 2)))
1604 switch (mode & 3) {
1605 case 0:
1606 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1607 break;
1608 case 1:
1609 set_float_rounding_mode(float_round_down, &env->sse_status);
1610 break;
1611 case 2:
1612 set_float_rounding_mode(float_round_up, &env->sse_status);
1613 break;
1614 case 3:
1615 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1616 break;
1617 }
1618
1619 d->L(0) = float64_round_to_int(s->L(0), &env->sse_status);
1620 d->L(1) = float64_round_to_int(s->L(1), &env->sse_status);
1621 d->L(2) = float64_round_to_int(s->L(2), &env->sse_status);
1622 d->L(3) = float64_round_to_int(s->L(3), &env->sse_status);
1623
1624#if 0 /* TODO */
1625 if (mode & (1 << 3))
1626 set_float_exception_flags(
1627 get_float_exception_flags(&env->sse_status) &
1628 ~float_flag_inexact,
1629 &env->sse_status);
1630#endif
1631 env->sse_status.float_rounding_mode = prev_rounding_mode;
1632}
1633
1634void glue(helper_roundpd, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1635{
1636 signed char prev_rounding_mode;
1637
1638 prev_rounding_mode = env->sse_status.float_rounding_mode;
1639 if (!(mode & (1 << 2)))
1640 switch (mode & 3) {
1641 case 0:
1642 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1643 break;
1644 case 1:
1645 set_float_rounding_mode(float_round_down, &env->sse_status);
1646 break;
1647 case 2:
1648 set_float_rounding_mode(float_round_up, &env->sse_status);
1649 break;
1650 case 3:
1651 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1652 break;
1653 }
1654
1655 d->Q(0) = float64_round_to_int(s->Q(0), &env->sse_status);
1656 d->Q(1) = float64_round_to_int(s->Q(1), &env->sse_status);
1657
1658#if 0 /* TODO */
1659 if (mode & (1 << 3))
1660 set_float_exception_flags(
1661 get_float_exception_flags(&env->sse_status) &
1662 ~float_flag_inexact,
1663 &env->sse_status);
1664#endif
1665 env->sse_status.float_rounding_mode = prev_rounding_mode;
1666}
1667
1668void glue(helper_roundss, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1669{
1670 signed char prev_rounding_mode;
1671
1672 prev_rounding_mode = env->sse_status.float_rounding_mode;
1673 if (!(mode & (1 << 2)))
1674 switch (mode & 3) {
1675 case 0:
1676 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1677 break;
1678 case 1:
1679 set_float_rounding_mode(float_round_down, &env->sse_status);
1680 break;
1681 case 2:
1682 set_float_rounding_mode(float_round_up, &env->sse_status);
1683 break;
1684 case 3:
1685 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1686 break;
1687 }
1688
1689 d->L(0) = float64_round_to_int(s->L(0), &env->sse_status);
1690
1691#if 0 /* TODO */
1692 if (mode & (1 << 3))
1693 set_float_exception_flags(
1694 get_float_exception_flags(&env->sse_status) &
1695 ~float_flag_inexact,
1696 &env->sse_status);
1697#endif
1698 env->sse_status.float_rounding_mode = prev_rounding_mode;
1699}
1700
1701void glue(helper_roundsd, SUFFIX) (Reg *d, Reg *s, uint32_t mode)
1702{
1703 signed char prev_rounding_mode;
1704
1705 prev_rounding_mode = env->sse_status.float_rounding_mode;
1706 if (!(mode & (1 << 2)))
1707 switch (mode & 3) {
1708 case 0:
1709 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1710 break;
1711 case 1:
1712 set_float_rounding_mode(float_round_down, &env->sse_status);
1713 break;
1714 case 2:
1715 set_float_rounding_mode(float_round_up, &env->sse_status);
1716 break;
1717 case 3:
1718 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1719 break;
1720 }
1721
1722 d->Q(0) = float64_round_to_int(s->Q(0), &env->sse_status);
1723
1724#if 0 /* TODO */
1725 if (mode & (1 << 3))
1726 set_float_exception_flags(
1727 get_float_exception_flags(&env->sse_status) &
1728 ~float_flag_inexact,
1729 &env->sse_status);
1730#endif
1731 env->sse_status.float_rounding_mode = prev_rounding_mode;
1732}
1733
1734#define FBLENDP(d, s, m) m ? s : d
1735SSE_HELPER_I(helper_blendps, L, 4, FBLENDP)
1736SSE_HELPER_I(helper_blendpd, Q, 2, FBLENDP)
1737SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP)
1738
1739void glue(helper_dpps, SUFFIX) (Reg *d, Reg *s, uint32_t mask)
1740{
1741 float32 iresult = 0 /*float32_zero*/;
1742
1743 if (mask & (1 << 4))
1744 iresult = float32_add(iresult,
1745 float32_mul(d->L(0), s->L(0), &env->sse_status),
1746 &env->sse_status);
1747 if (mask & (1 << 5))
1748 iresult = float32_add(iresult,
1749 float32_mul(d->L(1), s->L(1), &env->sse_status),
1750 &env->sse_status);
1751 if (mask & (1 << 6))
1752 iresult = float32_add(iresult,
1753 float32_mul(d->L(2), s->L(2), &env->sse_status),
1754 &env->sse_status);
1755 if (mask & (1 << 7))
1756 iresult = float32_add(iresult,
1757 float32_mul(d->L(3), s->L(3), &env->sse_status),
1758 &env->sse_status);
1759 d->L(0) = (mask & (1 << 0)) ? iresult : 0 /*float32_zero*/;
1760 d->L(1) = (mask & (1 << 1)) ? iresult : 0 /*float32_zero*/;
1761 d->L(2) = (mask & (1 << 2)) ? iresult : 0 /*float32_zero*/;
1762 d->L(3) = (mask & (1 << 3)) ? iresult : 0 /*float32_zero*/;
1763}
1764
1765void glue(helper_dppd, SUFFIX) (Reg *d, Reg *s, uint32_t mask)
1766{
1767 float64 iresult = 0 /*float64_zero*/;
1768
1769 if (mask & (1 << 4))
1770 iresult = float64_add(iresult,
1771 float64_mul(d->Q(0), s->Q(0), &env->sse_status),
1772 &env->sse_status);
1773 if (mask & (1 << 5))
1774 iresult = float64_add(iresult,
1775 float64_mul(d->Q(1), s->Q(1), &env->sse_status),
1776 &env->sse_status);
1777 d->Q(0) = (mask & (1 << 0)) ? iresult : 0 /*float64_zero*/;
1778 d->Q(1) = (mask & (1 << 1)) ? iresult : 0 /*float64_zero*/;
1779}
1780
1781void glue(helper_mpsadbw, SUFFIX) (Reg *d, Reg *s, uint32_t offset)
1782{
1783 int s0 = (offset & 3) << 2;
1784 int d0 = (offset & 4) << 0;
1785 int i;
1786 Reg r;
1787
1788 for (i = 0; i < 8; i++, d0++) {
1789 r.W(i) = 0;
1790 r.W(i) += abs1(d->B(d0 + 0) - s->B(s0 + 0));
1791 r.W(i) += abs1(d->B(d0 + 1) - s->B(s0 + 1));
1792 r.W(i) += abs1(d->B(d0 + 2) - s->B(s0 + 2));
1793 r.W(i) += abs1(d->B(d0 + 3) - s->B(s0 + 3));
1794 }
1795
1796 *d = r;
1797}
1798
1799/* SSE4.2 op helpers */
1800/* it's unclear whether signed or unsigned */
1801#define FCMPGTQ(d, s) d > s ? -1 : 0
1802SSE_HELPER_Q(helper_pcmpgtq, FCMPGTQ)
1803
1804static inline int pcmp_elen(int reg, uint32_t ctrl)
1805{
1806 int val;
1807
1808 /* Presence of REX.W is indicated by a bit higher than 7 set */
1809 if (ctrl >> 8)
1810 val = abs1((int64_t) env->regs[reg]);
1811 else
1812 val = abs1((int32_t) env->regs[reg]);
1813
1814 if (ctrl & 1) {
1815 if (val > 8)
1816 return 8;
1817 } else
1818 if (val > 16)
1819 return 16;
1820
1821 return val;
1822}
1823
1824static inline int pcmp_ilen(Reg *r, uint8_t ctrl)
1825{
1826 int val = 0;
1827
1828 if (ctrl & 1) {
1829 while (val < 8 && r->W(val))
1830 val++;
1831 } else
1832 while (val < 16 && r->B(val))
1833 val++;
1834
1835 return val;
1836}
1837
1838static inline int pcmp_val(Reg *r, uint8_t ctrl, int i)
1839{
1840 switch ((ctrl >> 0) & 3) {
1841 case 0:
1842 return r->B(i);
1843 case 1:
1844 return r->W(i);
1845 case 2:
1846 return (int8_t) r->B(i);
1847 case 3:
1848 default:
1849 return (int16_t) r->W(i);
1850 }
1851}
1852
1853static inline unsigned pcmpxstrx(Reg *d, Reg *s,
1854 int8_t ctrl, int valids, int validd)
1855{
1856 unsigned int res = 0;
1857 int v;
1858 int j, i;
1859 int upper = (ctrl & 1) ? 7 : 15;
1860
1861 valids--;
1862 validd--;
1863
1864 CC_SRC = (valids < upper ? CC_Z : 0) | (validd < upper ? CC_S : 0);
1865
1866 switch ((ctrl >> 2) & 3) {
1867 case 0:
1868 for (j = valids; j >= 0; j--) {
1869 res <<= 1;
1870 v = pcmp_val(s, ctrl, j);
1871 for (i = validd; i >= 0; i--)
1872 res |= (v == pcmp_val(d, ctrl, i));
1873 }
1874 break;
1875 case 1:
1876 for (j = valids; j >= 0; j--) {
1877 res <<= 1;
1878 v = pcmp_val(s, ctrl, j);
1879 for (i = ((validd - 1) | 1); i >= 0; i -= 2)
1880 res |= (pcmp_val(d, ctrl, i - 0) <= v &&
1881 pcmp_val(d, ctrl, i - 1) >= v);
1882 }
1883 break;
1884 case 2:
1885 res = (2 << (upper - MAX(valids, validd))) - 1;
1886 res <<= MAX(valids, validd) - MIN(valids, validd);
1887 for (i = MIN(valids, validd); i >= 0; i--) {
1888 res <<= 1;
1889 v = pcmp_val(s, ctrl, i);
1890 res |= (v == pcmp_val(d, ctrl, i));
1891 }
1892 break;
1893 case 3:
1894 for (j = valids - validd; j >= 0; j--) {
1895 res <<= 1;
1896 res |= 1;
1897 for (i = MIN(upper - j, validd); i >= 0; i--)
1898 res &= (pcmp_val(s, ctrl, i + j) == pcmp_val(d, ctrl, i));
1899 }
1900 break;
1901 }
1902
1903 switch ((ctrl >> 4) & 3) {
1904 case 1:
1905 res ^= (2 << upper) - 1;
1906 break;
1907 case 3:
1908 res ^= (2 << valids) - 1;
1909 break;
1910 }
1911
1912 if (res)
1913 CC_SRC |= CC_C;
1914 if (res & 1)
1915 CC_SRC |= CC_O;
1916
1917 return res;
1918}
1919
1920static inline int rffs1(unsigned int val)
1921{
1922 int ret = 1, hi;
1923
1924 for (hi = sizeof(val) * 4; hi; hi /= 2)
1925 if (val >> hi) {
1926 val >>= hi;
1927 ret += hi;
1928 }
1929
1930 return ret;
1931}
1932
1933static inline int ffs1(unsigned int val)
1934{
1935 int ret = 1, hi;
1936
1937 for (hi = sizeof(val) * 4; hi; hi /= 2)
1938 if (val << hi) {
1939 val <<= hi;
1940 ret += hi;
1941 }
1942
1943 return ret;
1944}
1945
1946void glue(helper_pcmpestri, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1947{
1948 unsigned int res = pcmpxstrx(d, s, ctrl,
1949 pcmp_elen(R_EDX, ctrl),
1950 pcmp_elen(R_EAX, ctrl));
1951
1952 if (res)
1953 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
1954 else
1955 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
1956}
1957
1958void glue(helper_pcmpestrm, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1959{
1960 int i;
1961 unsigned int res = pcmpxstrx(d, s, ctrl,
1962 pcmp_elen(R_EDX, ctrl),
1963 pcmp_elen(R_EAX, ctrl));
1964
1965 if ((ctrl >> 6) & 1) {
1966 if (ctrl & 1)
1967 for (i = 0; i <= 8; i--, res >>= 1)
1968 d->W(i) = (res & 1) ? ~0 : 0;
1969 else
1970 for (i = 0; i <= 16; i--, res >>= 1)
1971 d->B(i) = (res & 1) ? ~0 : 0;
1972 } else {
1973 d->Q(1) = 0;
1974 d->Q(0) = res;
1975 }
1976}
1977
1978void glue(helper_pcmpistri, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1979{
1980 unsigned int res = pcmpxstrx(d, s, ctrl,
1981 pcmp_ilen(s, ctrl),
1982 pcmp_ilen(d, ctrl));
1983
1984 if (res)
1985 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1;
1986 else
1987 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
1988}
1989
1990void glue(helper_pcmpistrm, SUFFIX) (Reg *d, Reg *s, uint32_t ctrl)
1991{
1992 int i;
1993 unsigned int res = pcmpxstrx(d, s, ctrl,
1994 pcmp_ilen(s, ctrl),
1995 pcmp_ilen(d, ctrl));
1996
1997 if ((ctrl >> 6) & 1) {
1998 if (ctrl & 1)
1999 for (i = 0; i <= 8; i--, res >>= 1)
2000 d->W(i) = (res & 1) ? ~0 : 0;
2001 else
2002 for (i = 0; i <= 16; i--, res >>= 1)
2003 d->B(i) = (res & 1) ? ~0 : 0;
2004 } else {
2005 d->Q(1) = 0;
2006 d->Q(0) = res;
2007 }
2008}
2009
2010#define CRCPOLY 0x1edc6f41
2011#define CRCPOLY_BITREV 0x82f63b78
2012target_ulong helper_crc32(uint32_t crc1, target_ulong msg, uint32_t len)
2013{
2014 target_ulong crc = (msg & ((target_ulong) -1 >>
2015 (TARGET_LONG_BITS - len))) ^ crc1;
2016
2017 while (len--)
2018 crc = (crc >> 1) ^ ((crc & 1) ? CRCPOLY_BITREV : 0);
2019
2020 return crc;
2021}
2022
2023#define POPMASK(i) ((target_ulong) -1 / ((1LL << (1 << i)) + 1))
2024#define POPCOUNT(n, i) (n & POPMASK(i)) + ((n >> (1 << i)) & POPMASK(i))
2025target_ulong helper_popcnt(target_ulong n, uint32_t type)
2026{
2027 CC_SRC = n ? 0 : CC_Z;
2028
2029 n = POPCOUNT(n, 0);
2030 n = POPCOUNT(n, 1);
2031 n = POPCOUNT(n, 2);
2032 n = POPCOUNT(n, 3);
2033 if (type == 1)
2034 return n & 0xff;
2035
2036 n = POPCOUNT(n, 4);
2037#ifndef TARGET_X86_64
2038 return n;
2039#else
2040 if (type == 2)
2041 return n & 0xff;
2042
2043 return POPCOUNT(n, 5);
2044#endif
2045}
2046#endif
2047
2048#undef SHIFT
2049#undef XMM_ONLY
2050#undef Reg
2051#undef B
2052#undef W
2053#undef L
2054#undef Q
2055#undef SUFFIX
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette