Changeset 100041 in vbox for trunk/src/VBox/Main/src-client
- Timestamp:
- Jun 1, 2023 6:25:11 PM (21 months ago)
- svn:sync-xref-src-repo-rev:
- 157719
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Main/src-client/ConsoleImplConfigArmV8.cpp
r99944 r100041 34 34 35 35 #include "ConsoleImpl.h" 36 #include "ResourceStoreImpl.h" 36 37 #include "Global.h" 37 38 … … 45 46 #include <iprt/ctype.h> 46 47 #include <iprt/dir.h> 48 #include <iprt/fdt.h> 47 49 #include <iprt/file.h> 48 50 #include <iprt/param.h> … … 94 96 ComPtr<IMachine> pMachine = i_machine(); 95 97 96 int vrc;97 98 HRESULT hrc; 98 99 Utf8Str strTmp; 99 100 Bstr bstr; 100 101 101 #define H() AssertLogRelMsgReturn(!FAILED(hrc), ("hrc=%Rhrc\n", hrc), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR) 102 RTFDT hFdt = NIL_RTFDT; 103 int vrc = RTFdtCreateEmpty(&hFdt); 104 AssertRCReturn(vrc, vrc); 105 106 #define H() AssertLogRelMsgReturnStmt(!FAILED(hrc), ("hrc=%Rhrc\n", hrc), RTFdtDestroy(hFdt), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR) 107 #define VRC() AssertLogRelMsgReturnStmt(RT_SUCCESS(vrc), ("vrc=%Rrc\n", vrc), RTFdtDestroy(hFdt), vrc) 108 102 109 103 110 /* … … 159 166 InsertConfigInteger(pRoot, "TimerMillies", 10); 160 167 168 uint32_t idPHandleIntCtrl = RTFdtPHandleAllocate(hFdt); 169 Assert(idPHandleIntCtrl != UINT32_MAX); 170 uint32_t idPHandleIntCtrlMsi = RTFdtPHandleAllocate(hFdt); 171 Assert(idPHandleIntCtrlMsi != UINT32_MAX); 172 uint32_t idPHandleAbpPClk = RTFdtPHandleAllocate(hFdt); 173 Assert(idPHandleAbpPClk != UINT32_MAX); 174 uint32_t idPHandleGpio = RTFdtPHandleAllocate(hFdt); 175 Assert(idPHandleGpio != UINT32_MAX); 176 177 uint32_t aidPHandleCpus[VMM_MAX_CPU_COUNT]; 178 for (uint32_t i = 0; i < cCpus; i++) 179 { 180 aidPHandleCpus[i] = RTFdtPHandleAllocate(hFdt); 181 Assert(aidPHandleCpus[i] != UINT32_MAX); 182 } 183 184 vrc = RTFdtNodePropertyAddU32( hFdt, "interrupt-parent", idPHandleIntCtrl); VRC(); 185 vrc = RTFdtNodePropertyAddString(hFdt, "model", "linux,dummy-virt"); VRC(); 186 vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC(); 187 vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 2); VRC(); 188 vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "linux,dummy-virt"); VRC(); 189 190 /* Configure the Power State Coordination Interface. */ 191 vrc = RTFdtNodeAdd(hFdt, "psci"); VRC(); 192 vrc = RTFdtNodePropertyAddU32( hFdt, "migrate", 0x84000005); VRC(); 193 vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_on", 0x84000003); VRC(); 194 vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_off", 0x84000002); VRC(); 195 vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_suspend", 0x84000001); VRC(); 196 vrc = RTFdtNodePropertyAddString(hFdt, "method", "hvc"); VRC(); 197 vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 3, 198 "arm,psci-1.0", "arm,psci-0.2", "arm,psci"); VRC(); 199 vrc = RTFdtNodeFinalize(hFdt); VRC(); 200 201 /* Configure some misc system wide properties. */ 202 vrc = RTFdtNodeAdd(hFdt, "chosen"); VRC(); 203 vrc = RTFdtNodePropertyAddString(hFdt, "stdout-path", "/pl011@9000000"); VRC(); 204 vrc = RTFdtNodeFinalize(hFdt); 205 206 /* Configure the timer and clock. */ 207 vrc = RTFdtNodeAdd(hFdt, "timer"); VRC(); 208 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 12, 209 0x01, 0x0d, 0x104, 210 0x01, 0x0e, 0x104, 211 0x01, 0x0b, 0x104, 212 0x01, 0x0a, 0x104); VRC(); 213 vrc = RTFdtNodePropertyAddEmpty( hFdt, "always-on"); VRC(); 214 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,armv7-timer"); VRC(); 215 vrc = RTFdtNodeFinalize(hFdt); 216 217 vrc = RTFdtNodeAdd(hFdt, "apb-clk"); VRC(); 218 vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleAbpPClk); VRC(); 219 vrc = RTFdtNodePropertyAddString( hFdt, "clock-output-names", "clk24mhz"); VRC(); 220 vrc = RTFdtNodePropertyAddU32( hFdt, "clock-frequency", 24 * 1000 * 1000); VRC(); 221 vrc = RTFdtNodePropertyAddU32( hFdt, "#clock-cells", 0); VRC(); 222 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "fixed-clock"); VRC(); 223 vrc = RTFdtNodeFinalize(hFdt); 224 225 /* Configure gpio keys (non functional at the moment). */ 226 vrc = RTFdtNodeAdd(hFdt, "gpio-keys"); VRC(); 227 vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "gpio-keys"); VRC(); 228 229 vrc = RTFdtNodeAdd(hFdt, "poweroff"); VRC(); 230 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "gpios", 3, idPHandleGpio, 3, 0); VRC(); 231 vrc = RTFdtNodePropertyAddU32( hFdt, "linux,code", 0x74); VRC(); 232 vrc = RTFdtNodePropertyAddString( hFdt, "label", "GPIO Key Poweroff"); VRC(); 233 vrc = RTFdtNodeFinalize(hFdt); VRC(); 234 235 vrc = RTFdtNodeFinalize(hFdt); VRC(); 236 161 237 /* 162 238 * NEM … … 181 257 InsertConfigInteger(pMemRegion, "GCPhysStart", 0x40000000); 182 258 InsertConfigInteger(pMemRegion, "Size", cbRam); 259 260 vrc = RTFdtNodeAddF(hFdt, "memory@%RX32", 0x40000000); VRC(); 261 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 4, 262 0, 0x40000000, 263 (uint32_t)(cbRam >> 32), cbRam & UINT32_MAX); VRC(); 264 vrc = RTFdtNodePropertyAddString( hFdt, "device_type", "memory"); VRC(); 265 vrc = RTFdtNodeFinalize(hFdt); VRC(); 266 267 /* Configure the CPUs in the system, only one socket and cluster at the moment. */ 268 vrc = RTFdtNodeAdd(hFdt, "cpus"); VRC(); 269 vrc = RTFdtNodePropertyAddU32(hFdt, "#size-cells", 0); VRC(); 270 vrc = RTFdtNodePropertyAddU32(hFdt, "#address-cells", 1); VRC(); 271 272 vrc = RTFdtNodeAdd(hFdt, "socket0"); VRC(); 273 vrc = RTFdtNodeAdd(hFdt, "cluster0"); VRC(); 274 275 for (uint32_t i = 0; i < cCpus; i++) 276 { 277 vrc = RTFdtNodeAddF(hFdt, "core%u", i); VRC(); 278 vrc = RTFdtNodePropertyAddU32(hFdt, "cpu", aidPHandleCpus[i]); VRC(); 279 vrc = RTFdtNodeFinalize(hFdt); VRC(); 280 } 281 282 vrc = RTFdtNodeFinalize(hFdt); VRC(); 283 vrc = RTFdtNodeFinalize(hFdt); VRC(); 284 285 for (uint32_t i = 0; i < cCpus; i++) 286 { 287 vrc = RTFdtNodeAddF(hFdt, "cpu@%u", i); VRC(); 288 vrc = RTFdtNodePropertyAddU32(hFdt, "phandle", aidPHandleCpus[i]); VRC(); 289 vrc = RTFdtNodePropertyAddU32(hFdt, "reg", 0); VRC(); 290 vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "arm,cortex-a15"); VRC(); 291 vrc = RTFdtNodePropertyAddString(hFdt, "device_type", "cpu"); VRC(); 292 vrc = RTFdtNodeFinalize(hFdt); VRC(); 293 } 294 295 vrc = RTFdtNodeFinalize(hFdt); VRC(); 296 183 297 184 298 /* … … 287 401 InsertConfigInteger(pCfg, "GCPhysLoadAddress", 0); 288 402 InsertConfigString(pCfg, "EfiRom", "VBoxEFIAArch64.fd"); 403 InsertConfigInteger(pCfg, "GCPhysFdtAddress", 0x40000000); 404 InsertConfigString(pCfg, "FdtId", "fdt"); 405 InsertConfigNode(pInst, "LUN#0", &pLunL0); 406 InsertConfigString(pLunL0, "Driver", "ResourceStore"); 407 408 vrc = RTFdtNodeAddF(hFdt, "platform-bus@%RX32", 0x0c000000); VRC(); 409 vrc = RTFdtNodePropertyAddU32( hFdt, "interrupt-parent", idPHandleIntCtrl); VRC(); 410 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "ranges", 4, 0, 0, 0x0c000000, 0x02000000); VRC(); 411 vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 1); VRC(); 412 vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 1); VRC(); 413 vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2, 414 "qemu,platform", "simple-bus"); VRC(); 415 vrc = RTFdtNodeFinalize(hFdt); VRC(); 289 416 290 417 InsertConfigNode(pDevices, "gic", &pDev); … … 294 421 InsertConfigInteger(pCfg, "DistributorMmioBase", 0x08000000); 295 422 InsertConfigInteger(pCfg, "RedistributorMmioBase", 0x080a0000); 423 424 vrc = RTFdtNodeAddF(hFdt, "intc@%RX32", 0x08000000); VRC(); 425 vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleIntCtrl); VRC(); 426 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 8, 427 0, 0x08000000, 0, 0x10000, 428 0, 0x080a0000, 0, 0xf60000); VRC(); 429 vrc = RTFdtNodePropertyAddU32( hFdt, "#redistributor-regions", 1); VRC(); 430 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,gic-v3"); VRC(); 431 vrc = RTFdtNodePropertyAddEmpty( hFdt, "ranges"); VRC(); 432 vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC(); 433 vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 2); VRC(); 434 vrc = RTFdtNodePropertyAddEmpty( hFdt, "interrupt-controller"); VRC(); 435 vrc = RTFdtNodePropertyAddU32( hFdt, "#interrupt-cells", 3); VRC(); 436 437 #if 0 438 vrc = RTFdtNodeAddF(hFdt, "its@%RX32", 0x08080000); VRC(); 439 vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleIntCtrlMsi); VRC(); 440 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 4, 0, 0x08080000, 0, 0x20000); VRC(); 441 vrc = RTFdtNodePropertyAddU32( hFdt, "#msi-cells", 1); VRC(); 442 vrc = RTFdtNodePropertyAddEmpty( hFdt, "msi-controller"); VRC(); 443 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,gic-v3-its"); VRC(); 444 vrc = RTFdtNodeFinalize(hFdt); VRC(); 445 #endif 446 447 vrc = RTFdtNodeFinalize(hFdt); VRC(); 296 448 297 449 … … 306 458 InsertConfigString(pLunL0, "Driver", "MainDisplay"); 307 459 460 vrc = RTFdtNodeAddF(hFdt, "fw-cfg@%RX32", 0x09020000); VRC(); 461 vrc = RTFdtNodePropertyAddEmpty( hFdt, "dma-coherent"); VRC(); 462 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 4, 0, 0x09020000, 0, 0x18); VRC(); 463 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "qemu,fw-cfg-mmio"); VRC(); 464 vrc = RTFdtNodeFinalize(hFdt); VRC(); 465 466 308 467 InsertConfigNode(pDevices, "flash-cfi", &pDev); 309 468 InsertConfigNode(pDev, "0", &pInst); … … 315 474 InsertConfigNode(pInst, "LUN#0", &pLunL0); 316 475 InsertConfigString(pLunL0, "Driver", "NvramStore"); 476 477 vrc = RTFdtNodeAddF(hFdt, "flash@%RX32", 0); VRC(); 478 vrc = RTFdtNodePropertyAddU32( hFdt, "bank-width", 4); VRC(); 479 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 8, 480 0, 0, 0, 0x04000000, 481 0, 0x04000000, 0, 0x04000000); VRC(); 482 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "cfi-flash"); VRC(); 483 vrc = RTFdtNodeFinalize(hFdt); VRC(); 317 484 318 485 InsertConfigNode(pDevices, "arm-pl011", &pDev); … … 355 522 } 356 523 524 vrc = RTFdtNodeAddF(hFdt, "pl011@%RX32", 0x09000000); VRC(); 525 vrc = RTFdtNodePropertyAddStringList(hFdt, "clock-names", 2, "uartclk", "apb_pclk"); VRC(); 526 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "clocks", 2, 527 idPHandleAbpPClk, idPHandleAbpPClk); VRC(); 528 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, 0x01, 0x04); VRC(); 529 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 4, 0, 0x09000000, 0, 0x1000); VRC(); 530 vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2, 531 "arm,pl011", "arm,primecell"); VRC(); 532 vrc = RTFdtNodeFinalize(hFdt); VRC(); 533 357 534 InsertConfigNode(pDevices, "arm-pl031-rtc", &pDev); 358 535 InsertConfigNode(pDev, "0", &pInst); … … 360 537 InsertConfigInteger(pCfg, "Irq", 2); 361 538 InsertConfigInteger(pCfg, "MmioBase", 0x09010000); 539 vrc = RTFdtNodeAddF(hFdt, "pl032@%RX32", 0x09010000); VRC(); 540 vrc = RTFdtNodePropertyAddString( hFdt, "clock-names", "apb_pclk"); VRC(); 541 vrc = RTFdtNodePropertyAddU32( hFdt, "clocks", idPHandleAbpPClk); VRC(); 542 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, 0x02, 0x04); VRC(); 543 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 4, 0, 0x09010000, 0, 0x1000); VRC(); 544 vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2, 545 "arm,pl031", "arm,primecell"); VRC(); 546 vrc = RTFdtNodeFinalize(hFdt); VRC(); 362 547 363 548 InsertConfigNode(pDevices, "arm-pl061-gpio",&pDev); … … 366 551 InsertConfigInteger(pCfg, "Irq", 7); 367 552 InsertConfigInteger(pCfg, "MmioBase", 0x09030000); 553 vrc = RTFdtNodeAddF(hFdt, "pl061@%RX32", 0x09030000); VRC(); 554 vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleGpio); VRC(); 555 vrc = RTFdtNodePropertyAddString( hFdt, "clock-names", "apb_pclk"); VRC(); 556 vrc = RTFdtNodePropertyAddU32( hFdt, "clocks", idPHandleAbpPClk); VRC(); 557 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, 0x07, 0x04); VRC(); 558 vrc = RTFdtNodePropertyAddEmpty( hFdt, "gpio-controller"); VRC(); 559 vrc = RTFdtNodePropertyAddU32( hFdt, "#gpio-cells", 2); VRC(); 560 vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2, 561 "arm,pl061", "arm,primecell"); VRC(); 562 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 4, 0, 0x09030000, 0, 0x1000); VRC(); 563 vrc = RTFdtNodeFinalize(hFdt); VRC(); 368 564 369 565 InsertConfigNode(pDevices, "pci-generic-ecam", &pDev); … … 378 574 InsertConfigInteger(pCfg, "IntPinC", 5); 379 575 InsertConfigInteger(pCfg, "IntPinD", 6); 576 vrc = RTFdtNodeAddF(hFdt, "pcie@%RX32", 0x10000000); VRC(); 577 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupt-map-mask", 4, 0x1800, 0, 0, 7); VRC(); 578 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupt-map", 16 * 10, 579 0x00, 0x00, 0x00, 0x01, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x03, 0x04, 580 0x00, 0x00, 0x00, 0x02, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x04, 0x04, 581 0x00, 0x00, 0x00, 0x03, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x05, 0x04, 582 0x00, 0x00, 0x00, 0x04, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x06, 0x04, 583 0x800, 0x00, 0x00, 0x01, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x04, 0x04, 584 0x800, 0x00, 0x00, 0x02, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x05, 0x04, 585 0x800, 0x00, 0x00, 0x03, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x06, 0x04, 586 0x800, 0x00, 0x00, 0x04, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x03, 0x04, 587 0x1000, 0x00, 0x00, 0x01, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x05, 0x04, 588 0x1000, 0x00, 0x00, 0x02, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x06, 0x04, 589 0x1000, 0x00, 0x00, 0x03, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x03, 0x04, 590 0x1000, 0x00, 0x00, 0x04, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x04, 0x04, 591 0x1800, 0x00, 0x00, 0x01, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x06, 0x04, 592 0x1800, 0x00, 0x00, 0x02, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x03, 0x04, 593 0x1800, 0x00, 0x00, 0x03, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x04, 0x04, 594 0x1800, 0x00, 0x00, 0x04, idPHandleIntCtrl, 0x00, 0x00, 0x00, 0x05, 0x04); VRC(); 595 vrc = RTFdtNodePropertyAddU32( hFdt, "#interrupt-cells", 1); VRC(); 596 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "ranges", 14, 597 0x1000000, 0, 0, 0, 0x3eff0000, 0, 0x10000, 598 0x2000000, 0, 0x10000000, 0, 0x10000000, 0, 599 0x2eff0000); VRC(); 600 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 4, 0, 0x3f000000, 0, 0x1000000); VRC(); 601 /** @todo msi-map */ 602 vrc = RTFdtNodePropertyAddEmpty( hFdt, "dma-coherent"); VRC(); 603 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "bus-range", 2, 0, 0xf); VRC(); 604 vrc = RTFdtNodePropertyAddU32( hFdt, "linux,pci-domain", 0); VRC(); 605 vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC(); 606 vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 3); VRC(); 607 vrc = RTFdtNodePropertyAddString( hFdt, "device_type", "pci"); VRC(); 608 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "pci-host-ecam-generic"); VRC(); 609 vrc = RTFdtNodeFinalize(hFdt); VRC(); 380 610 381 611 InsertConfigNode(pDevices, "usb-xhci", &pDev); … … 642 872 catch (ConfigError &x) 643 873 { 874 RTFdtDestroy(hFdt); 875 644 876 // InsertConfig threw something: 645 877 pVMM->pfnVMR3SetError(pUVM, x.m_vrc, RT_SRC_POS, "Caught ConfigError: %Rrc - %s", x.m_vrc, x.what()); … … 648 880 catch (HRESULT hrcXcpt) 649 881 { 882 RTFdtDestroy(hFdt); 650 883 AssertLogRelMsgFailedReturn(("hrc=%Rhrc\n", hrcXcpt), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR); 651 884 } … … 663 896 #endif 664 897 898 /* Finalize the FDT and add it to the resource store. */ 899 vrc = RTFdtFinalize(hFdt); 900 AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc); 901 902 RTVFSFILE hVfsFileFdt = NIL_RTVFSFILE; 903 vrc = RTVfsMemFileCreate(NIL_RTVFSIOSTREAM, 0 /*cbEstimate*/, &hVfsFileFdt); 904 AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc); 905 RTVFSIOSTREAM hVfsIosFdt = RTVfsFileToIoStream(hVfsFileFdt); 906 AssertRelease(hVfsIosFdt != NIL_RTVFSIOSTREAM); 907 908 vrc = RTFdtDumpToVfsIoStrm(hFdt, RTFDTTYPE_DTB, 0 /*fFlags*/, hVfsIosFdt, NULL /*pErrInfo*/); 909 RTVfsIoStrmRelease(hVfsIosFdt); 910 if (RT_SUCCESS(vrc)) 911 vrc = mptrResourceStore->i_addItem("fdt", "fdt", hVfsFileFdt); 912 RTVfsFileRelease(hVfsFileFdt); 913 AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc); 914 915 /* Dump the DTB for debugging purposes if requested. */ 916 Bstr DtbDumpVal; 917 hrc = mMachine->GetExtraData(Bstr("VBoxInternal2/DumpDtb").raw(), 918 DtbDumpVal.asOutParam()); 919 if ( hrc == S_OK 920 && DtbDumpVal.isNotEmpty()) 921 { 922 vrc = RTFdtDumpToFile(hFdt, RTFDTTYPE_DTB, 0 /*fFlags*/, Utf8Str(DtbDumpVal).c_str(), NULL /*pErrInfo*/); 923 AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc); 924 } 925 926 665 927 /* 666 928 * Apply the CFGM overlay.
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