Changeset 100076 in vbox for trunk/src/VBox/VMM/VMMR3

Timestamp:

Jun 5, 2023 4:41:14 PM (20 months ago)

Author:

vboxsync

Message:

VMM/NEMR3Native-darwin-armv8: Fix setting the vTimer offset, this requires using mach_absolute_time() instead of reading the CNTVCT_EL0 directly or the guest will read an underflowed counter value programming the timer completely wrong leading to stalls without any interrupt source, bugref:10390

File:

• trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin-armv8.cpp (modified) (5 diffs)

trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin-armv8.cpp

@@ -640 +640 @@
                           "Call to hv_vcpu_create failed on vCPU %u: %#x (%Rrc)", idCpu, hrc, nemR3DarwinHvSts2Rc(hrc));
 
-    /* Set the vTiemr offset so all vCpus start at (nearly) 0. */
-    pVCpu->nem.s.u64VTimerOff = ASMReadTSC();
-
-    hrc = hv_vcpu_set_vtimer_offset(pVCpu->nem.s.hVCpu, pVCpu->nem.s.u64VTimerOff);
-    AssertLogRelMsg(hrc == HV_SUCCESS, ("vCPU#%u: Failed to set vTimer offset to %#RX64 -> hrc = %#x\n",
-                                        pVCpu->idCpu, pVCpu->nem.s.u64VTimerOff, hrc));
+    /* Will be initialized in NEMHCResumeCpuTickOnAll() before executing guest code. */
+    pVCpu->nem.s.u64VTimerOff = 0;
 
     if (idCpu == 0)
@@ -1064 +1060 @@
                     return VINF_SUCCESS;
 
+                LogFlowFunc(("Set vTimer activation to cNanoSecsVTimerToExpire=%#RX64 (CntvCValEl0=%#RX64, u64VTimerOff=%#RX64 cTicksVTimer=%#RX64 u64CntFrqHz=%#RX64)\n",
+                             cNanoSecsVTimerToExpire, pVCpu->cpum.GstCtx.CntvCValEl0, pVCpu->nem.s.u64VTimerOff, cTicksVTimer, pVM->nem.s.u64CntFrqHz));
                 TMCpuSetVTimerNextActivation(pVCpu, cNanoSecsVTimerToExpire);
             }
@@ -1246 +1244 @@
          * the new offset to let the guest not notice the pause.
          */
-        uint64_t u64TscNew = ASMReadTSC() - pVCpu->nem.s.u64VTimerOff;
+        uint64_t u64TscNew = mach_absolute_time() - pVCpu->nem.s.u64VTimerOff;
         Assert(u64TscNew >= pVM->nem.s.u64VTimerValuePaused);
+        LogFlowFunc(("u64VTimerOffOld=%#RX64 u64TscNew=%#RX64 u64VTimerValuePaused=%#RX64 -> u64VTimerOff=%#RX64\n",
+                     pVCpu->nem.s.u64VTimerOff, u64TscNew, pVM->nem.s.u64VTimerValuePaused,
+                     pVCpu->nem.s.u64VTimerOff + (u64TscNew - pVM->nem.s.u64VTimerValuePaused)));
+
         pVCpu->nem.s.u64VTimerOff += u64TscNew - pVM->nem.s.u64VTimerValuePaused;
         hv_return_t hrc = hv_vcpu_set_vtimer_offset(pVCpu->nem.s.hVCpu, pVCpu->nem.s.u64VTimerOff);
@@ -1737 +1739 @@
     if (puAux)
         *puAux = 0;
-    *pcTicks = ASMReadTSC() - pVCpu->nem.s.u64VTimerOff; /* This is the host timer minus the offset. */
+    *pcTicks = mach_absolute_time() - pVCpu->nem.s.u64VTimerOff; /* This is the host timer minus the offset. */
     return VINF_SUCCESS;
 }
@@ -1754 +1756 @@
 VMM_INT_DECL(int) NEMHCResumeCpuTickOnAll(PVMCC pVM, PVMCPUCC pVCpu, uint64_t uPausedTscValue)
 {
-    LogFlowFunc(("pVM=%p pVCpu=%p uPausedTscValue=%RX64\n", pVCpu, uPausedTscValue));
+    LogFlowFunc(("pVM=%p pVCpu=%p uPausedTscValue=%RX64\n", pVM, pVCpu, uPausedTscValue));
     VMCPU_ASSERT_EMT_RETURN(pVCpu, VERR_VM_THREAD_NOT_EMT);
     AssertReturn(VM_IS_NEM_ENABLED(pVM), VERR_NEM_IPE_9);