VirtualBox

Changeset 1001 in vbox for trunk/src


Ignore:
Timestamp:
Feb 20, 2007 2:14:49 PM (18 years ago)
Author:
vboxsync
Message:

Merged in ​http://linserv/vbox/changeset?old_path=trunk%2Fsrc%2Frecompiler&old=17094&new_path=trunk%2Fsrc%2Frecompiler&new=18834. (hope it still works)

Location:
trunk/src/recompiler/new
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/recompiler/new/VBoxREM.def

    r1 r1001  
    3838    REMR3ReplayHandlerNotifications
    3939    REMR3NotifyPhysRamRegister
     40    REMR3NotifyPhysRamChunkRegister
    4041    REMR3NotifyPhysReserve
    4142    REMR3NotifyPhysRomRegister

  • trunk/src/recompiler/new/VBoxRecompiler.c

    r980 r1001  
    13671367void remR3SetPage(CPUState *env, CPUTLBEntry *pRead,  CPUTLBEntry *pWrite, int prot, int is_user)
    13681368{
    1369     target_ulong phys_addr, virt_addr, addend;
     1369#ifndef PGM_DYNAMIC_RAM_ALLOC
     1370    target_ulong phys_addr;
     1371#endif
     1372    target_ulong virt_addr, addend;
    13701373    if (env->pVM->rem.s.fIgnoreSetPage || env->pVM->rem.s.fIgnoreAll)
    13711374        return;
    13721375    Assert(env->pVM->rem.s.fInREM || env->pVM->rem.s.fInStateSync);
    13731376
     1377#ifndef PGM_DYNAMIC_RAM_ALLOC
    13741378    if(!is_user && !(env->state & CPU_RAW_RING0))
    13751379    {
    … …  
    14141418    Log2(("tlb_set_page_raw read (%x-%x) write (%x-%x) prot %x is_user %d phys base %x\n",
    14151419          pRead->addr_read, pRead->addend, pWrite->addr_write, pWrite->addend, prot, is_user, phys_ram_base));
     1420#else /* PGM_DYNAMIC_RAM_ALLOC */
     1421    Log2(("tlb_set_page_raw read (%x-%x) write (%x-%x) prot %x is_user %d phys\n",
     1422          pRead->addr_read, pRead->addend, pWrite->addr_write, pWrite->addend, prot, is_user));
     1423#endif/* PGM_DYNAMIC_RAM_ALLOC */
    14161424
    14171425    if (prot & PAGE_WRITE)
    … …  
    14321440    }
    14331441
     1442#ifndef PGM_DYNAMIC_RAM_ALLOC
    14341443    if (!(addend & IO_MEM_ROM))
    14351444    {
    … …  
    14411450        phys_addr = addend; //@todo: correct??
    14421451    }
     1452#endif /* !PGM_DYNAMIC_RAM_ALLOC */
    14431453
    14441454    // Clear IO_* flags (TODO: are they actually useful for us??)
    … …  
    14591469    if (VBOX_FAILURE(rc))
    14601470    {
     1471#ifdef PGM_DYNAMIC_RAM_ALLOC
     1472        AssertMsgFailed(("RAWEx_SetPageEntry %x %x %d failed!!\n", virt_addr, prot, is_user));
     1473#else
    14611474        AssertMsgFailed(("RAWEx_SetPageEntry %x %x %x %d failed!!\n", virt_addr, phys_addr, prot, is_user));
     1475#endif
    14621476        VM_FF_SET(env->pVM, VM_FF_PGM_SYNC_CR3);
    14631477    }
    … …  
    16751689REMR3DECL(int) REMR3State(PVM pVM)
    16761690{
    1677     Assert(!pVM->rem.s.fInREM);
    16781691    Log2(("REMR3State:\n"));
    16791692    STAM_PROFILE_START(&pVM->rem.s.StatsState, a);
    … …  
    16811694    register unsigned fFlags;
    16821695
     1696    Assert(!pVM->rem.s.fInREM);
    16831697    pVM->rem.s.fInStateSync = true;
    16841698
    … …  
    25882602 * @param   GCPhys      The physical address the RAM.
    25892603 * @param   cb          Size of the memory.
     2604 * @param   pvRam       The HC address of the RAM.
    25902605 * @param   fFlags      Flags of the MM_RAM_FLAGS_* defines.
    2591  * @param   pvRam       The HC address of the RAM.
    25922606 */
    25932607REMR3DECL(void) REMR3NotifyPhysRamRegister(PVM pVM, RTGCPHYS GCPhys, RTUINT cb, void *pvRam, unsigned fFlags)
    … …  
    25992613     * Validate input - we trust the caller.
    26002614     */
    2601     Assert(pvRam);
     2615    Assert(!GCPhys || pvRam);
    26022616    Assert(RT_ALIGN_P(pvRam, PAGE_SIZE) == pvRam);
    26032617    Assert(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys);
    … …  
    26102624    if (!GCPhys)
    26112625    {
     2626#ifndef PGM_DYNAMIC_RAM_ALLOC
    26122627        AssertRelease(!phys_ram_base);
     2628        phys_ram_base = pvRam;
     2629#endif
    26132630        phys_ram_size = cb;
    2614         phys_ram_base = pvRam;
    26152631        phys_ram_dirty_size = cb >> PAGE_SHIFT;
    26162632#ifndef VBOX_STRICT
    … …  
    26342650    pVM->rem.s.fIgnoreAll = true;
    26352651
     2652#ifdef PGM_DYNAMIC_RAM_ALLOC
     2653    if (!GCPhys)
     2654        cpu_register_physical_memory(GCPhys, cb, GCPhys | IO_MEM_RAM_MISSING);
     2655    else
     2656    {
     2657        uint32_t i;
     2658
     2659        cpu_register_physical_memory(GCPhys, cb, GCPhys | (fFlags & MM_RAM_FLAGS_RESERVED ? IO_MEM_UNASSIGNED : 0));
     2660
     2661        AssertRelease(pVM->rem.s.cPhysRegistrations < REM_MAX_PHYS_REGISTRATIONS);
     2662        for (i = 0; i < pVM->rem.s.cPhysRegistrations; i++)
     2663        {
     2664            if (pVM->rem.s.aPhysReg[i].GCPhys == GCPhys)
     2665            {
     2666                pVM->rem.s.aPhysReg[i].HCVirt = (RTHCUINTPTR)pvRam;
     2667                pVM->rem.s.aPhysReg[i].cb     = cb;
     2668                break;
     2669            }
     2670        }
     2671        if (i == pVM->rem.s.cPhysRegistrations)
     2672        {
     2673            pVM->rem.s.aPhysReg[i].GCPhys = GCPhys;
     2674            pVM->rem.s.aPhysReg[i].HCVirt = (RTHCUINTPTR)pvRam;
     2675            pVM->rem.s.aPhysReg[i].cb     = cb;
     2676            pVM->rem.s.cPhysRegistrations++;
     2677        }
     2678    }
     2679#else
    26362680    AssertRelease(phys_ram_base);
    26372681    cpu_register_physical_memory(GCPhys, cb, ((uintptr_t)pvRam - (uintptr_t)phys_ram_base)
    26382682                                             | (fFlags & MM_RAM_FLAGS_RESERVED ? IO_MEM_UNASSIGNED : 0));
     2683#endif
    26392684    Assert(pVM->rem.s.fIgnoreAll);
    26402685    pVM->rem.s.fIgnoreAll = false;
    26412686}
     2687
     2688
     2689/**
     2690 * Notification about a successful PGMR3PhysRegisterChunk() call.
     2691 *
     2692 * @param   pVM         VM handle.
     2693 * @param   GCPhys      The physical address the RAM.
     2694 * @param   cb          Size of the memory.
     2695 * @param   pvRam       The HC address of the RAM.
     2696 * @param   fFlags      Flags of the MM_RAM_FLAGS_* defines.
     2697 */
     2698REMR3DECL(void) REMR3NotifyPhysRamChunkRegister(PVM pVM, RTGCPHYS GCPhys, RTUINT cb, RTHCUINTPTR pvRam, unsigned fFlags)
     2699{
     2700#ifdef PGM_DYNAMIC_RAM_ALLOC
     2701    uint32_t idx;
     2702
     2703    Log(("REMR3NotifyPhysRamChunkRegister: GCPhys=%VGp cb=%d pvRam=%p fFlags=%d\n", GCPhys, cb, pvRam, fFlags));
     2704    VM_ASSERT_EMT(pVM);
     2705
     2706    /*
     2707     * Validate input - we trust the caller.
     2708     */
     2709    Assert(pvRam);
     2710    Assert(RT_ALIGN(pvRam, PAGE_SIZE) == pvRam);
     2711    Assert(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys);
     2712    Assert(cb == PGM_DYNAMIC_CHUNK_SIZE);
     2713    Assert(fFlags == 0 /* normal RAM */);
     2714
     2715    if (!pVM->rem.s.paHCVirtToGCPhys)
     2716    {
     2717        uint32_t size = (_4G >> PGM_DYNAMIC_CHUNK_SHIFT) * sizeof(REMCHUNKINFO);
     2718
     2719        Assert(phys_ram_size);
     2720
     2721        pVM->rem.s.paHCVirtToGCPhys = (PREMCHUNKINFO)MMR3HeapAllocZ(pVM, MM_TAG_REM, size);
     2722        pVM->rem.s.paGCPhysToHCVirt = (RTHCPTR)MMR3HeapAllocZ(pVM, MM_TAG_REM, (phys_ram_size >> PGM_DYNAMIC_CHUNK_SHIFT)*sizeof(RTHCPTR));
     2723    }
     2724    pVM->rem.s.paGCPhysToHCVirt[GCPhys >> PGM_DYNAMIC_CHUNK_SHIFT] = pvRam;
     2725
     2726    idx = (pvRam >> PGM_DYNAMIC_CHUNK_SHIFT);
     2727    if (!pVM->rem.s.paHCVirtToGCPhys[idx].pChunk1)
     2728    {
     2729        pVM->rem.s.paHCVirtToGCPhys[idx].pChunk1 = pvRam;
     2730        pVM->rem.s.paHCVirtToGCPhys[idx].GCPhys1 = GCPhys;
     2731    }
     2732    else
     2733    {
     2734        Assert(!pVM->rem.s.paHCVirtToGCPhys[idx].pChunk2);
     2735        pVM->rem.s.paHCVirtToGCPhys[idx].pChunk2 = pvRam;
     2736        pVM->rem.s.paHCVirtToGCPhys[idx].GCPhys2 = GCPhys;
     2737    }
     2738    /* Does the region spawn two chunks? */
     2739    if (pvRam & PGM_DYNAMIC_CHUNK_OFFSET_MASK)
     2740    {
     2741        if (!pVM->rem.s.paHCVirtToGCPhys[idx+1].pChunk1)
     2742        {
     2743            pVM->rem.s.paHCVirtToGCPhys[idx+1].pChunk1 = pvRam;
     2744            pVM->rem.s.paHCVirtToGCPhys[idx+1].GCPhys1 = GCPhys;
     2745        }
     2746        else
     2747        {
     2748            Assert(!pVM->rem.s.paHCVirtToGCPhys[idx+1].pChunk2);
     2749            pVM->rem.s.paHCVirtToGCPhys[idx+1].pChunk2 = pvRam;
     2750            pVM->rem.s.paHCVirtToGCPhys[idx+1].GCPhys2 = GCPhys;
     2751        }
     2752    }
     2753
     2754    Assert(!pVM->rem.s.fIgnoreAll);
     2755    pVM->rem.s.fIgnoreAll = true;
     2756
     2757    cpu_register_physical_memory(GCPhys, cb, GCPhys);
     2758
     2759    Assert(pVM->rem.s.fIgnoreAll);
     2760    pVM->rem.s.fIgnoreAll = false;
     2761
     2762#else
     2763    AssertReleaseFailed();
     2764#endif
     2765}
     2766
     2767
     2768#ifdef PGM_DYNAMIC_RAM_ALLOC
     2769/**
     2770 *  Convert GC physical address to HC virt
     2771 *
     2772 * @returns The HC virt address corresponding to addr.
     2773 * @param   env         The cpu environment.
     2774 * @param   addr        The physical address.
     2775 */
     2776void *remR3GCPhys2HCVirt(void *env, target_ulong addr)
     2777{
     2778    PVM      pVM = ((CPUState *)env)->pVM;
     2779    uint32_t i;
     2780
     2781    /* lookup in pVM->rem.s.aPhysReg array first (for ROM range(s) inside the guest's RAM) */
     2782    for (i = 0; i < pVM->rem.s.cPhysRegistrations; i++)
     2783    {
     2784        uint32_t off = addr - pVM->rem.s.aPhysReg[i].GCPhys;
     2785        if (off < pVM->rem.s.aPhysReg[i].cb)
     2786        {
     2787            Log(("remR3GCPhys2HCVirt: %x -> %x\n", addr, pVM->rem.s.aPhysReg[i].HCVirt + off));
     2788            return (void *)(pVM->rem.s.aPhysReg[i].HCVirt + off);
     2789        }
     2790    }
     2791    AssertMsg(addr < phys_ram_size, ("remR3GCPhys2HCVirt: unknown physical address %x\n", addr));
     2792    Log(("remR3GCPhys2HCVirt: %x -> %x\n", addr, pVM->rem.s.paGCPhysToHCVirt[addr >> PGM_DYNAMIC_CHUNK_SHIFT] + (addr & PGM_DYNAMIC_CHUNK_OFFSET_MASK)));
     2793    return (void *)(pVM->rem.s.paGCPhysToHCVirt[addr >> PGM_DYNAMIC_CHUNK_SHIFT] + (addr & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
     2794}
     2795
     2796
     2797/**
     2798 *  Convert GC physical address to HC virt
     2799 *
     2800 * @returns The HC virt address corresponding to addr.
     2801 * @param   env         The cpu environment.
     2802 * @param   addr        The physical address.
     2803 */
     2804target_ulong remR3HCVirt2GCPhys(void *env, void *addr)
     2805{
     2806    PVM         pVM    = ((CPUState *)env)->pVM;
     2807    RTHCUINTPTR HCVirt = (RTHCUINTPTR)addr;
     2808    uint32_t    idx    = (HCVirt >> PGM_DYNAMIC_CHUNK_SHIFT);
     2809    RTHCUINTPTR off;
     2810    RTUINT      i;
     2811
     2812    off = HCVirt - pVM->rem.s.paHCVirtToGCPhys[idx].pChunk1;
     2813
     2814    if (    pVM->rem.s.paHCVirtToGCPhys[idx].pChunk1
     2815        &&  off < PGM_DYNAMIC_CHUNK_SIZE)
     2816    {
     2817        Log(("remR3HCVirt2GCPhys %x -> %x\n", addr, pVM->rem.s.paHCVirtToGCPhys[idx].GCPhys1 + off));
     2818        return pVM->rem.s.paHCVirtToGCPhys[idx].GCPhys1 + off;
     2819    }
     2820   
     2821    off = HCVirt - pVM->rem.s.paHCVirtToGCPhys[idx].pChunk2;
     2822    if (    pVM->rem.s.paHCVirtToGCPhys[idx].pChunk2
     2823        &&  off < PGM_DYNAMIC_CHUNK_SIZE)
     2824    {
     2825        Log(("remR3HCVirt2GCPhys %x -> %x\n", addr, pVM->rem.s.paHCVirtToGCPhys[idx].GCPhys2 + off));
     2826        return pVM->rem.s.paHCVirtToGCPhys[idx].GCPhys2 + off;
     2827    }
     2828
     2829    /* Must be externally registered RAM/ROM range */
     2830    for (i = 0; i < pVM->rem.s.cPhysRegistrations; i++)
     2831    {
     2832        uint32_t off = HCVirt - pVM->rem.s.aPhysReg[i].HCVirt;
     2833        if (off < pVM->rem.s.aPhysReg[i].cb)
     2834        {
     2835            Log(("remR3HCVirt2GCPhys %x -> %x\n", addr, pVM->rem.s.aPhysReg[i].GCPhys + off));
     2836            return pVM->rem.s.aPhysReg[i].GCPhys + off;
     2837        }
     2838    }
     2839    AssertReleaseMsgFailed(("No translation for physical address %VHv???\n", addr));
     2840    return 0;
     2841}
     2842
     2843
     2844/**
     2845 *  Grows dynamically allocated guest RAM.
     2846 *  Will raise a fatal error if the operation fails.
     2847 *
     2848 * @param   physaddr    The physical address.
     2849 */
     2850void remR3GrowDynRange(unsigned long physaddr)
     2851{
     2852    int rc;
     2853    PVM pVM = cpu_single_env->pVM;
     2854
     2855    Log(("remR3GrowDynRange %VGp\n", physaddr));
     2856    rc = PGM3PhysGrowRange(pVM, (RTGCPHYS)physaddr);
     2857    if (VBOX_SUCCESS(rc))
     2858        return;
     2859
     2860    LogRel(("\nUnable to allocate guest RAM chunk at %VGp\n", physaddr));
     2861    cpu_abort(cpu_single_env, "Unable to allocate guest RAM chunk at %VGp\n", physaddr);
     2862    AssertFatalFailed();
     2863}
     2864
     2865#endif /* PGM_DYNAMIC_RAM_ALLOC */
    26422866
    26432867
    … …  
    26522876REMR3DECL(void) REMR3NotifyPhysRomRegister(PVM pVM, RTGCPHYS GCPhys, RTUINT cb, void *pvCopy)
    26532877{
     2878#ifdef PGM_DYNAMIC_RAM_ALLOC
     2879    uint32_t i;
     2880#endif
    26542881    LogFlow(("REMR3NotifyPhysRomRegister: GCPhys=%VGp cb=%d pvCopy=%p\n", GCPhys, cb, pvCopy));
    26552882    VM_ASSERT_EMT(pVM);
    … …  
    26702897    pVM->rem.s.fIgnoreAll = true;
    26712898
     2899#ifdef PGM_DYNAMIC_RAM_ALLOC
     2900    cpu_register_physical_memory(GCPhys, cb, GCPhys | IO_MEM_ROM);
     2901    AssertRelease(pVM->rem.s.cPhysRegistrations < REM_MAX_PHYS_REGISTRATIONS);
     2902    for (i = 0; i < pVM->rem.s.cPhysRegistrations; i++)
     2903    {
     2904        if (pVM->rem.s.aPhysReg[i].GCPhys == GCPhys)
     2905        {
     2906            pVM->rem.s.aPhysReg[i].HCVirt = (RTHCUINTPTR)pvCopy;
     2907            pVM->rem.s.aPhysReg[i].cb     = cb;
     2908            break;
     2909        }
     2910    }
     2911    if (i == pVM->rem.s.cPhysRegistrations)
     2912    {
     2913        pVM->rem.s.aPhysReg[i].GCPhys = GCPhys;
     2914        pVM->rem.s.aPhysReg[i].HCVirt = (RTHCUINTPTR)pvCopy;
     2915        pVM->rem.s.aPhysReg[i].cb     = cb;
     2916        pVM->rem.s.cPhysRegistrations++;
     2917    }
     2918#else
    26722919    AssertRelease(phys_ram_base);
    26732920    cpu_register_physical_memory(GCPhys, cb, ((uintptr_t)pvCopy - (uintptr_t)phys_ram_base) | IO_MEM_ROM);
     2921#endif
     2922
    26742923    Log2(("%.64Vhxd\n", (char *)pvCopy + cb - 64));
    26752924
    … …  
    27833032            Assert(cb == PAGE_SIZE);
    27843033            Assert(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys);
     3034#ifdef PGM_DYNAMIC_RAM_ALLOC
     3035            Assert(remR3HCVirt2GCPhys(cpu_single_env, pvHCPtr) < MMR3PhysGetRamSize(pVM));
     3036            cpu_register_physical_memory(GCPhys, cb, GCPhys);
     3037#else
    27853038            Assert((uintptr_t)pvHCPtr - (uintptr_t)phys_ram_base < MMR3PhysGetRamSize(pVM));
    27863039            cpu_register_physical_memory(GCPhys, cb, (uintptr_t)pvHCPtr - (uintptr_t)phys_ram_base);
     3040#endif
    27873041        }
    27883042    }
    … …  
    28293083            Assert(cb == PAGE_SIZE);
    28303084            Assert(RT_ALIGN_T(GCPhysOld, PAGE_SIZE, RTGCPHYS) == GCPhysOld);
     3085#ifdef PGM_DYNAMIC_RAM_ALLOC
     3086            Assert(remR3HCVirt2GCPhys(cpu_single_env, pvHCPtr) < MMR3PhysGetRamSize(pVM));
     3087            cpu_register_physical_memory(GCPhysOld, cb, GCPhysOld);
     3088#else
    28313089            AssertMsg((uintptr_t)pvHCPtr - (uintptr_t)phys_ram_base < MMR3PhysGetRamSize(pVM),
    28323090                      ("pvHCPtr=%p phys_ram_base=%p size=%RX64 cb=%RGp\n", pvHCPtr, phys_ram_base, MMR3PhysGetRamSize(pVM), cb));
    28333091            cpu_register_physical_memory(GCPhysOld, cb, (uintptr_t)pvHCPtr - (uintptr_t)phys_ram_base);
     3092#endif
    28343093        }
    28353094
    … …  
    29243183     */
    29253184    /** @todo This is rather ugly, but there's no other way when we don't wish to touch *many* other files. */
     3185#ifdef PGM_DYNAMIC_RAM_ALLOC
     3186    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbSrcPhys);
     3187#else
    29263188    uintptr_t off = pbSrcPhys - phys_ram_base;
     3189#endif
    29273190    if (off < (uintptr_t)phys_ram_size)
    29283191        PGMPhysRead(cpu_single_env->pVM, (RTGCPHYS)off, pvDst, cb);
    … …  
    29523215     * ROM is accessed this way, even if it's not part of the RAM.
    29533216     */
     3217#ifdef PGM_DYNAMIC_RAM_ALLOC
     3218    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbSrcPhys);
     3219#else
    29543220    uintptr_t off = pbSrcPhys - phys_ram_base;
     3221#endif
    29553222    if (off < (uintptr_t)phys_ram_size)
    29563223        val = PGMR3PhysReadByte(cpu_single_env->pVM, (RTGCPHYS)off);
    … …  
    29813248     * ROM is accessed this way, even if it's not part of the RAM.
    29823249     */
     3250#ifdef PGM_DYNAMIC_RAM_ALLOC
     3251    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbSrcPhys);
     3252#else
    29833253    uintptr_t off = pbSrcPhys - phys_ram_base;
     3254#endif
    29843255    if (off < (uintptr_t)phys_ram_size)
    29853256        val = PGMR3PhysReadByte(cpu_single_env->pVM, (RTGCPHYS)off);
    … …  
    30103281     * ROM is accessed this way, even if it's not part of the RAM.
    30113282     */
     3283#ifdef PGM_DYNAMIC_RAM_ALLOC
     3284    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbSrcPhys);
     3285#else
    30123286    uintptr_t off = pbSrcPhys - phys_ram_base;
     3287#endif
    30133288    if (off < (uintptr_t)phys_ram_size)
    30143289        val = PGMR3PhysReadWord(cpu_single_env->pVM, (RTGCPHYS)off);
    … …  
    30403315     */
    30413316    /** @todo This is rather ugly, but there's no other way when we don't wish to touch *many* other files. */
     3317#ifdef PGM_DYNAMIC_RAM_ALLOC
     3318    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbSrcPhys);
     3319#else
    30423320    uintptr_t off = pbSrcPhys - phys_ram_base;
     3321#endif
    30433322    if (off < (uintptr_t)phys_ram_size)
    30443323        val = PGMR3PhysReadWord(cpu_single_env->pVM, (RTGCPHYS)off);
    … …  
    30693348     * ROM is accessed this way, even if it's not part of the RAM.
    30703349     */
    3071     /** @todo This is rather ugly, but there's no other way when we don't wish to touch *many* other files. */
     3350#ifdef PGM_DYNAMIC_RAM_ALLOC
     3351    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbSrcPhys);
     3352#else
    30723353    uintptr_t off = pbSrcPhys - phys_ram_base;
     3354#endif
    30733355    if (off < (uintptr_t)phys_ram_size)
    30743356        val = PGMR3PhysReadDword(cpu_single_env->pVM, (RTGCPHYS)off);
    … …  
    30993381     * ROM is accessed this way, even if it's not part of the RAM.
    31003382     */
     3383#ifdef PGM_DYNAMIC_RAM_ALLOC
     3384    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbSrcPhys);
     3385#else
    31013386    uintptr_t off = pbSrcPhys - phys_ram_base;
     3387#endif
    31023388    if (off < (uintptr_t)phys_ram_size)
    31033389        val = PGMR3PhysReadDword(cpu_single_env->pVM, (RTGCPHYS)off);
    … …  
    31283414     * ROM is accessed this way, even if it's not part of the RAM.
    31293415     */
     3416#ifdef PGM_DYNAMIC_RAM_ALLOC
     3417    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbSrcPhys);
     3418#else
    31303419    uintptr_t off = pbSrcPhys - phys_ram_base;
     3420#endif
    31313421    if (off < (uintptr_t)phys_ram_size)
    31323422        val =            PGMR3PhysReadDword(cpu_single_env->pVM, (RTGCPHYS)off)
    … …  
    31563446     * Calc the physical address ('off') and check that it's within the RAM.
    31573447     */
     3448#ifdef PGM_DYNAMIC_RAM_ALLOC
     3449    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbDstPhys);
     3450#else
    31583451    uintptr_t off = pbDstPhys - phys_ram_base;
     3452#endif
    31593453    if (off < (uintptr_t)phys_ram_size)
    31603454        PGMPhysWrite(cpu_single_env->pVM, (RTGCPHYS)off, pvSrc, cb);
    … …  
    31773471     * Calc the physical address ('off') and check that it's within the RAM.
    31783472     */
     3473#ifdef PGM_DYNAMIC_RAM_ALLOC
     3474    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbDstPhys);
     3475#else
    31793476    uintptr_t off = pbDstPhys - phys_ram_base;
     3477#endif
    31803478    if (off < (uintptr_t)phys_ram_size)
    31813479        PGMR3PhysWriteByte(cpu_single_env->pVM, (RTGCPHYS)off, val);
    … …  
    31983496     * Calc the physical address ('off') and check that it's within the RAM.
    31993497     */
     3498#ifdef PGM_DYNAMIC_RAM_ALLOC
     3499    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbDstPhys);
     3500#else
    32003501    uintptr_t off = pbDstPhys - phys_ram_base;
     3502#endif
    32013503    if (off < (uintptr_t)phys_ram_size)
    32023504        PGMR3PhysWriteWord(cpu_single_env->pVM, (RTGCPHYS)off, val);
    … …  
    32193521     * Calc the physical address ('off') and check that it's within the RAM.
    32203522     */
     3523#ifdef PGM_DYNAMIC_RAM_ALLOC
     3524    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbDstPhys);
     3525#else
    32213526    uintptr_t off = pbDstPhys - phys_ram_base;
     3527#endif
    32223528    if (off < (uintptr_t)phys_ram_size)
    32233529        PGMR3PhysWriteDword(cpu_single_env->pVM, (RTGCPHYS)off, val);
    … …  
    32403546     * Calc the physical address ('off') and check that it's within the RAM.
    32413547     */
     3548#ifdef PGM_DYNAMIC_RAM_ALLOC
     3549    uintptr_t off = remR3HCVirt2GCPhys(cpu_single_env, pbDstPhys);
     3550#else
    32423551    uintptr_t off = pbDstPhys - phys_ram_base;
     3552#endif
    32433553    if (off < (uintptr_t)phys_ram_size)
    32443554    {

  • trunk/src/recompiler/new/cpu-all.h

    r104 r1001  
    197197void     remR3PhysWriteU32(uint8_t *pbDstPhys, uint32_t val);
    198198void     remR3PhysWriteU64(uint8_t *pbDstPhys, uint64_t val);
     199# ifdef PGM_DYNAMIC_RAM_ALLOC
     200void    *remR3GCPhys2HCVirt(void *env, target_ulong addr);
     201target_ulong remR3HCVirt2GCPhys(void *env, void *addr);
     202void     remR3GrowDynRange(unsigned long physaddr);
     203# endif
    199204#endif
    200205
    … …  
    961966extern int phys_ram_size;
    962967extern int phys_ram_fd;
    963 #endif /* !VBOX */
     968extern int phys_ram_size;
     969#else /* VBOX */
    964970extern RTGCPHYS phys_ram_size;
    965 extern uint8_t *phys_ram_base;
    966 extern uint8_t *phys_ram_dirty;
    967 #ifdef VBOX
    968 /* This is required for bounds checking the phys_ram_dirty accesses. */
     971/** This is required for bounds checking the phys_ram_dirty accesses. */
    969972extern uint32_t phys_ram_dirty_size;
    970973#endif /* VBOX */
     974#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     975extern uint8_t *phys_ram_base;
     976#endif
     977extern uint8_t *phys_ram_dirty;
    971978
    972979/* physical memory access */
    … …  
    979986#define IO_MEM_UNASSIGNED  (2 << IO_MEM_SHIFT)
    980987#define IO_MEM_NOTDIRTY    (4 << IO_MEM_SHIFT) /* used internally, never use directly */
     988#if defined(VBOX) && defined(PGM_DYNAMIC_RAM_ALLOC)
     989#define IO_MEM_RAM_MISSING (5 << IO_MEM_SHIFT) /* used internally, never use directly */
     990#endif
    981991/* acts like a ROM when read and like a device when written. As an
    982992   exception, the write memory callback gets the ram offset instead of

  • trunk/src/recompiler/new/exec-all.h

    r182 r1001  
    603603# ifdef VBOX
    604604target_ulong remR3PhysGetPhysicalAddressCode(CPUState *env, target_ulong addr, CPUTLBEntry *pTLBEntry);
     605#  ifdef PGM_DYNAMIC_RAM_ALLOC
     606target_ulong remR3HCVirt2GCPhys(void *env, void *addr);
     607#  endif
    605608# endif
    606609/* NOTE: this function can trigger an exception */
    … …  
    633636    pd = env->tlb_table[is_user][index].addr_code & ~TARGET_PAGE_MASK;
    634637    if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
    635 #ifdef VBOX
     638# ifdef VBOX
    636639        /* deal with non-MMIO access handlers. */
    637640        return remR3PhysGetPhysicalAddressCode(env, addr, &env->tlb_table[is_user][index]);
    638 #else
     641# else
    639642        cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x%08lx\n", addr);
    640 #endif
     643# endif
    641644    }
     645# if defined(VBOX) && defined(PGM_DYNAMIC_RAM_ALLOC)
     646    return remR3HCVirt2GCPhys(env, (void *)(addr + env->tlb_table[is_user][index].addend));
     647# else
    642648    return addr + env->tlb_table[is_user][index].addend - (unsigned long)phys_ram_base;
     649# endif
    643650}
    644651#endif

  • trunk/src/recompiler/new/exec.c

    r104 r1001  
    9696int phys_ram_size;
    9797int phys_ram_fd;
    98 #endif /* !VBOX */
     98int phys_ram_size;
     99#else /* VBOX */
    99100RTGCPHYS phys_ram_size;
    100 uint8_t *phys_ram_base;
    101 uint8_t *phys_ram_dirty;
    102 #ifdef VBOX
    103101/* we have memory ranges (the high PC-BIOS mapping) which
    104102   causes some pages to fall outside the dirty map here. */
    105103uint32_t phys_ram_dirty_size;
    106 #endif/* VBOX */
     104#endif /* VBOX */
     105#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
     106uint8_t *phys_ram_base;
     107#endif
     108uint8_t *phys_ram_dirty;
    107109
    108110CPUState *first_cpu;
    … …  
    274276          pd[i].phys_offset = IO_MEM_UNASSIGNED;
    275277    }
     278#if defined(VBOX) && defined(PGM_DYNAMIC_RAM_ALLOC)
     279    pd = ((PhysPageDesc *)pd) + (index & (L2_SIZE - 1));
     280    if (RT_UNLIKELY((pd->phys_offset & ~TARGET_PAGE_MASK) == IO_MEM_RAM_MISSING))
     281        remR3GrowDynRange(pd->phys_offset & TARGET_PAGE_MASK);
     282    return pd;
     283#else
    276284    return ((PhysPageDesc *)pd) + (index & (L2_SIZE - 1));
     285#endif
    277286}
    278287
    … …  
    14881497    /* we modify the TLB cache so that the dirty bit will be set again
    14891498       when accessing the range */
     1499#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    14901500    start1 = start + (unsigned long)phys_ram_base;
     1501#else
     1502    start1 = (unsigned long)remR3GCPhys2HCVirt(env, start);
     1503#endif
    14911504    for(env = first_cpu; env != NULL; env = env->next_cpu) {
    14921505        for(i = 0; i < CPU_TLB_SIZE; i++)
    … …  
    15331546
    15341547    if ((tlb_entry->addr_write & ~TARGET_PAGE_MASK) == IO_MEM_RAM) {
     1548        /* RAM case */
     1549#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    15351550        ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) +
    15361551            tlb_entry->addend - (unsigned long)phys_ram_base;
     1552#else
     1553        ram_addr = remR3HCVirt2GCPhys(cpu_single_env, (tlb_entry->addr_write & TARGET_PAGE_MASK) + tlb_entry->addend); /** @todo check if this is right! */
     1554#endif
    15371555        if (!cpu_physical_memory_is_dirty(ram_addr)) {
    15381556            tlb_entry->addr_write |= IO_MEM_NOTDIRTY;
    … …  
    16151633            /* standard memory */
    16161634            address = vaddr;
     1635#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    16171636            addend = (unsigned long)phys_ram_base + (pd & TARGET_PAGE_MASK);
     1637#else
     1638            addend = (unsigned long)remR3GCPhys2HCVirt(env, pd & TARGET_PAGE_MASK);
     1639#endif
    16181640        }
    16191641       
    … …  
    19281950        p = phys_page_find_alloc(addr >> TARGET_PAGE_BITS, 1);
    19291951        p->phys_offset = phys_offset;
     1952#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    19301953        if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM ||
    19311954            (phys_offset & IO_MEM_ROMD))
     1955#else
     1956        if (   (phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM
     1957            || (phys_offset & IO_MEM_ROMD)
     1958            || (phys_offset & ~TARGET_PAGE_MASK) == IO_MEM_RAM_MISSING)
     1959#endif
     1960
    19321961            phys_offset += TARGET_PAGE_SIZE;
    19331962    }
    … …  
    19832012    unsigned long ram_addr;
    19842013    int dirty_flags;
     2014#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    19852015    ram_addr = addr - (unsigned long)phys_ram_base;
     2016#else
     2017    ram_addr = remR3HCVirt2GCPhys(cpu_single_env, (void *)addr);
     2018#endif
    19862019#ifdef VBOX
    19872020    if (RT_UNLIKELY((ram_addr >> TARGET_PAGE_BITS) >= phys_ram_dirty_size))
    … …  
    20222055    unsigned long ram_addr;
    20232056    int dirty_flags;
     2057#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    20242058    ram_addr = addr - (unsigned long)phys_ram_base;
     2059#else
     2060    ram_addr = remR3HCVirt2GCPhys(cpu_single_env, (void *)addr);
     2061#endif
    20252062#ifdef VBOX
    20262063    if (RT_UNLIKELY((ram_addr >> TARGET_PAGE_BITS) >= phys_ram_dirty_size))
    … …  
    20612098    unsigned long ram_addr;
    20622099    int dirty_flags;
     2100#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    20632101    ram_addr = addr - (unsigned long)phys_ram_base;
     2102#else
     2103    ram_addr = remR3HCVirt2GCPhys(cpu_single_env, (void *)addr);
     2104#endif
    20642105#ifdef VBOX
    20652106    if (RT_UNLIKELY((ram_addr >> TARGET_PAGE_BITS) >= phys_ram_dirty_size))
    … …  
    21132154    cpu_register_io_memory(IO_MEM_UNASSIGNED >> IO_MEM_SHIFT, unassigned_mem_read, unassigned_mem_write, NULL);
    21142155    cpu_register_io_memory(IO_MEM_NOTDIRTY >> IO_MEM_SHIFT, error_mem_read, notdirty_mem_write, NULL);
     2156#if defined(VBOX) && defined(PGM_DYNAMIC_RAM_ALLOC)
     2157    cpu_register_io_memory(IO_MEM_RAM_MISSING >> IO_MEM_SHIFT, unassigned_mem_read, unassigned_mem_write, NULL);
     2158    io_mem_nb = 6;
     2159#else
    21152160    io_mem_nb = 5;
     2161#endif
    21162162
    21172163#ifndef VBOX /* VBOX: we do this later when the RAM is allocated. */
    … …  
    22462292                addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
    22472293                /* RAM case */
     2294#ifdef VBOX
     2295# ifdef PGM_DYNAMIC_RAM_ALLOC
     2296                ptr = remR3GCPhys2HCVirt(cpu_single_env, addr1);
     2297# else
    22482298                ptr = phys_ram_base + addr1;
    2249 #ifdef VBOX
     2299# endif
    22502300                remR3PhysWrite(ptr, buf, l);
    22512301#else
     2302                ptr = phys_ram_base + addr1;
    22522303                memcpy(ptr, buf, l);
    22532304#endif
    … …  
    22862337            } else {
    22872338                /* RAM case */
     2339#ifdef VBOX
     2340# ifdef PGM_DYNAMIC_RAM_ALLOC
     2341                ptr = remR3GCPhys2HCVirt(cpu_single_env, (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK));
     2342# else
    22882343                ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
    22892344                    (addr & ~TARGET_PAGE_MASK);
    2290 #ifdef VBOX
     2345# endif
    22912346                remR3PhysRead(ptr, buf, l);
    22922347#else
     2348                ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
     2349                    (addr & ~TARGET_PAGE_MASK);
    22932350                memcpy(buf, ptr, l);
    22942351#endif
    … …  
    23312388            addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
    23322389            /* ROM/RAM case */
     2390        /* RAM case */
     2391#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    23332392            ptr = phys_ram_base + addr1;
     2393#else
     2394            ptr = remR3GCPhys2HCVirt(cpu_single_env, addr1);
     2395#endif
    23342396            memcpy(ptr, buf, l);
    23352397        }
    … …  
    23642426    } else {
    23652427        /* RAM case */
     2428#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    23662429        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
    23672430            (addr & ~TARGET_PAGE_MASK);
     2431#else
     2432        ptr = remR3GCPhys2HCVirt(cpu_single_env, (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK));
     2433#endif
    23682434        val = ldl_p(ptr);
    23692435    }
    … …  
    24002466    } else {
    24012467        /* RAM case */
     2468#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    24022469        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
    24032470            (addr & ~TARGET_PAGE_MASK);
     2471#else
     2472        ptr = remR3GCPhys2HCVirt(cpu_single_env, (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK));
     2473#endif
    24042474        val = ldq_p(ptr);
    24052475    }
    … …  
    24442514        io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val);
    24452515    } else {
     2516#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    24462517        ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
    24472518            (addr & ~TARGET_PAGE_MASK);
     2519#else
     2520        ptr = remR3GCPhys2HCVirt(cpu_single_env, (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK));
     2521#endif
    24482522        stl_p(ptr, val);
    24492523    }
    … …  
    24722546        addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
    24732547        /* RAM case */
     2548#if !defined(VBOX) || !defined(PGM_DYNAMIC_RAM_ALLOC)
    24742549        ptr = phys_ram_base + addr1;
     2550#else
     2551        ptr = remR3GCPhys2HCVirt(cpu_single_env, addr1);
     2552#endif
     2553
    24752554        stl_p(ptr, val);
    24762555        if (!cpu_physical_memory_is_dirty(addr1)) {

  • trunk/src/recompiler/new/target-i386/helper2.c

    r1 r1001  
    586586
    587587    /* page directory entry */
     588# ifdef PGM_DYNAMIC_RAM_ALLOC
     589    pde_ptr = remR3GCPhys2HCVirt(env, (((env->cr[3] & ~0xfff) + ((addr >> 20) & ~3)) & env->a20_mask));
     590# else
    588591    pde_ptr = phys_ram_base +
    589592        (((env->cr[3] & ~0xfff) + ((addr >> 20) & ~3)) & env->a20_mask);
     593# endif
    590594    pde = ldl_raw(pde_ptr);
    591595    /* if PSE bit is set, then we use a 4MB page */
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette