Index: /trunk/src/VBox/VMM/Config.kmk
===================================================================
--- /trunk/src/VBox/VMM/Config.kmk	(revision 100108)
+++ /trunk/src/VBox/VMM/Config.kmk	(revision 100109)
@@ -68,5 +68,14 @@
  VMM_COMMON_DEFS += IEM_WITHOUT_VEX
 endif
-ifdef VBOX_WITH_IEM_TLB ## @todo VMX code doesn't compile with TLBs enabled.
+ifdef VBOX_WITH_IEM_RECOMPILER # Selectely removing hwvirt doesn't work yet with the recompiler. Python code doesn't check #ifdefs.
+ VMM_COMMON_DEFS += VBOX_WITH_IEM_RECOMPILER IEM_WITH_CODE_TLB IEM_WITH_DATA_TLB
+ VMM_COMMON_DEFS += VBOX_WITH_NESTED_HWVIRT_VMX
+ #ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT # Busted with TLB enabled.
+ # VMM_COMMON_DEFS += VBOX_WITH_NESTED_HWVIRT_VMX_EPT
+ #endif
+ ifdef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
+  VMM_COMMON_DEFS += VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
+ endif
+else ifdef VBOX_WITH_IEM_TLB ## @todo VMX code doesn't compile with TLBs enabled.
  VMM_COMMON_DEFS  += IEM_WITH_CODE_TLB IEM_WITH_DATA_TLB
 else
Index: /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp	(revision 100108)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp	(revision 100109)
@@ -9841,5 +9841,5 @@
 
 
-#ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
+#if defined(VBOX_WITH_NESTED_HWVIRT_VMX_EPT) || defined(VBOX_WITH_IEM_RECOMPILER) /* HACK ALERT: Linking trick. */
 /**
  * Implements 'INVEPT'.
@@ -9847,5 +9847,10 @@
 IEM_CIMPL_DEF_3(iemCImpl_invept, uint8_t, iEffSeg, RTGCPTR, GCPtrInveptDesc, uint64_t, uInveptType)
 {
+# ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
     return iemVmxInvept(pVCpu, cbInstr, iEffSeg, GCPtrInveptDesc, uInveptType, NULL /* pExitInfo */);
+# else
+    RT_NOREF(pVCpu, cbInstr, iEffSeg, GCPtrInveptDesc, uInveptType);
+    AssertFailedReturn(VERR_IEM_ASPECT_NOT_IMPLEMENTED);
+# endif
 }
 #endif
Index: /trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThreadedRecompiler.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThreadedRecompiler.cpp	(revision 100108)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThreadedRecompiler.cpp	(revision 100109)
@@ -268,12 +268,12 @@
  */
 
-static VBOXSTRICTRC iemThreadedCompile(PVMCCV pVM, PVMCPUCC pVCpu)
-{
-    RT_NOREF(pVM, pVCpu, pTb);
+static VBOXSTRICTRC iemThreadedCompile(PVMCC pVM, PVMCPUCC pVCpu)
+{
+    RT_NOREF(pVM, pVCpu);
     return VERR_NOT_IMPLEMENTED;
 }
 
 
-static VBOXSTRICTRC iemThreadedCompileLongJumped(PVMCCV pVM, PVMCPUCC pVCpu, VBOXSTRICTRC rcStrict)
+static VBOXSTRICTRC iemThreadedCompileLongJumped(PVMCC pVM, PVMCPUCC pVCpu, VBOXSTRICTRC rcStrict)
 {
     RT_NOREF(pVM, pVCpu);
@@ -282,5 +282,5 @@
 
 
-static PIEMTB iemThreadedTbLookup(PVMCCV pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhysPC, uint64_t uPc)
+static PIEMTB iemThreadedTbLookup(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhysPC, uint64_t uPc)
 {
     RT_NOREF(pVM, pVCpu, GCPhysPC, uPc);
@@ -289,5 +289,5 @@
 
 
-static VBOXSTRICTRC iemThreadedTbExec(PVMCCV pVM, PVMCPUCC pVCpu, PIEMTB pTb)
+static VBOXSTRICTRC iemThreadedTbExec(PVMCC pVM, PVMCPUCC pVCpu, PIEMTB pTb)
 {
     RT_NOREF(pVM, pVCpu, pTb);
@@ -309,4 +309,6 @@
     pVCpu->iem.s.cbInstrBufTotal  = 0;
 
+    RT_NOREF(uPc, pPhys);
+    return 0;
 }
 
@@ -315,5 +317,5 @@
 DECL_INLINE_THROW(uint64_t) iemGetPcWithPhysAndCode(PVMCPUCC pVCpu, PRTGCPHYS pPhys)
 {
-    Assert(pVCpu->cpum.GstCtx.cs.u64Base == 0 || pVCpu->iem.s.enmCpuMode != IEMMODE_64BIT);
+    Assert(pVCpu->cpum.GstCtx.cs.u64Base == 0 || !IEM_IS_64BIT_CODE(pVCpu));
     uint64_t const uPc = pVCpu->cpum.GstCtx.rip + pVCpu->cpum.GstCtx.cs.u64Base;
     if (pVCpu->iem.s.pbInstrBuf)
@@ -361,12 +363,12 @@
             {
                 /* Translate PC to physical address, we'll need this for both lookup and compilation. */
-                RTGCPHYS       GCPhysPC;
-                uint64_t const uPC = iemGetPcWithPhysAndCode(pVCpu, &GCPhysPC);
-
-                pTb = iemThreadedTbLookup(pVM, pVCpu, GCPhysPC, uPc);
+                RTGCPHYS       GCPhysPc;
+                uint64_t const uPc = iemGetPcWithPhysAndCode(pVCpu, &GCPhysPc);
+
+                pTb = iemThreadedTbLookup(pVM, pVCpu, GCPhysPc, uPc);
                 if (pTb)
                     rcStrict = iemThreadedTbExec(pVM, pVCpu, pTb);
                 else
-                    rcStrict = iemThreadedCompile(pVM, pVCpu, GCPhysPC, uPc);
+                    rcStrict = iemThreadedCompile(pVM, pVCpu /*, GCPhysPc, uPc*/);
                 if (rcStrict == VINF_SUCCESS)
                 { /* likely */ }
