Changeset 100120 in vbox

Timestamp:

Jun 8, 2023 12:43:32 PM (2 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

157813

Message:

Debugger: Some register printing for ARMv8, bugref:10393

File:

• trunk/src/VBox/Debugger/DBGCCmdHlp.cpp (modified) (3 diffs)

trunk/src/VBox/Debugger/DBGCCmdHlp.cpp

@@ -1368 +1368 @@
         f64BitMode = DBGFR3CpuIsIn64BitCode(pDbgc->pUVM, idCpu);
 
+#ifndef VBOX_VMM_TARGET_ARMV8
     if (fTerse)
     {
@@ -1434 +1435 @@
                                  );
     }
+#else
+    if (fTerse)
+    {
+        if (f64BitMode)
+            rc = DBGFR3RegPrintf(pDbgc->pUVM, idCpu, &szDisAndRegs[0], sizeof(szDisAndRegs),
+                                 "u %016VR{pc} L 0\n"
+                                 "x0=%016VR{x0} x1=%016VR{x1} x2=%016VR{x2} x3=%016VR{x3}\n"
+                                 "x4=%016VR{x4} x5=%016VR{x5} x6=%016VR{x6} x7=%016VR{x7}\n"
+                                 "x8=%016VR{x8} x9=%016VR{x9} x10=%016VR{x10} x11=%016VR{x11}\n"
+                                 "x12=%016VR{x12} x13=%016VR{x13} x14=%016VR{x14} x15=%016VR{x15}\n"
+                                 "x16=%016VR{x16} x17=%016VR{x17} x18=%016VR{x18} x19=%016VR{x19}\n"
+                                 "x20=%016VR{x20} x21=%016VR{x21} x22=%016VR{x22} x23=%016VR{x23}\n"
+                                 "x24=%016VR{x24} x25=%016VR{x25} x26=%016VR{x26} x27=%016VR{x27}\n"
+                                 "x28=%016VR{x28} x29=%016VR{x29} x30=%016VR{x30}\n"
+                                 "pc=%016VR{pc} pstate=%016VR{pstate}\n"
+                                 "sp_el0=%016VR{sp_el0} sp_el1=%016VR{sp_el1} elr_el1=%016VR{elr_el1}\n");
+        else
+            rc = DBGFR3RegPrintf(pDbgc->pUVM, idCpu, szDisAndRegs, sizeof(szDisAndRegs),
+                                 "u %08VR{pc} L 0\n"
+                                 "r0=%016VR{r0} r1=%016VR{r1} r2=%016VR{r2} r3=%016VR{r3}\n"
+                                 "r4=%016VR{r4} r5=%016VR{r5} r6=%016VR{r6} r7=%016VR{r7}\n"
+                                 "r8=%016VR{r8} r9=%016VR{r9} r10=%016VR{r10} r11=%016VR{r11}\n"
+                                 "pc=%016VR{pc} pstate=%016VR{pstate}\n");
+    }
+    else
+    {
+        if (f64BitMode)
+            rc = DBGFR3RegPrintf(pDbgc->pUVM, idCpu, &szDisAndRegs[0], sizeof(szDisAndRegs),
+                                 "u %016VR{pc} L 0\n"
+                                 "x0=%016VR{x0} x1=%016VR{x1} x2=%016VR{x2} x3=%016VR{x3}\n"
+                                 "x4=%016VR{x4} x5=%016VR{x5} x6=%016VR{x6} x7=%016VR{x7}\n"
+                                 "x8=%016VR{x8} x9=%016VR{x9} x10=%016VR{x10} x11=%016VR{x11}\n"
+                                 "x12=%016VR{x12} x13=%016VR{x13} x14=%016VR{x14} x15=%016VR{x15}\n"
+                                 "x16=%016VR{x16} x17=%016VR{x17} x18=%016VR{x18} x19=%016VR{x19}\n"
+                                 "x20=%016VR{x20} x21=%016VR{x21} x22=%016VR{x22} x23=%016VR{x23}\n"
+                                 "x24=%016VR{x24} x25=%016VR{x25} x26=%016VR{x26} x27=%016VR{x27}\n"
+                                 "x28=%016VR{x28} x29=%016VR{x29} x30=%016VR{x30}\n"
+                                 "pc=%016VR{pc} pstate=%016VR{pstate}\n"
+                                 "sp_el0=%016VR{sp_el0} sp_el1=%016VR{sp_el1} elr_el1=%016VR{elr_el1}\n"
+                                 "sctlr_el1=%016VR{sctlr_el1} tcr_el1=%016VR{tcr_el1}\n"
+                                 "ttbr0_el1=%016VR{ttbr0_el1} ttbr1_el1=%016VR{ttbr1_el1}\n"
+                                 "vbar_el1=%016VR{vbar_el1}\n");
+        else
+            rc = DBGFR3RegPrintf(pDbgc->pUVM, idCpu, szDisAndRegs, sizeof(szDisAndRegs),
+                                 "u %08VR{pc} L 0\n"
+                                 "r0=%016VR{r0} r1=%016VR{r1} r2=%016VR{r2} r3=%016VR{r3}\n"
+                                 "r4=%016VR{r4} r5=%016VR{r5} r6=%016VR{r6} r7=%016VR{r7}\n"
+                                 "r8=%016VR{r8} r9=%016VR{r9} r10=%016VR{r10} r11=%016VR{r11}\n"
+                                 "pc=%016VR{pc} pstate=%016VR{pstate}\n");
+    }
+#endif
     if (RT_FAILURE(rc))
         return DBGCCmdHlpVBoxError(pCmdHlp, rc, "DBGFR3RegPrintf failed");
@@ -1443 +1495 @@
      * Disassemble one instruction at cs:[r|e]ip.
      */
+#ifndef VBOX_VMM_TARGET_ARMV8
     if (!f64BitMode && strstr(pszRegs, " vm ")) /* a bit ugly... */
         return pCmdHlp->pfnExec(pCmdHlp, "uv86 %s", szDisAndRegs + 2);
+#endif
     return pCmdHlp->pfnExec(pCmdHlp, "%s", szDisAndRegs);
 }