- Timestamp:
- Jun 15, 2023 11:17:28 AM (18 months ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
r99824 r100178 6589 6589 /* Reset the FIFO processing as well as the 3d state (if we have one). */ 6590 6590 pThisCC->svga.pau32FIFO[SVGA_FIFO_NEXT_CMD] = pThisCC->svga.pau32FIFO[SVGA_FIFO_STOP] = 0; /** @todo should probably let the FIFO thread do this ... */ 6591 int rc = vmsvgaR3RunExtCmdOnFifoThread(pDevIns, pThis, pThisCC, VMSVGA_FIFO_EXTCMD_RESET, NULL /*pvParam*/, 10000 /*ms*/); 6591 6592 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); /* Hack around lock order issue. FIFO thread might take the lock. */ 6593 6594 int rc = vmsvgaR3RunExtCmdOnFifoThread(pDevIns, pThis, pThisCC, VMSVGA_FIFO_EXTCMD_RESET, NULL /*pvParam*/, 60000 /*ms*/); 6595 AssertLogRelRC(rc); 6596 6597 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_IGNORED); 6598 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, &pThis->CritSect, rcLock); 6592 6599 6593 6600 /* Reset other stuff. */
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