VirtualBox

Ignore:
Timestamp:
Jul 14, 2023 7:56:05 AM (21 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
158397
Message:

ValidationKit: Reapply r158394 (ValidationKit/bs3-cpu-instr-3: Implement testcase for vbroadcast{ss,sd,f128} instructions, ​bugref:9898) now that nasm is updated

Location:
trunk/src/VBox/ValidationKit/bootsectors
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac

    r100569 r100570  
    26002600
    26012601;
     2602; VBROADCASTSS
     2603;
     2604EMIT_INSTR_PLUS_ICEBP vbroadcastss, XMM1, XMM2
     2605EMIT_INSTR_PLUS_ICEBP vbroadcastss, XMM1, FSxBX
     2606EMIT_INSTR_PLUS_ICEBP vbroadcastss, YMM1, XMM2
     2607EMIT_INSTR_PLUS_ICEBP vbroadcastss, YMM1, FSxBX
     2608 %if TMPL_BITS == 64
     2609EMIT_INSTR_PLUS_ICEBP vbroadcastss, XMM9, XMM8
     2610EMIT_INSTR_PLUS_ICEBP vbroadcastss, XMM9, FSxBX
     2611EMIT_INSTR_PLUS_ICEBP vbroadcastss, YMM9, XMM8
     2612EMIT_INSTR_PLUS_ICEBP vbroadcastss, YMM9, FSxBX
     2613 %endif
     2614
     2615;
     2616; VBROADCASTSD
     2617;
     2618EMIT_INSTR_PLUS_ICEBP vbroadcastsd, YMM1, XMM2
     2619EMIT_INSTR_PLUS_ICEBP vbroadcastsd, YMM1, FSxBX
     2620 %if TMPL_BITS == 64
     2621EMIT_INSTR_PLUS_ICEBP vbroadcastsd, YMM9, XMM8
     2622EMIT_INSTR_PLUS_ICEBP vbroadcastsd, YMM9, FSxBX
     2623 %endif
     2624
     2625;
     2626; VBROADCASTF128
     2627;
     2628EMIT_INSTR_PLUS_ICEBP vbroadcastf128, YMM1, FSxBX
     2629 %if TMPL_BITS == 64
     2630EMIT_INSTR_PLUS_ICEBP vbroadcastf128, YMM9, FSxBX
     2631 %endif
     2632
     2633;
    26022634; SHA1NEXTE
    26032635;

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32

    r100569 r100570  
    1107511075        {  bs3CpuInstr3_vphminposuw_XMM9_XMM8_icebp_c64,  255,         RM_REG, T_AVX_128,   9,   8, RT_ELEMENTS(s_aValues), s_aValues },
    1107611076        {  bs3CpuInstr3_vphminposuw_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   9, 255, RT_ELEMENTS(s_aValues), s_aValues },
     11077    };
     11078    static BS3CPUINSTR3_TEST3_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST3_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
     11079    unsigned const                         iTest       = BS3CPUINSTR3_TEST_MODES_INDEX(bMode);
     11080    return bs3CpuInstr3_WorkerTestType3(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
     11081                                        g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4), X86_EFL_STATUS_BITS);
     11082}
     11083
     11084
     11085/*
     11086 * VBROADCASTSS/VBROADCASTSD
     11087 */
     11088BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vbroadcastss_XMM1_XMM2_icebp);
     11089BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vbroadcastss_XMM1_FSxBX_icebp);
     11090extern FNBS3FAR             bs3CpuInstr3_vbroadcastss_XMM9_XMM8_icebp_c64;
     11091extern FNBS3FAR             bs3CpuInstr3_vbroadcastss_XMM9_FSxBX_icebp_c64;
     11092BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vbroadcastss_YMM1_XMM2_icebp);
     11093BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vbroadcastss_YMM1_FSxBX_icebp);
     11094extern FNBS3FAR             bs3CpuInstr3_vbroadcastss_YMM9_XMM8_icebp_c64;
     11095extern FNBS3FAR             bs3CpuInstr3_vbroadcastss_YMM9_FSxBX_icebp_c64;
     11096
     11097BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vbroadcastsd_YMM1_XMM2_icebp);
     11098BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vbroadcastsd_YMM1_FSxBX_icebp);
     11099extern FNBS3FAR             bs3CpuInstr3_vbroadcastsd_YMM9_XMM8_icebp_c64;
     11100extern FNBS3FAR             bs3CpuInstr3_vbroadcastsd_YMM9_FSxBX_icebp_c64;
     11101
     11102BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vbroadcastf128_YMM1_FSxBX_icebp);
     11103extern FNBS3FAR             bs3CpuInstr3_vbroadcastf128_YMM9_FSxBX_icebp_c64;
     11104
     11105BS3_DECL_FAR(uint8_t) bs3CpuInstr3_vbroadcastss_vbroadcastsd_vbroadcastf128(uint8_t bMode)
     11106{
     11107    static BS3CPUINSTR3_TEST3_VALUES_T const s_aValues32[] =
     11108    {
     11109        {            RTUINT256_INIT_C(0, 0, 0, 0),
     11110            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     11111        {            RTUINT256_INIT_C(0x8888888877777777, 0x6666666655555555, 0x4444444433333333, 0x2222222211111111),
     11112            /* => */ RTUINT256_INIT_C(0x1111111111111111, 0x1111111111111111, 0x1111111111111111, 0x1111111111111111) },
     11113    };
     11114
     11115    static BS3CPUINSTR3_TEST3_VALUES_T const s_aValues64[] =
     11116    {
     11117        {            RTUINT256_INIT_C(0, 0, 0, 0),
     11118            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     11119        {            RTUINT256_INIT_C(0x4444444444444444, 0x3333333333333333, 0x2222222222222222, 0x1111111111111111),
     11120            /* => */ RTUINT256_INIT_C(0x1111111111111111, 0x1111111111111111, 0x1111111111111111, 0x1111111111111111) },
     11121    };
     11122
     11123    static BS3CPUINSTR3_TEST3_VALUES_T const s_aValues128[] =
     11124    {
     11125        {            RTUINT256_INIT_C(0, 0, 0, 0),
     11126            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     11127        {            RTUINT256_INIT_C(0x4444444444444444, 0x3333333333333333, 0x2222222222222222, 0x1111111111111111),
     11128            /* => */ RTUINT256_INIT_C(0x2222222222222222, 0x1111111111111111, 0x2222222222222222, 0x1111111111111111) },
     11129    };
     11130
     11131    static BS3CPUINSTR3_TEST3_T const s_aTests16[] =
     11132    {
     11133        {  bs3CpuInstr3_vbroadcastss_XMM1_XMM2_icebp_c16,   255,         RM_REG, T_AVX2_128,    1,   2, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11134        {  bs3CpuInstr3_vbroadcastss_XMM1_FSxBX_icebp_c16,  X86_XCPT_AC, RM_MEM, T_AVX_128,     1, 255, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11135        {  bs3CpuInstr3_vbroadcastss_YMM1_XMM2_icebp_c16,   255,         RM_REG, T_AVX2_256,    1,   2, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11136        {  bs3CpuInstr3_vbroadcastss_YMM1_FSxBX_icebp_c16,  X86_XCPT_AC, RM_MEM, T_AVX_256,     1, 255, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11137
     11138        {  bs3CpuInstr3_vbroadcastsd_YMM1_XMM2_icebp_c16,   255,         RM_REG, T_AVX2_256,    1,   2, RT_ELEMENTS(s_aValues64),  s_aValues64  },
     11139        {  bs3CpuInstr3_vbroadcastsd_YMM1_FSxBX_icebp_c16,  X86_XCPT_AC, RM_MEM, T_AVX_256,     1, 255, RT_ELEMENTS(s_aValues64),  s_aValues64  },
     11140
     11141        {  bs3CpuInstr3_vbroadcastf128_YMM1_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, RT_ELEMENTS(s_aValues128), s_aValues128 },
     11142    };
     11143    static BS3CPUINSTR3_TEST3_T const s_aTests32[] =
     11144    {
     11145        {  bs3CpuInstr3_vbroadcastss_XMM1_XMM2_icebp_c32,   255,         RM_REG, T_AVX2_128,    1,   2, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11146        {  bs3CpuInstr3_vbroadcastss_XMM1_FSxBX_icebp_c32,  X86_XCPT_AC, RM_MEM, T_AVX_128,     1, 255, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11147        {  bs3CpuInstr3_vbroadcastss_YMM1_XMM2_icebp_c32,   255,         RM_REG, T_AVX2_256,    1,   2, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11148        {  bs3CpuInstr3_vbroadcastss_YMM1_FSxBX_icebp_c32,  X86_XCPT_AC, RM_MEM, T_AVX_256,     1, 255, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11149
     11150        {  bs3CpuInstr3_vbroadcastsd_YMM1_XMM2_icebp_c32,   255,         RM_REG, T_AVX2_256,    1,   2, RT_ELEMENTS(s_aValues64),  s_aValues64  },
     11151        {  bs3CpuInstr3_vbroadcastsd_YMM1_FSxBX_icebp_c32,  X86_XCPT_AC, RM_MEM, T_AVX_256,     1, 255, RT_ELEMENTS(s_aValues64),  s_aValues64  },
     11152
     11153        {  bs3CpuInstr3_vbroadcastf128_YMM1_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, RT_ELEMENTS(s_aValues128), s_aValues128 },
     11154    };
     11155    static BS3CPUINSTR3_TEST3_T const s_aTests64[] =
     11156    {
     11157        {  bs3CpuInstr3_vbroadcastss_XMM1_XMM2_icebp_c64,   255,         RM_REG, T_AVX2_128,    1,   2, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11158        {  bs3CpuInstr3_vbroadcastss_XMM1_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_AVX_128,     1, 255, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11159        {  bs3CpuInstr3_vbroadcastss_XMM9_XMM8_icebp_c64,   255,         RM_REG, T_AVX2_128,    9,   8, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11160        {  bs3CpuInstr3_vbroadcastss_XMM9_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_AVX_128,     9, 255, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11161        {  bs3CpuInstr3_vbroadcastss_YMM1_XMM2_icebp_c64,   255,         RM_REG, T_AVX2_256,    1,   2, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11162        {  bs3CpuInstr3_vbroadcastss_YMM1_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_AVX_256,     1, 255, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11163        {  bs3CpuInstr3_vbroadcastss_YMM9_XMM8_icebp_c64,   255,         RM_REG, T_AVX2_256,    9,   8, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11164        {  bs3CpuInstr3_vbroadcastss_YMM9_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_AVX_256,     9, 255, RT_ELEMENTS(s_aValues32),  s_aValues32  },
     11165
     11166        {  bs3CpuInstr3_vbroadcastsd_YMM1_XMM2_icebp_c64,   255,         RM_REG, T_AVX2_256,    1,   2, RT_ELEMENTS(s_aValues64),  s_aValues64  },
     11167        {  bs3CpuInstr3_vbroadcastsd_YMM1_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_AVX_256,     1, 255, RT_ELEMENTS(s_aValues64),  s_aValues64  },
     11168        {  bs3CpuInstr3_vbroadcastsd_YMM9_XMM8_icebp_c64,   255,         RM_REG, T_AVX2_256,    9,   8, RT_ELEMENTS(s_aValues64),  s_aValues64  },
     11169        {  bs3CpuInstr3_vbroadcastsd_YMM9_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM, T_AVX_256,     9, 255, RT_ELEMENTS(s_aValues64),  s_aValues64  },
     11170
     11171        {  bs3CpuInstr3_vbroadcastf128_YMM1_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, RT_ELEMENTS(s_aValues128), s_aValues128 },
     11172        {  bs3CpuInstr3_vbroadcastf128_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    9, 255, RT_ELEMENTS(s_aValues128), s_aValues128 },
     11173
    1107711174    };
    1107811175    static BS3CPUINSTR3_TEST3_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST3_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    … …  
    1255012647#endif
    1255112648#if defined (ALL_TESTS)
    12552         { "mpsadbw",                                        bs3CpuInstr3_v_mpsadbw, 0 }
    12553 
     12649        { "mpsadbw",                                        bs3CpuInstr3_v_mpsadbw, 0 },
     12650
     12651#endif
     12652#if defined(ALL_TESTS)
     12653        { "vbroadcastss/vbroadcastsd/vbroadcastf128",       bs3CpuInstr3_vbroadcastss_vbroadcastsd_vbroadcastf128,   0 }
    1255412654#endif
    1255512655    };
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette