Changeset 100596 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- Jul 17, 2023 10:58:22 AM (18 months ago)
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac
r100580 r100596 3181 3181 %endif 3182 3182 3183 ; 3184 ; [V]PSUBSB 3185 ; 3186 EMIT_INSTR_PLUS_ICEBP psubsb, MM1, MM2 3187 EMIT_INSTR_PLUS_ICEBP psubsb, MM1, FSxBX 3188 EMIT_INSTR_PLUS_ICEBP psubsb, XMM1, XMM2 3189 EMIT_INSTR_PLUS_ICEBP psubsb, XMM1, FSxBX 3190 EMIT_INSTR_PLUS_ICEBP vpsubsb, XMM1, XMM2, XMM3 3191 EMIT_INSTR_PLUS_ICEBP vpsubsb, XMM1, XMM2, FSxBX 3192 EMIT_INSTR_PLUS_ICEBP vpsubsb, YMM1, YMM2, YMM3 3193 EMIT_INSTR_PLUS_ICEBP vpsubsb, YMM1, YMM2, FSxBX 3194 %if TMPL_BITS == 64 3195 EMIT_INSTR_PLUS_ICEBP psubsb, XMM8, XMM9 3196 EMIT_INSTR_PLUS_ICEBP psubsb, XMM8, FSxBX 3197 EMIT_INSTR_PLUS_ICEBP vpsubsb, XMM8, XMM9, XMM10 3198 EMIT_INSTR_PLUS_ICEBP vpsubsb, XMM8, XMM9, FSxBX 3199 EMIT_INSTR_PLUS_ICEBP vpsubsb, YMM8, YMM9, YMM10 3200 EMIT_INSTR_PLUS_ICEBP vpsubsb, YMM8, YMM9, FSxBX 3201 %endif 3202 3203 ; 3204 ; [V]PSUBSW 3205 ; 3206 EMIT_INSTR_PLUS_ICEBP psubsw, MM1, MM2 3207 EMIT_INSTR_PLUS_ICEBP psubsw, MM1, FSxBX 3208 EMIT_INSTR_PLUS_ICEBP psubsw, XMM1, XMM2 3209 EMIT_INSTR_PLUS_ICEBP psubsw, XMM1, FSxBX 3210 EMIT_INSTR_PLUS_ICEBP vpsubsw, XMM1, XMM2, XMM3 3211 EMIT_INSTR_PLUS_ICEBP vpsubsw, XMM1, XMM2, FSxBX 3212 EMIT_INSTR_PLUS_ICEBP vpsubsw, YMM1, YMM2, YMM3 3213 EMIT_INSTR_PLUS_ICEBP vpsubsw, YMM1, YMM2, FSxBX 3214 %if TMPL_BITS == 64 3215 EMIT_INSTR_PLUS_ICEBP psubsw, XMM8, XMM9 3216 EMIT_INSTR_PLUS_ICEBP psubsw, XMM8, FSxBX 3217 EMIT_INSTR_PLUS_ICEBP vpsubsw, XMM8, XMM9, XMM10 3218 EMIT_INSTR_PLUS_ICEBP vpsubsw, XMM8, XMM9, FSxBX 3219 EMIT_INSTR_PLUS_ICEBP vpsubsw, YMM8, YMM9, YMM10 3220 EMIT_INSTR_PLUS_ICEBP vpsubsw, YMM8, YMM9, FSxBX 3221 %endif 3222 3183 3223 %endif ; BS3_INSTANTIATING_CMN 3184 3224 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32
r100581 r100596 7930 7930 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 7931 7931 } 7932 7933 7934 /* 7935 * [V]PSUBSB/[V]PSUBSW - Subtract paced signed integers with signed saturation. 7936 */ 7937 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubsb_MM1_MM2_icebp); 7938 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubsb_MM1_FSxBX_icebp); 7939 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubsb_XMM1_XMM2_icebp); 7940 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubsb_XMM1_FSxBX_icebp); 7941 extern FNBS3FAR bs3CpuInstr3_psubsb_XMM8_XMM9_icebp_c64; 7942 extern FNBS3FAR bs3CpuInstr3_psubsb_XMM8_FSxBX_icebp_c64; 7943 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubsb_XMM1_XMM2_XMM3_icebp); 7944 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubsb_XMM1_XMM2_FSxBX_icebp); 7945 extern FNBS3FAR bs3CpuInstr3_vpsubsb_XMM8_XMM9_XMM10_icebp_c64; 7946 extern FNBS3FAR bs3CpuInstr3_vpsubsb_XMM8_XMM9_FSxBX_icebp_c64; 7947 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubsb_YMM1_YMM2_YMM3_icebp); 7948 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubsb_YMM1_YMM2_FSxBX_icebp); 7949 extern FNBS3FAR bs3CpuInstr3_vpsubsb_YMM8_YMM9_YMM10_icebp_c64; 7950 extern FNBS3FAR bs3CpuInstr3_vpsubsb_YMM8_YMM9_FSxBX_icebp_c64; 7951 7952 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubsw_MM1_MM2_icebp); 7953 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubsw_MM1_FSxBX_icebp); 7954 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubsw_XMM1_XMM2_icebp); 7955 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubsw_XMM1_FSxBX_icebp); 7956 extern FNBS3FAR bs3CpuInstr3_psubsw_XMM8_XMM9_icebp_c64; 7957 extern FNBS3FAR bs3CpuInstr3_psubsw_XMM8_FSxBX_icebp_c64; 7958 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubsw_XMM1_XMM2_XMM3_icebp); 7959 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubsw_XMM1_XMM2_FSxBX_icebp); 7960 extern FNBS3FAR bs3CpuInstr3_vpsubsw_XMM8_XMM9_XMM10_icebp_c64; 7961 extern FNBS3FAR bs3CpuInstr3_vpsubsw_XMM8_XMM9_FSxBX_icebp_c64; 7962 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubsw_YMM1_YMM2_YMM3_icebp); 7963 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubsw_YMM1_YMM2_FSxBX_icebp); 7964 extern FNBS3FAR bs3CpuInstr3_vpsubsw_YMM8_YMM9_YMM10_icebp_c64; 7965 extern FNBS3FAR bs3CpuInstr3_vpsubsw_YMM8_YMM9_FSxBX_icebp_c64; 7966 7967 BS3_DECL_FAR(uint8_t) bs3CpuInstr3_v_psubsb_psubsw(uint8_t bMode) 7968 { 7969 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues8[] = 7970 { 7971 { /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0), 7972 /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0), 7973 /* => */ RTUINT256_INIT_C(0, 0, 0, 0) }, 7974 { /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8), 7975 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 7976 /* => */ RTUINT256_INIT_C(0xc0c0c0c0c0c0c0c0, 0xc0c0c0c0c0c0c0c0, 0xc0c0c0c0c0c0c0c0, 0xc0c0c0c0c0c0c0c0) }, 7977 { /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 7978 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7979 /* => */ RTUINT256_INIT_C(0xd1d4ed829d7fbfbf, 0xbb688024da07174d, 0xd4dfba7f80807f21, 0x7f80ed807f800342) }, 7980 }; 7981 7982 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues16[] = 7983 { 7984 { /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0), 7985 /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0), 7986 /* => */ RTUINT256_INIT_C(0, 0, 0, 0) }, 7987 { /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8), 7988 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 7989 /* => */ RTUINT256_INIT_C(0xbfc0bfc0bfc0bfc0, 0xbfc0bfc0bfc0bfc0, 0xbfc0bfc0bfc0bfc0, 0xbfc0bfc0bfc0bfc0) }, 7990 { /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 7991 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7992 /* => */ RTUINT256_INIT_C(0xd1d4ed829c87bebf, 0xba688000da07164d, 0xd3dfb9b380007fff, 0x7fffed2d7fff0342) }, 7993 }; 7994 7995 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = 7996 { 7997 { bs3CpuInstr3_psubsb_MM1_MM2_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues8), s_aValues8 }, 7998 { bs3CpuInstr3_psubsb_MM1_FSxBX_icebp_c16, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 7999 { bs3CpuInstr3_psubsb_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8000 { bs3CpuInstr3_psubsb_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8001 { bs3CpuInstr3_vpsubsb_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8002 { bs3CpuInstr3_vpsubsb_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8003 { bs3CpuInstr3_vpsubsb_YMM1_YMM2_YMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8004 { bs3CpuInstr3_vpsubsb_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8005 8006 { bs3CpuInstr3_psubsw_MM1_MM2_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8007 { bs3CpuInstr3_psubsw_MM1_FSxBX_icebp_c16, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8008 { bs3CpuInstr3_psubsw_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8009 { bs3CpuInstr3_psubsw_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8010 { bs3CpuInstr3_vpsubsw_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8011 { bs3CpuInstr3_vpsubsw_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8012 { bs3CpuInstr3_vpsubsw_YMM1_YMM2_YMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8013 { bs3CpuInstr3_vpsubsw_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8014 }; 8015 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = 8016 { 8017 { bs3CpuInstr3_psubsb_MM1_MM2_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8018 { bs3CpuInstr3_psubsb_MM1_FSxBX_icebp_c32, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8019 { bs3CpuInstr3_psubsb_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8020 { bs3CpuInstr3_psubsb_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8021 { bs3CpuInstr3_vpsubsb_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8022 { bs3CpuInstr3_vpsubsb_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8023 { bs3CpuInstr3_vpsubsb_YMM1_YMM2_YMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8024 { bs3CpuInstr3_vpsubsb_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8025 8026 { bs3CpuInstr3_psubsw_MM1_MM2_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8027 { bs3CpuInstr3_psubsw_MM1_FSxBX_icebp_c32, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8028 { bs3CpuInstr3_psubsw_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8029 { bs3CpuInstr3_psubsw_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8030 { bs3CpuInstr3_vpsubsw_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8031 { bs3CpuInstr3_vpsubsw_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8032 { bs3CpuInstr3_vpsubsw_YMM1_YMM2_YMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8033 { bs3CpuInstr3_vpsubsw_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8034 }; 8035 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = 8036 { 8037 { bs3CpuInstr3_psubsb_MM1_MM2_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8038 { bs3CpuInstr3_psubsb_MM1_FSxBX_icebp_c64, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8039 { bs3CpuInstr3_psubsb_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8040 { bs3CpuInstr3_psubsb_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8041 { bs3CpuInstr3_psubsb_XMM8_XMM9_icebp_c64, 255, RM_REG, T_SSE2, 8, 8, 9, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8042 { bs3CpuInstr3_psubsb_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 8, 8, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8043 { bs3CpuInstr3_vpsubsb_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8044 { bs3CpuInstr3_vpsubsb_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8045 { bs3CpuInstr3_vpsubsb_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8046 { bs3CpuInstr3_vpsubsb_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8047 { bs3CpuInstr3_vpsubsb_YMM1_YMM2_YMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8048 { bs3CpuInstr3_vpsubsb_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8049 { bs3CpuInstr3_vpsubsb_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8050 { bs3CpuInstr3_vpsubsb_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues8), s_aValues8 }, 8051 8052 { bs3CpuInstr3_psubsw_MM1_MM2_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8053 { bs3CpuInstr3_psubsw_MM1_FSxBX_icebp_c64, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8054 { bs3CpuInstr3_psubsw_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8055 { bs3CpuInstr3_psubsw_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8056 { bs3CpuInstr3_psubsw_XMM8_XMM9_icebp_c64, 255, RM_REG, T_SSE2, 8, 8, 9, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8057 { bs3CpuInstr3_psubsw_XMM8_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 8, 8, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8058 { bs3CpuInstr3_vpsubsw_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8059 { bs3CpuInstr3_vpsubsw_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8060 { bs3CpuInstr3_vpsubsw_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8061 { bs3CpuInstr3_vpsubsw_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8062 { bs3CpuInstr3_vpsubsw_YMM1_YMM2_YMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8063 { bs3CpuInstr3_vpsubsw_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8064 { bs3CpuInstr3_vpsubsw_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8065 { bs3CpuInstr3_vpsubsw_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8066 }; 8067 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); 8068 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 8069 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 8070 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 8071 } 8072 7932 8073 7933 8074 … … 12932 13073 { "vinserti128/vinsertf128", bs3CpuInstr3_vinserti128_vinsertf128, 0 }, 12933 13074 #endif 13075 #if defined (ALL_TESTS) 13076 { "[v]psubsb/[v]psubsw", bs3CpuInstr3_v_psubsb_psubsw, 0 }, 13077 #endif 12934 13078 }; 12935 13079 Bs3TestInit("bs3-cpu-instr-3");
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