VirtualBox

Changeset 100701 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Jul 25, 2023 9:47:02 PM (17 months ago)
Author:
vboxsync
Message:

VMM/IEM: More IEM_CIMPL_F_XXX stuff. bugref:10369

Location:
trunk/src/VBox/VMM
Files:
5 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsOneByte.cpp.h

    r100623 r100701  
    791791    IEMOP_HLP_NO_64BIT();
    792792    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    793     IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_END_TB/*?*/,
     793    IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_END_TB/*?*/,
    794794                                iemCImpl_pop_Sreg, X86_SREG_CS, pVCpu->iem.s.enmEffOpSize);
    795795}
    … …  
    56565656    uint16_t u16Sel;  IEM_OPCODE_GET_NEXT_U16(&u16Sel);
    56575657    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    5658     IEM_MC_DEFER_TO_CIMPL_3_RET(IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_MODE | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
     5658    IEM_MC_DEFER_TO_CIMPL_3_RET(IEM_CIMPL_F_BRANCH_UNCOND | IEM_CIMPL_F_MODE | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
    56595659                                iemCImpl_callf, u16Sel, off32Seg, pVCpu->iem.s.enmEffOpSize);
    56605660}
    … …  
    71777177    {
    71787178        case IEMMODE_16BIT:
    7179             IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH, iemCImpl_retn_iw_16, u16Imm);
     7179            IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_retn_iw_16, u16Imm);
    71807180        case IEMMODE_32BIT:
    7181             IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH, iemCImpl_retn_iw_32, u16Imm);
     7181            IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_retn_iw_32, u16Imm);
    71827182        case IEMMODE_64BIT:
    7183             IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH, iemCImpl_retn_iw_64, u16Imm);
     7183            IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_retn_iw_64, u16Imm);
    71847184        IEM_NOT_REACHED_DEFAULT_CASE_RET();
    71857185    }
    … …  
    71987198    {
    71997199        case IEMMODE_16BIT:
    7200             IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_BRANCH, iemCImpl_retn_16);
     7200            IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_retn_16);
    72017201        case IEMMODE_32BIT:
    7202             IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_BRANCH, iemCImpl_retn_32);
     7202            IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_retn_32);
    72037203        case IEMMODE_64BIT:
    7204             IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_BRANCH, iemCImpl_retn_64);
     7204            IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_retn_64);
    72057205        IEM_NOT_REACHED_DEFAULT_CASE_RET();
    72067206    }
    … …  
    74867486    uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
    74877487    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    7488     IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH, iemCImpl_retf, pVCpu->iem.s.enmEffOpSize, u16Imm);
     7488    IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_retf, pVCpu->iem.s.enmEffOpSize, u16Imm);
    74897489}
    74907490
    … …  
    74977497    IEMOP_MNEMONIC(retf, "retf");
    74987498    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    7499     IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH, iemCImpl_retf, pVCpu->iem.s.enmEffOpSize, 0);
     7499    IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_retf, pVCpu->iem.s.enmEffOpSize, 0);
    75007500}
    75017501
    … …  
    75087508    IEMOP_MNEMONIC(int3, "int3");
    75097509    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    7510     IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_RFLAGS,
     7510    IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_RFLAGS,
    75117511                                iemCImpl_int, X86_XCPT_BP, IEMINT_INT3);
    75127512}
    … …  
    75217521    uint8_t u8Int; IEM_OPCODE_GET_NEXT_U8(&u8Int);
    75227522    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    7523     IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_RFLAGS,
     7523    IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_RFLAGS,
    75247524                                iemCImpl_int, u8Int, IEMINT_INTN);
    75257525}
    … …  
    75337533    IEMOP_MNEMONIC(into, "into");
    75347534    IEMOP_HLP_NO_64BIT();
    7535     IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_RFLAGS,
     7535    IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_BRANCH_COND | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_RFLAGS,
    75367536                                iemCImpl_int, X86_XCPT_OF, IEMINT_INTO);
    75377537}
    … …  
    75457545    IEMOP_MNEMONIC(iret, "iret");
    75467546    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    7547     IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
     7547    IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
    75487548                                iemCImpl_iret, pVCpu->iem.s.enmEffOpSize);
    75497549}
    … …  
    1146611466        {
    1146711467            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
    11468             IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH, iemCImpl_call_rel_16, (int16_t)u16Imm);
     11468            IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH_UNCOND, iemCImpl_call_rel_16, (int16_t)u16Imm);
    1146911469        }
    1147011470
    … …  
    1147211472        {
    1147311473            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
    11474             IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH, iemCImpl_call_rel_32, (int32_t)u32Imm);
     11474            IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH_UNCOND, iemCImpl_call_rel_32, (int32_t)u32Imm);
    1147511475        }
    1147611476
    … …  
    1147811478        {
    1147911479            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
    11480             IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH, iemCImpl_call_rel_64, u64Imm);
     11480            IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_BRANCH_UNCOND, iemCImpl_call_rel_64, u64Imm);
    1148111481        }
    1148211482
    … …  
    1153511535    uint16_t u16Sel;  IEM_OPCODE_GET_NEXT_U16(&u16Sel);
    1153611536    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    11537     IEM_MC_DEFER_TO_CIMPL_3_RET(IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_MODE | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
     11537    IEM_MC_DEFER_TO_CIMPL_3_RET(IEM_CIMPL_F_BRANCH_UNCOND | IEM_CIMPL_F_MODE | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
    1153811538                                iemCImpl_FarJmp, u16Sel, off32Seg, pVCpu->iem.s.enmEffOpSize);
    1153911539}
    … …  
    1162111621    IEMOP_HLP_MIN_386();
    1162211622    /** @todo testcase! */
    11623     IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_RFLAGS,
     11623    IEM_MC_DEFER_TO_CIMPL_2_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_RFLAGS,
    1162411624                                iemCImpl_int, X86_XCPT_DB, IEMINT_INT1);
    1162511625}
    … …  
    1261212612                IEM_MC_ARG(uint16_t, u16Target, 0);
    1261312613                IEM_MC_FETCH_GREG_U16(u16Target, IEM_GET_MODRM_RM(pVCpu, bRm));
    12614                 IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH, iemCImpl_call_16, u16Target);
     12614                IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_call_16, u16Target);
    1261512615                IEM_MC_END();
    1261612616                break;
    … …  
    1262012620                IEM_MC_ARG(uint32_t, u32Target, 0);
    1262112621                IEM_MC_FETCH_GREG_U32(u32Target, IEM_GET_MODRM_RM(pVCpu, bRm));
    12622                 IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH, iemCImpl_call_32, u32Target);
     12622                IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_call_32, u32Target);
    1262312623                IEM_MC_END();
    1262412624                break;
    … …  
    1262812628                IEM_MC_ARG(uint64_t, u64Target, 0);
    1262912629                IEM_MC_FETCH_GREG_U64(u64Target, IEM_GET_MODRM_RM(pVCpu, bRm));
    12630                 IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH, iemCImpl_call_64, u64Target);
     12630                IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_call_64, u64Target);
    1263112631                IEM_MC_END();
    1263212632                break;
    … …  
    1264712647                IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    1264812648                IEM_MC_FETCH_MEM_U16(u16Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
    12649                 IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH, iemCImpl_call_16, u16Target);
     12649                IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_call_16, u16Target);
    1265012650                IEM_MC_END();
    1265112651                break;
    … …  
    1265812658                IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    1265912659                IEM_MC_FETCH_MEM_U32(u32Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
    12660                 IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH, iemCImpl_call_32, u32Target);
     12660                IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_call_32, u32Target);
    1266112661                IEM_MC_END();
    1266212662                break;
    … …  
    1266912669                IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    1267012670                IEM_MC_FETCH_MEM_U64(u64Target, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
    12671                 IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH, iemCImpl_call_64, u64Target);
     12671                IEM_MC_CALL_CIMPL_1(IEM_CIMPL_F_BRANCH_INDIR, iemCImpl_call_64, u64Target);
    1267212672                IEM_MC_END();
    1267312673                break;
    … …  
    1270512705            IEM_MC_FETCH_MEM_U16(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \
    1270612706            IEM_MC_FETCH_MEM_U16_DISP(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 2); \
    12707             IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_MODE | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT, \
     12707            IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_MODE | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT, \
    1270812708                                a_fnCImpl, u16Sel, offSeg, enmEffOpSize); \
    1270912709            IEM_MC_END(); \
    … …  
    1272012720            IEM_MC_FETCH_MEM_U32(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \
    1272112721            IEM_MC_FETCH_MEM_U16_DISP(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 4); \
    12722             IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_MODE | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT, \
     12722            IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_MODE | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT, \
    1272312723                                a_fnCImpl, u16Sel, offSeg, enmEffOpSize); \
    1272412724            IEM_MC_END(); \
    … …  
    1273612736            IEM_MC_FETCH_MEM_U64(offSeg, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \
    1273712737            IEM_MC_FETCH_MEM_U16_DISP(u16Sel, pVCpu->iem.s.iEffSeg, GCPtrEffSrc, 8); \
    12738             IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_MODE /* no gates */, \
     12738            IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_MODE /* no gates */, \
    1273912739                                a_fnCImpl, u16Sel, offSeg, enmEffOpSize); \
    1274012740            IEM_MC_END(); \

  • trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h

    r100266 r100701  
    14141414    IEMOP_HLP_VMX_INSTR("vmlaunch", kVmxVDiag_Vmentry);
    14151415    IEMOP_HLP_DONE_DECODING();
    1416     IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
     1416    IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
    14171417                                iemCImpl_vmlaunch);
    14181418}
    … …  
    14341434    IEMOP_HLP_VMX_INSTR("vmresume", kVmxVDiag_Vmentry);
    14351435    IEMOP_HLP_DONE_DECODING();
    1436     IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
     1436    IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
    14371437                                iemCImpl_vmresume);
    14381438}
    … …  
    15721572    IEMOP_MNEMONIC(vmrun, "vmrun");
    15731573    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); /** @todo check prefix effect on the SVM instructions. ASSUMING no lock for now. */
    1574     IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
     1574    IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT,
    15751575                                iemCImpl_vmrun);
    15761576}
    … …  
    19561956    IEMOP_MNEMONIC(syscall, "syscall"); /** @todo 286 LOADALL   */
    19571957    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    1958     IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_END_TB,
     1958    IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_END_TB,
    19591959                                iemCImpl_syscall);
    19601960}
    … …  
    19751975    IEMOP_MNEMONIC(sysret, "sysret");  /** @todo 386 LOADALL   */
    19761976    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    1977     IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_END_TB,
     1977    IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_END_TB,
    19781978                                iemCImpl_sysret, pVCpu->iem.s.enmEffOpSize);
    19791979}
    … …  
    51745174    IEMOP_MNEMONIC0(FIXED, SYSENTER, sysenter, DISOPTYPE_CONTROLFLOW | DISOPTYPE_UNCOND_CONTROLFLOW, 0);
    51755175    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    5176     IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_END_TB,
     5176    IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_END_TB,
    51775177                                iemCImpl_sysenter);
    51785178}
    … …  
    51835183    IEMOP_MNEMONIC0(FIXED, SYSEXIT, sysexit, DISOPTYPE_CONTROLFLOW | DISOPTYPE_UNCOND_CONTROLFLOW, 0);
    51845184    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    5185     IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_END_TB,
     5185    IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_END_TB,
    51865186                                iemCImpl_sysexit, pVCpu->iem.s.enmEffOpSize);
    51875187}
    … …  
    95929592    IEMOP_HLP_MIN_386(); /* 386SL and later. */
    95939593    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    9594     IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_END_TB,
     9594    IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_INDIR | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_END_TB,
    95959595                                iemCImpl_rsm);
    95969596}

  • trunk/src/VBox/VMM/VMMAll/IEMAllThreadedPython.py

    r100694 r100701  
    199199    kdCImplFlags = {
    200200        'IEM_CIMPL_F_MODE':             True,
    201         'IEM_CIMPL_F_BRANCH':           False,
     201        'IEM_CIMPL_F_BRANCH_UNCOND':    False,
     202        'IEM_CIMPL_F_BRANCH_COND':      False,
     203        'IEM_CIMPL_F_BRANCH_INDIR':     True,
    202204        'IEM_CIMPL_F_RFLAGS':           False,
    203205        'IEM_CIMPL_F_STATUS_FLAGS':     False,
    … …  
    511513        collecting these in self.dsCImplFlags.
    512514        """
     515        fSeenConditional = False;
    513516        for oStmt in aoStmts:
    514517            # Pick up hints from CIMPL calls and deferals.
    … …  
    523526                            self.raiseProblem('Unknown CIMPL flag value: %s' % (sFlag,));
    524527
     528            # Check for conditional so we can categorize any branches correctly.
     529            if (   oStmt.sName.startswith('IEM_MC_IF_')
     530                or oStmt.sName == 'IEM_MC_ENDIF'):
     531                fSeenConditional = True;
     532
    525533            # Set IEM_IMPL_C_F_BRANCH if we see any branching MCs.
    526             if (   oStmt.sName.startswith('IEM_MC_SET_RIP')
    527                 or oStmt.sName.startswith('IEM_MC_REL_JMP')):
    528                 self.dsCImplFlags['IEM_CIMPL_F_BRANCH'] = True;
     534            elif oStmt.sName.startswith('IEM_MC_SET_RIP'):
     535                assert not fSeenConditional;
     536                self.dsCImplFlags['IEM_CIMPL_F_BRANCH_INDIR'] = True;
     537            elif oStmt.sName.startswith('IEM_MC_REL_JMP'):
     538                if fSeenConditional:
     539                    self.dsCImplFlags['IEM_CIMPL_F_BRANCH_COND'] = True;
     540                else:
     541                    self.dsCImplFlags['IEM_CIMPL_F_BRANCH_UNCOND'] = True;
    529542
    530543            # Process branches of conditionals recursively.
    … …  
    884897        sCode += ');';
    885898
     899        sCImplFlags = ' | '.join(self.dsCImplFlags.keys());
     900        if not sCImplFlags:
     901            sCImplFlags = '0'
     902
    886903        aoStmts = [
    887904            iai.McCppGeneric('IEM_MC2_BEGIN_EMIT_CALLS();', cchIndent = cchIndent), # Scope and a hook for various stuff.
    … …  
    895912                                            cchIndent = cchIndent));
    896913
    897         aoStmts.append(iai.McCppGeneric('IEM_MC2_END_EMIT_CALLS();', cchIndent = cchIndent)); # For closing the scope.
     914        aoStmts.append(iai.McCppGeneric('IEM_MC2_END_EMIT_CALLS(' + sCImplFlags + ');',
     915                                        cchIndent = cchIndent)); # For closing the scope.
    898916        return aoStmts;
    899917
    … …  
    10841102            for oVar in self.aoVariations:
    10851103                dsCImplFlags.update(oVar.dsCImplFlags);
    1086             if (   'IEM_CIMPL_F_BRANCH' in dsCImplFlags
    1087                 or 'IEM_CIMPL_F_MODE'   in dsCImplFlags
    1088                 or 'IEM_CIMPL_F_REP'    in dsCImplFlags):
     1104            if (   'IEM_CIMPL_F_BRANCH_UNCOND' in dsCImplFlags
     1105                or 'IEM_CIMPL_F_BRANCH_COND'   in dsCImplFlags
     1106                or 'IEM_CIMPL_F_BRANCH_INDIR'  in dsCImplFlags
     1107                or 'IEM_CIMPL_F_MODE'          in dsCImplFlags
     1108                or 'IEM_CIMPL_F_REP'           in dsCImplFlags):
    10891109                aoDecoderStmts.append(iai.McCppGeneric('pVCpu->iem.s.fEndTb = true;'));
    10901110

  • trunk/src/VBox/VMM/VMMAll/IEMAllThreadedRecompiler.cpp

    r100697 r100701  
    225225    } while (0)
    226226
    227 #define IEM_MC2_END_EMIT_CALLS() \
     227#define IEM_MC2_END_EMIT_CALLS(a_fCImplFlags) \
    228228        Assert(pTb->cInstructions <= pTb->Thrd.cCalls); \
    229229        if (pTb->cInstructions < 255) \
    230230            pTb->cInstructions++; \
     231        uint32_t const fCImplFlagsMc2 = (a_fCImplFlags); \
     232        RT_NOREF(fCImplFlagsMc2); \
    231233    } while (0)
    232234

  • trunk/src/VBox/VMM/include/IEMMc.h

    r100591 r100701  
    12301230/** @name IEM_CIMPL_F_XXX - State change clues for CIMPL calls.
    12311231 *
    1232  * These clues are mainly for the recompiler, so that it can
     1232 * These clues are mainly for the recompiler, so that it can emit correct code.
     1233 *
     1234 * They are processed by the python script and which also automatically
     1235 * calculates flags for MC blocks based on the statements, extending the use of
     1236 * these flags to describe MC block behavior to the recompiler core.  The python
     1237 * script pass the flags to the IEM_MC2_END_EMIT_CALLS macro, but mainly for
     1238 * error checking purposes.  The script emits the necessary fEndTb = true and
     1239 * similar statements as this reduces compile time a tiny bit.
    12331240 *
    12341241 * @{ */
    1235 #define IEM_CIMPL_F_MODE            RT_BIT_32(0)    /**< Execution flags may change (IEMCPU::fExec). */
    1236 #define IEM_CIMPL_F_BRANCH          RT_BIT_32(1)    /**< Branches (changes RIP, maybe CS). */
    1237 #define IEM_CIMPL_F_RFLAGS          RT_BIT_32(2)    /**< May change significant portions of RFLAGS. */
    1238 #define IEM_CIMPL_F_STATUS_FLAGS    RT_BIT_32(3)    /**< May change the status bits (X86_EFL_STATUS_BITS) in RFLAGS . */
    1239 #define IEM_CIMPL_F_VMEXIT          RT_BIT_32(4)    /**< May trigger a VM exit. */
    1240 #define IEM_CIMPL_F_FPU             RT_BIT_32(5)    /**< May modify FPU state. */
    1241 #define IEM_CIMPL_F_REP             RT_BIT_32(6)    /**< REP prefixed instruction which may yield before updating PC. */
    1242 #define IEM_CIMPL_F_END_TB          RT_BIT_32(7)
     1242/** Execution flags may change (IEMCPU::fExec). */
     1243#define IEM_CIMPL_F_MODE            RT_BIT_32(0)
     1244/** Unconditional direct branches (changes RIP, maybe CS). */
     1245#define IEM_CIMPL_F_BRANCH_UNCOND   RT_BIT_32(1)
     1246/** Conditional direct branch (may change RIP, maybe CS). */
     1247#define IEM_CIMPL_F_BRANCH_COND     RT_BIT_32(2)
     1248/** Indirect unconditional branch (changes RIP, maybe CS).
     1249 *
     1250 * This is used for all system control transfers (SYSCALL, SYSRET, INT, ++) as
     1251 * well as for return instructions (RET, IRET, RETF).
     1252 *
     1253 * Since the INTO instruction is currently the only indirect branch instruction
     1254 * that is conditional (depends on the overflow flag), that instruction will
     1255 * have both IEM_CIMPL_F_BRANCH_INDIR and IEM_CIMPL_F_BRANCH_COND set.  All
     1256 * other branch instructions will have exactly one of the branch flags set. */
     1257#define IEM_CIMPL_F_BRANCH_INDIR    RT_BIT_32(3)
     1258/** May change significant portions of RFLAGS. */
     1259#define IEM_CIMPL_F_RFLAGS          RT_BIT_32(4)
     1260/** May change the status bits (X86_EFL_STATUS_BITS) in RFLAGS . */
     1261#define IEM_CIMPL_F_STATUS_FLAGS    RT_BIT_32(5)
     1262/** May trigger a VM exit. */
     1263#define IEM_CIMPL_F_VMEXIT          RT_BIT_32(6)
     1264/** May modify FPU state. */
     1265#define IEM_CIMPL_F_FPU             RT_BIT_32(7)
     1266/** REP prefixed instruction which may yield before updating PC. */
     1267#define IEM_CIMPL_F_REP             RT_BIT_32(8)
     1268/** Force end of TB after the instruction.    */
     1269#define IEM_CIMPL_F_END_TB          RT_BIT_32(9)
    12431270/** Convenience: Raise exception (technically unnecessary, since it shouldn't return VINF_SUCCESS). */
    1244 #define IEM_CIMPL_F_XCPT            (IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT)
     1271#define IEM_CIMPL_F_XCPT            (IEM_CIMPL_F_MODE | IEM_CIMPL_F_BRANCH_UNCOND | IEM_CIMPL_F_RFLAGS | IEM_CIMPL_F_VMEXIT)
     1272/** Convenience: Testing any kind of branch. */
     1273#define IEM_CIMPL_F_BRANCH_ANY      (IEM_CIMPL_F_BRANCH_UNCOND | IEM_CIMPL_F_BRANCH_COND | IEM_CIMPL_F_BRANCH_INDIR)
    12451274/** @} */
    12461275
    … …  
    12591288        if (rcStrictHlp == VINF_SUCCESS) \
    12601289        { \
    1261             AssertMsg(   ((a_fFlags) & IEM_CIMPL_F_BRANCH) \
     1290            AssertMsg(   ((a_fFlags) & IEM_CIMPL_F_BRANCH_ANY) \
    12621291                      || (   uRipBefore + cbInstr == pVCpu->cpum.GstCtx.rip \
    12631292                          && uCsBefore            == pVCpu->cpum.GstCtx.cs.Sel) \
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