- Timestamp:
- Jul 28, 2023 8:17:21 AM (21 months ago)
- svn:sync-xref-src-repo-rev:
- 158583
- Location:
- trunk
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/cpumctx-armv8.h
r100723 r100724 119 119 #ifndef VBOX_FOR_DTRACE_LIB 120 120 AssertCompileSize(CPUMCTXSYSREG, 8); 121 #endif 121 122 122 123 … … 137 138 /** Pointer to a const debug register state. */ 138 139 typedef const CPUMCTXSYSREGDBG *PCCPUMCTXSYSREGDBG; 140 #ifndef VBOX_FOR_DTRACE_LIB 141 AssertCompileSize(CPUMCTXSYSREGDBG, 16); 142 #endif 143 144 145 /** 146 * A pointer authentication key register state (low and high), these are held together 147 * because they will be accessed together very often and thus minimizes 148 * stress on the cache. 149 */ 150 typedef struct CPUMCTXSYSREGPAKEY 151 { 152 /** The low key register. */ 153 CPUMCTXSYSREG Low; 154 /** The high key register. */ 155 CPUMCTXSYSREG High; 156 } CPUMCTXSYSREGPAKEY; 157 /** Pointer to a pointer authentication key register state. */ 158 typedef CPUMCTXSYSREGPAKEY *PCPUMCTXSYSREGPAKEY; 159 /** Pointer to a const pointer authentication key register state. */ 160 typedef const CPUMCTXSYSREGPAKEY *PCCPUMCTXSYSREGPAKEY; 161 #ifndef VBOX_FOR_DTRACE_LIB 162 AssertCompileSize(CPUMCTXSYSREGPAKEY, 16); 139 163 #endif 140 164 … … 167 191 /** The VBAR_EL1 register. */ 168 192 CPUMCTXSYSREG VBar; 169 /** Breakpoint registers, DBGB{C,V} <n>_EL1. */193 /** Breakpoint registers, DBGB{C,V}n_EL1. */ 170 194 CPUMCTXSYSREGDBG aBp[16]; 171 /** Watchpoint registers, DBGW{C,V} <n>_EL1. */195 /** Watchpoint registers, DBGW{C,V}n_EL1. */ 172 196 CPUMCTXSYSREGDBG aWp[16]; 197 /** APDA key register state. */ 198 CPUMCTXSYSREGPAKEY Apda; 199 /** APDB key register state. */ 200 CPUMCTXSYSREGPAKEY Apdb; 201 /** APGA key register state. */ 202 CPUMCTXSYSREGPAKEY Apga; 203 /** APIA key register state. */ 204 CPUMCTXSYSREGPAKEY Apia; 205 /** APIB key register state. */ 206 CPUMCTXSYSREGPAKEY Apib; 173 207 174 208 /** Floating point control register. */ … … 194 228 uint64_t CntvCValEl0; 195 229 196 uint64_t au64Padding2[ 6];230 uint64_t au64Padding2[4]; 197 231 } CPUMCTX; 198 232 … … 257 291 /** Debug system registers are kept externally. */ 258 292 #define CPUMCTX_EXTRN_SYSREG_DEBUG UINT64_C(0x0000000000010000) 293 /** PAuth key system registers are kept externally. */ 294 #define CPUMCTX_EXTRN_SYSREG_PAUTH_KEYS UINT64_C(0x0000000000020000) 259 295 /** Various system registers (rarely accessed) are kept externally. */ 260 #define CPUMCTX_EXTRN_SYSREG_MISC UINT64_C(0x00000000000 20000)296 #define CPUMCTX_EXTRN_SYSREG_MISC UINT64_C(0x0000000000040000) 261 297 262 298 /** Mask of bits the keepers can use for state tracking. */ -
trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin-armv8.cpp
r100723 r100724 219 219 CPUM_DBGREG_EMIT(W, 15) 220 220 #undef CPUM_DBGREG_EMIT 221 }; 222 /** PAuth key system registers. */ 223 static const struct 224 { 225 hv_sys_reg_t enmHvReg; 226 uint32_t offCpumCtx; 227 } s_aCpumPAuthKeyRegs[] = 228 { 229 { HV_SYS_REG_APDAKEYLO_EL1, RT_UOFFSETOF(CPUMCTX, Apda.Low.u64) }, 230 { HV_SYS_REG_APDAKEYHI_EL1, RT_UOFFSETOF(CPUMCTX, Apda.High.u64) }, 231 { HV_SYS_REG_APDBKEYLO_EL1, RT_UOFFSETOF(CPUMCTX, Apdb.Low.u64) }, 232 { HV_SYS_REG_APDBKEYHI_EL1, RT_UOFFSETOF(CPUMCTX, Apdb.High.u64) }, 233 { HV_SYS_REG_APGAKEYLO_EL1, RT_UOFFSETOF(CPUMCTX, Apga.Low.u64) }, 234 { HV_SYS_REG_APGAKEYHI_EL1, RT_UOFFSETOF(CPUMCTX, Apga.High.u64) }, 235 { HV_SYS_REG_APIAKEYLO_EL1, RT_UOFFSETOF(CPUMCTX, Apia.Low.u64) }, 236 { HV_SYS_REG_APIAKEYHI_EL1, RT_UOFFSETOF(CPUMCTX, Apia.High.u64) }, 237 { HV_SYS_REG_APIBKEYLO_EL1, RT_UOFFSETOF(CPUMCTX, Apib.Low.u64) }, 238 { HV_SYS_REG_APIBKEYHI_EL1, RT_UOFFSETOF(CPUMCTX, Apib.High.u64) } 221 239 }; 222 240 /** System registers. */ … … 569 587 570 588 if ( hrc == HV_SUCCESS 589 && (fWhat & CPUMCTX_EXTRN_SYSREG_PAUTH_KEYS)) 590 { 591 /* Debug registers. */ 592 for (uint32_t i = 0; i < RT_ELEMENTS(s_aCpumPAuthKeyRegs); i++) 593 { 594 uint64_t *pu64 = (uint64_t *)((uint8_t *)&pVCpu->cpum.GstCtx + s_aCpumPAuthKeyRegs[i].offCpumCtx); 595 hrc |= hv_vcpu_get_sys_reg(pVCpu->nem.s.hVCpu, s_aCpumPAuthKeyRegs[i].enmHvReg, pu64); 596 } 597 } 598 599 if ( hrc == HV_SUCCESS 571 600 && (fWhat & (CPUMCTX_EXTRN_SPSR | CPUMCTX_EXTRN_ELR | CPUMCTX_EXTRN_SP | CPUMCTX_EXTRN_SCTLR_TCR_TTBR | CPUMCTX_EXTRN_SYSREG_MISC))) 572 601 { … … 645 674 uint64_t *pu64 = (uint64_t *)((uint8_t *)&pVCpu->cpum.GstCtx + s_aCpumDbgRegs[i].offCpumCtx); 646 675 hrc |= hv_vcpu_set_sys_reg(pVCpu->nem.s.hVCpu, s_aCpumDbgRegs[i].enmHvReg, *pu64); 676 } 677 } 678 679 if ( hrc == HV_SUCCESS 680 && !(pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_SYSREG_PAUTH_KEYS)) 681 { 682 /* Debug registers. */ 683 for (uint32_t i = 0; i < RT_ELEMENTS(s_aCpumPAuthKeyRegs); i++) 684 { 685 uint64_t *pu64 = (uint64_t *)((uint8_t *)&pVCpu->cpum.GstCtx + s_aCpumPAuthKeyRegs[i].offCpumCtx); 686 hrc |= hv_vcpu_set_sys_reg(pVCpu->nem.s.hVCpu, s_aCpumPAuthKeyRegs[i].enmHvReg, *pu64); 647 687 } 648 688 }
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