- Timestamp:
- Jul 31, 2023 12:58:14 PM (19 months ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Serial/DevPL011.cpp
r100168 r100749 1347 1347 1348 1348 /** 1349 * Saves the given FIFO. 1350 * 1351 * @returns VBox status code. 1352 * @param pHlp The device helper table. 1353 * @param pFifo The FIFO to save. 1354 * @param pSSM The saved state handle to save the state to. 1355 */ 1356 static int pl011R3FifoSaveExec(PCPDMDEVHLPR3 pHlp, PPL011FIFO pFifo, PSSMHANDLE pSSM) 1357 { 1358 pHlp->pfnSSMPutU8(pSSM, pFifo->cbMax); 1359 pHlp->pfnSSMPutU8(pSSM, pFifo->cbUsed); 1360 pHlp->pfnSSMPutU8(pSSM, pFifo->offWrite); 1361 pHlp->pfnSSMPutU8(pSSM, pFifo->offRead); 1362 pHlp->pfnSSMPutU8(pSSM, pFifo->cbItl); 1363 return pHlp->pfnSSMPutMem(pSSM, &pFifo->abBuf[0], sizeof(pFifo->abBuf)); 1364 } 1365 1366 1367 /** 1368 * Loads the given FIFO. 1369 * 1370 * @returns VBox status code. 1371 * @param pHlp The device helper table. 1372 * @param pFifo The FIFO to load. 1373 * @param pSSM The saved state handle to load the state from. 1374 */ 1375 static int pl011R3FifoLoadExec(PCPDMDEVHLPR3 pHlp, PPL011FIFO pFifo, PSSMHANDLE pSSM) 1376 { 1377 pHlp->pfnSSMGetU8(pSSM, &pFifo->cbMax); 1378 pHlp->pfnSSMGetU8(pSSM, &pFifo->cbUsed); 1379 pHlp->pfnSSMGetU8(pSSM, &pFifo->offWrite); 1380 pHlp->pfnSSMGetU8(pSSM, &pFifo->offRead); 1381 pHlp->pfnSSMGetU8(pSSM, &pFifo->cbItl); 1382 int rc = pHlp->pfnSSMGetMem(pSSM, &pFifo->abBuf[0], sizeof(pFifo->abBuf)); 1383 if (RT_FAILURE(rc)) 1384 return rc; 1385 1386 AssertReturn ( pFifo->cbMax <= sizeof(pFifo->abBuf) 1387 && pFifo->cbUsed <= sizeof(pFifo->abBuf) 1388 && pFifo->offWrite < sizeof(pFifo->abBuf) 1389 && pFifo->offRead < sizeof(pFifo->abBuf) 1390 && pFifo->cbItl <= sizeof(pFifo->abBuf), 1391 VERR_SSM_DATA_UNIT_FORMAT_CHANGED); 1392 return VINF_SUCCESS; 1393 } 1394 1395 1396 /** 1349 1397 * @callback_method_impl{FNSSMDEVSAVEEXEC} 1350 1398 */ … … 1354 1402 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 1355 1403 1356 pHlp->pfnSSMPutU16(pSSM, pThis->u16Irq); 1357 pHlp->pfnSSMPutGCPhys(pSSM, pThis->GCPhysMmioBase); 1404 /* The config. */ 1405 pl011R3LiveExec(pDevIns, pSSM, SSM_PASS_FINAL); 1406 1407 /* The state. */ 1408 pHlp->pfnSSMPutU8( pSSM, pThis->uRegDr); 1409 pHlp->pfnSSMPutU8( pSSM, pThis->uRegDrRd); 1410 pHlp->pfnSSMPutU16(pSSM, pThis->uRegCr); 1411 pHlp->pfnSSMPutU16(pSSM, pThis->uRegFr); 1412 pHlp->pfnSSMPutU16(pSSM, pThis->uRegIbrd); 1413 pHlp->pfnSSMPutU16(pSSM, pThis->uRegFbrd); 1414 pHlp->pfnSSMPutU16(pSSM, pThis->uRegLcrH); 1415 pHlp->pfnSSMPutU16(pSSM, pThis->uRegFifoLvlSel); 1416 pHlp->pfnSSMPutU16(pSSM, pThis->uRegIrqMask); 1417 pHlp->pfnSSMPutU16(pSSM, pThis->uRegIrqSts); 1418 1419 int rc = pl011R3FifoSaveExec(pHlp, &pThis->FifoXmit, pSSM); 1420 if (RT_SUCCESS(rc)) 1421 rc =pl011R3FifoSaveExec(pHlp, &pThis->FifoRecv, pSSM); 1422 if (RT_SUCCESS(rc)) 1423 rc = PDMDevHlpTimerSave(pDevIns, pThis->hTimerTxUnconnected, pSSM); 1424 1425 if (RT_FAILURE(rc)) 1426 return rc; 1358 1427 1359 1428 return pHlp->pfnSSMPutU32(pSSM, UINT32_MAX); /* sanity/terminator */ … … 1368 1437 PDEVPL011 pThis = PDMDEVINS_2_DATA(pDevIns, PDEVPL011); 1369 1438 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 1370 uint16_t u16Irq; 1371 RTGCPHYS GCPhysMmioBase; 1372 int rc; 1373 1374 RT_NOREF(uVersion); 1375 1376 pHlp->pfnSSMGetU16( pSSM, &u16Irq); 1377 pHlp->pfnSSMGetGCPhys(pSSM, &GCPhysMmioBase); 1378 if (uPass == SSM_PASS_FINAL) 1379 { 1380 rc = VERR_NOT_IMPLEMENTED; 1381 AssertRCReturn(rc, rc); 1382 } 1383 1384 if (uPass == SSM_PASS_FINAL) 1385 { 1386 /* The marker. */ 1387 uint32_t u32; 1388 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 1389 AssertRCReturn(rc, rc); 1390 AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED); 1391 } 1392 1393 /* 1394 * Check the config. 1395 */ 1396 if ( pThis->u16Irq != u16Irq 1397 || pThis->GCPhysMmioBase != GCPhysMmioBase) 1398 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, 1399 N_("Config mismatch - saved Irq=%#x GCPhysMmioBase=%#RGp; configured Irq=%#x GCPhysMmioBase=%#RGp"), 1400 u16Irq, GCPhysMmioBase, pThis->u16Irq, pThis->GCPhysMmioBase); 1439 1440 if (uVersion != PL011_SAVED_STATE_VERSION) 1441 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION; 1442 1443 /* The config. */ 1444 uint16_t u16Irq; 1445 int rc = pHlp->pfnSSMGetU16(pSSM, &u16Irq); 1446 AssertRCReturn(rc, rc); 1447 if (u16Irq != pThis->u16Irq) 1448 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - u16Irq: saved=%#x config=%#x"), u16Irq, pThis->u16Irq); 1449 1450 RTGCPHYS GCPhysMmioBase; 1451 rc = pHlp->pfnSSMGetGCPhys(pSSM, &GCPhysMmioBase); 1452 AssertRCReturn(rc, rc); 1453 if (GCPhysMmioBase != pThis->GCPhysMmioBase) 1454 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - GCPhysMmioBase: saved=%RTiop config=%RTiop"), GCPhysMmioBase, pThis->GCPhysMmioBase); 1455 1456 if (uPass != SSM_PASS_FINAL) 1457 return VINF_SUCCESS; 1458 1459 /* The state. */ 1460 pHlp->pfnSSMGetU8( pSSM, &pThis->uRegDr); 1461 pHlp->pfnSSMGetU8( pSSM, &pThis->uRegDrRd); 1462 pHlp->pfnSSMGetU16(pSSM, &pThis->uRegCr); 1463 pHlp->pfnSSMGetU16(pSSM, &pThis->uRegFr); 1464 pHlp->pfnSSMGetU16(pSSM, &pThis->uRegIbrd); 1465 pHlp->pfnSSMGetU16(pSSM, &pThis->uRegFbrd); 1466 pHlp->pfnSSMGetU16(pSSM, &pThis->uRegLcrH); 1467 pHlp->pfnSSMGetU16(pSSM, &pThis->uRegFifoLvlSel); 1468 pHlp->pfnSSMGetU16(pSSM, &pThis->uRegIrqMask); 1469 pHlp->pfnSSMGetU16(pSSM, &pThis->uRegIrqSts); 1470 1471 rc = pl011R3FifoLoadExec(pHlp, &pThis->FifoXmit, pSSM); 1472 if (RT_SUCCESS(rc)) 1473 rc = pl011R3FifoLoadExec(pHlp, &pThis->FifoRecv, pSSM); 1474 if (RT_SUCCESS(rc)) 1475 rc = PDMDevHlpTimerLoad(pDevIns, pThis->hTimerTxUnconnected, pSSM); 1476 1477 /* The marker. */ 1478 uint32_t u32; 1479 rc = pHlp->pfnSSMGetU32(pSSM, &u32); 1480 AssertRCReturn(rc, rc); 1481 AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED); 1401 1482 1402 1483 return VINF_SUCCESS; … … 1412 1493 PDEVPL011CC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PDEVPL011CC); 1413 1494 1414 RT_NOREF(pThis, pThisCC, pSSM); 1415 return VERR_NOT_IMPLEMENTED; 1495 RT_NOREF(pSSM); 1496 1497 pl011R3ParamsUpdate(pDevIns, pThis, pThisCC); 1498 pl011IrqUpdate(pDevIns, pThis, pThisCC); 1499 1500 if (pThisCC->pDrvSerial) 1501 { 1502 /* Set the modem lines to reflect the current state. */ 1503 /** @todo */ 1504 int rc = VINF_SUCCESS; //pThisCC->pDrvSerial->pfnChgModemLines(pThisCC->pDrvSerial, 1505 // RT_BOOL(pThis->uRegMcr & UART_REG_MCR_RTS), 1506 // RT_BOOL(pThis->uRegMcr & UART_REG_MCR_DTR)); 1507 if (RT_FAILURE(rc)) 1508 LogRel(("PL011#%d: Failed to set modem lines with %Rrc during saved state load\n", 1509 pDevIns->iInstance, rc)); 1510 1511 uint32_t fStsLines = 0; 1512 rc = pThisCC->pDrvSerial->pfnQueryStsLines(pThisCC->pDrvSerial, &fStsLines); 1513 if (RT_SUCCESS(rc)) 1514 ;//uartR3StsLinesUpdate(pDevIns, pThis, pThisCC, fStsLines); 1515 else 1516 LogRel(("PL011#%d: Failed to query status line status with %Rrc during reset\n", 1517 pDevIns->iInstance, rc)); 1518 } 1519 1520 return VINF_SUCCESS; 1416 1521 } 1417 1522
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