Changeset 100777 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Aug 1, 2023 11:03:51 PM (18 months ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r100731 r100777 6931 6931 *pu8Dst = *pu8Src; 6932 6932 rc = iemMemCommitAndUnmap(pVCpu, (void *)pu8Src, IEM_ACCESS_DATA_R); 6933 Log9(("IEM RD byte %d|%RGv: %#04x\n", iSegReg, GCPtrMem, *pu8Dst)); 6933 6934 } 6934 6935 return rc; … … 6952 6953 uint8_t const bRet = *pu8Src; 6953 6954 iemMemCommitAndUnmapJmp(pVCpu, (void *)pu8Src, IEM_ACCESS_DATA_R); 6955 Log9(("IEM RD byte %d|%RGv: %#04x\n", iSegReg, GCPtrMem, bRet)); 6954 6956 return bRet; 6955 6957 } … … 6977 6979 *pu16Dst = *pu16Src; 6978 6980 rc = iemMemCommitAndUnmap(pVCpu, (void *)pu16Src, IEM_ACCESS_DATA_R); 6981 Log9(("IEM RD word %d|%RGv: %#06x\n", iSegReg, GCPtrMem, *pu16Dst)); 6979 6982 } 6980 6983 return rc; … … 6999 7002 uint16_t const u16Ret = *pu16Src; 7000 7003 iemMemCommitAndUnmapJmp(pVCpu, (void *)pu16Src, IEM_ACCESS_DATA_R); 7004 Log9(("IEM RD word %d|%RGv: %#06x\n", iSegReg, GCPtrMem, u16Ret)); 7001 7005 return u16Ret; 7002 7006 } … … 7024 7028 *pu32Dst = *pu32Src; 7025 7029 rc = iemMemCommitAndUnmap(pVCpu, (void *)pu32Src, IEM_ACCESS_DATA_R); 7030 Log9(("IEM RD dword %d|%RGv: %#010x\n", iSegReg, GCPtrMem, *pu32Dst)); 7026 7031 } 7027 7032 return rc; … … 7049 7054 *pu64Dst = *pu32Src; 7050 7055 rc = iemMemCommitAndUnmap(pVCpu, (void *)pu32Src, IEM_ACCESS_DATA_R); 7056 Log9(("IEM RD dword %d|%RGv: %#010RX64\n", iSegReg, GCPtrMem, *pu64Dst)); 7051 7057 } 7052 7058 return rc; … … 7071 7077 uint32_t const u32Ret = *pu32Src; 7072 7078 iemMemCommitAndUnmapJmp(pVCpu, (void *)pu32Src, IEM_ACCESS_DATA_R); 7079 Log9(("IEM RD dword %d|%RGv: %#010x\n", iSegReg, GCPtrMem, u32Ret)); 7073 7080 return u32Ret; 7074 7081 } … … 7124 7131 Assert(pTlbe->pbMappingR3); /* (Only ever cleared by the owning EMT.) */ 7125 7132 Assert(!((uintptr_t)pTlbe->pbMappingR3 & GUEST_PAGE_OFFSET_MASK)); 7126 return *(uint32_t const *)&pTlbe->pbMappingR3[GCPtrEff & GUEST_PAGE_OFFSET_MASK]; 7133 uint32_t const u32Ret = *(uint32_t const *)&pTlbe->pbMappingR3[GCPtrEff & GUEST_PAGE_OFFSET_MASK]; 7134 Log9(("IEM RD dword %d|%RGv: %#010x\n", iSegReg, GCPtrMem, u32Ret)); 7135 return u32Ret; 7127 7136 } 7128 7137 Log10(("iemMemFetchDataU32Jmp: Raising #AC for %RGv\n", GCPtrEff)); … … 7142 7151 uint32_t const u32Ret = *pu32Src; 7143 7152 iemMemCommitAndUnmapJmp(pVCpu, (void *)pu32Src, IEM_ACCESS_DATA_R); 7153 Log9(("IEM RD dword %d|%RGv: %#010x\n", iSegReg, GCPtrMem, u32Ret)); 7144 7154 return u32Ret; 7145 7155 # endif … … 7169 7179 *pu64Dst = *pi32Src; 7170 7180 rc = iemMemCommitAndUnmap(pVCpu, (void *)pi32Src, IEM_ACCESS_DATA_R); 7181 Log9(("IEM RD dword %d|%RGv: %#010x\n", iSegReg, GCPtrMem, (uint32_t)*pu64Dst)); 7171 7182 } 7172 7183 #ifdef __GNUC__ /* warning: GCC may be a royal pain */ … … 7199 7210 *pu64Dst = *pu64Src; 7200 7211 rc = iemMemCommitAndUnmap(pVCpu, (void *)pu64Src, IEM_ACCESS_DATA_R); 7212 Log9(("IEM RD qword %d|%RGv: %#018RX64\n", iSegReg, GCPtrMem, *pu64Dst)); 7201 7213 } 7202 7214 return rc; … … 7221 7233 uint64_t const u64Ret = *pu64Src; 7222 7234 iemMemCommitAndUnmapJmp(pVCpu, (void *)pu64Src, IEM_ACCESS_DATA_R); 7235 Log9(("IEM RD qword %d|%RGv: %#018RX64\n", iSegReg, GCPtrMem, u64Ret)); 7223 7236 return u64Ret; 7224 7237 } … … 7246 7259 *pu64Dst = *pu64Src; 7247 7260 rc = iemMemCommitAndUnmap(pVCpu, (void *)pu64Src, IEM_ACCESS_DATA_R); 7261 Log9(("IEM RD qword %d|%RGv: %#018RX64\n", iSegReg, GCPtrMem, *pu64Dst)); 7248 7262 } 7249 7263 return rc; … … 7268 7282 uint64_t const u64Ret = *pu64Src; 7269 7283 iemMemCommitAndUnmapJmp(pVCpu, (void *)pu64Src, IEM_ACCESS_DATA_R); 7284 Log9(("IEM RD qword %d|%RGv: %#018RX64\n", iSegReg, GCPtrMem, u64Ret)); 7270 7285 return u64Ret; 7271 7286 } … … 7292 7307 *pr80Dst = *pr80Src; 7293 7308 rc = iemMemCommitAndUnmap(pVCpu, (void *)pr80Src, IEM_ACCESS_DATA_R); 7309 Log9(("IEM RD tword %d|%RGv: %.10Rhxs\n", iSegReg, GCPtrMem, pr80Dst)); 7294 7310 } 7295 7311 return rc; … … 7313 7329 *pr80Dst = *pr80Src; 7314 7330 iemMemCommitAndUnmapJmp(pVCpu, (void *)pr80Src, IEM_ACCESS_DATA_R); 7331 Log9(("IEM RD tword %d|%RGv: %.10Rhxs\n", iSegReg, GCPtrMem, pr80Dst)); 7315 7332 } 7316 7333 #endif … … 7337 7354 *pd80Dst = *pd80Src; 7338 7355 rc = iemMemCommitAndUnmap(pVCpu, (void *)pd80Src, IEM_ACCESS_DATA_R); 7356 Log9(("IEM RD tword %d|%RGv: %.10Rhxs\n", iSegReg, GCPtrMem, pd80Dst)); 7339 7357 } 7340 7358 return rc; … … 7359 7377 *pd80Dst = *pd80Src; 7360 7378 iemMemCommitAndUnmapJmp(pVCpu, (void *)pd80Src, IEM_ACCESS_DATA_R); 7379 Log9(("IEM RD tword %d|%RGv: %.10Rhxs\n", iSegReg, GCPtrMem, pd80Dst)); 7361 7380 } 7362 7381 #endif … … 7384 7403 pu128Dst->au64[1] = pu128Src->au64[1]; 7385 7404 rc = iemMemCommitAndUnmap(pVCpu, (void *)pu128Src, IEM_ACCESS_DATA_R); 7405 Log9(("IEM RD dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst)); 7386 7406 } 7387 7407 return rc; … … 7407 7427 pu128Dst->au64[1] = pu128Src->au64[1]; 7408 7428 iemMemCommitAndUnmapJmp(pVCpu, (void *)pu128Src, IEM_ACCESS_DATA_R); 7429 Log9(("IEM RD dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst)); 7409 7430 } 7410 7431 #endif … … 7435 7456 pu128Dst->au64[1] = pu128Src->au64[1]; 7436 7457 rc = iemMemCommitAndUnmap(pVCpu, (void *)pu128Src, IEM_ACCESS_DATA_R); 7458 Log9(("IEM RD dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst)); 7437 7459 } 7438 7460 return rc; … … 7462 7484 pu128Dst->au64[1] = pu128Src->au64[1]; 7463 7485 iemMemCommitAndUnmapJmp(pVCpu, (void *)pu128Src, IEM_ACCESS_DATA_R); 7486 Log9(("IEM RD dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst)); 7464 7487 } 7465 7488 #endif … … 7489 7512 pu256Dst->au64[3] = pu256Src->au64[3]; 7490 7513 rc = iemMemCommitAndUnmap(pVCpu, (void *)pu256Src, IEM_ACCESS_DATA_R); 7514 Log9(("IEM RD qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst)); 7491 7515 } 7492 7516 return rc; … … 7514 7538 pu256Dst->au64[3] = pu256Src->au64[3]; 7515 7539 iemMemCommitAndUnmapJmp(pVCpu, (void *)pu256Src, IEM_ACCESS_DATA_R); 7540 Log9(("IEM RD qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst)); 7516 7541 } 7517 7542 #endif … … 7544 7569 pu256Dst->au64[3] = pu256Src->au64[3]; 7545 7570 rc = iemMemCommitAndUnmap(pVCpu, (void *)pu256Src, IEM_ACCESS_DATA_R); 7571 Log9(("IEM RD qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst)); 7546 7572 } 7547 7573 return rc; … … 7573 7599 pu256Dst->au64[3] = pu256Src->au64[3]; 7574 7600 iemMemCommitAndUnmapJmp(pVCpu, (void *)pu256Src, IEM_ACCESS_DATA_R); 7601 Log9(("IEM RD qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst)); 7575 7602 } 7576 7603 #endif … … 7669 7696 *pu8Dst = u8Value; 7670 7697 rc = iemMemCommitAndUnmap(pVCpu, pu8Dst, IEM_ACCESS_DATA_W); 7698 Log8(("IEM WR byte %d|%RGv: %#04x\n", iSegReg, GCPtrMem, u8Value)); 7671 7699 } 7672 7700 return rc; … … 7687 7715 { 7688 7716 /* The lazy approach for now... */ 7717 Log8(("IEM WR byte %d|%RGv: %#04x\n", iSegReg, GCPtrMem, u8Value)); 7689 7718 uint8_t *pu8Dst = (uint8_t *)iemMemMapJmp(pVCpu, sizeof(*pu8Dst), iSegReg, GCPtrMem, IEM_ACCESS_DATA_W, 0); 7690 7719 *pu8Dst = u8Value; … … 7714 7743 *pu16Dst = u16Value; 7715 7744 rc = iemMemCommitAndUnmap(pVCpu, pu16Dst, IEM_ACCESS_DATA_W); 7745 Log8(("IEM WR word %d|%RGv: %#06x\n", iSegReg, GCPtrMem, u16Value)); 7716 7746 } 7717 7747 return rc; … … 7736 7766 *pu16Dst = u16Value; 7737 7767 iemMemCommitAndUnmapJmp(pVCpu, pu16Dst, IEM_ACCESS_DATA_W); 7768 Log8(("IEM WR word %d|%RGv: %#06x\n", iSegReg, GCPtrMem, u16Value)); 7738 7769 } 7739 7770 #endif … … 7760 7791 *pu32Dst = u32Value; 7761 7792 rc = iemMemCommitAndUnmap(pVCpu, pu32Dst, IEM_ACCESS_DATA_W); 7793 Log8(("IEM WR dword %d|%RGv: %#010x\n", iSegReg, GCPtrMem, u32Value)); 7762 7794 } 7763 7795 return rc; … … 7783 7815 *pu32Dst = u32Value; 7784 7816 iemMemCommitAndUnmapJmp(pVCpu, pu32Dst, IEM_ACCESS_DATA_W); 7817 Log8(("IEM WR dword %d|%RGv: %#010x\n", iSegReg, GCPtrMem, u32Value)); 7785 7818 } 7786 7819 #endif … … 7807 7840 *pu64Dst = u64Value; 7808 7841 rc = iemMemCommitAndUnmap(pVCpu, pu64Dst, IEM_ACCESS_DATA_W); 7842 Log8(("IEM WR qword %d|%RGv: %#018RX64\n", iSegReg, GCPtrMem, u64Value)); 7809 7843 } 7810 7844 return rc; … … 7829 7863 *pu64Dst = u64Value; 7830 7864 iemMemCommitAndUnmapJmp(pVCpu, pu64Dst, IEM_ACCESS_DATA_W); 7865 Log8(("IEM WR qword %d|%RGv: %#018RX64\n", iSegReg, GCPtrMem, u64Value)); 7831 7866 } 7832 7867 #endif … … 7854 7889 pu128Dst->au64[1] = u128Value.au64[1]; 7855 7890 rc = iemMemCommitAndUnmap(pVCpu, pu128Dst, IEM_ACCESS_DATA_W); 7891 Log8(("IEM WR dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst)); 7856 7892 } 7857 7893 return rc; … … 7877 7913 pu128Dst->au64[1] = u128Value.au64[1]; 7878 7914 iemMemCommitAndUnmapJmp(pVCpu, pu128Dst, IEM_ACCESS_DATA_W); 7915 Log8(("IEM WR dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst)); 7879 7916 } 7880 7917 #endif … … 7902 7939 pu128Dst->au64[1] = u128Value.au64[1]; 7903 7940 rc = iemMemCommitAndUnmap(pVCpu, pu128Dst, IEM_ACCESS_DATA_W); 7941 Log8(("IEM WR dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst)); 7904 7942 } 7905 7943 return rc; … … 7927 7965 pu128Dst->au64[1] = u128Value.au64[1]; 7928 7966 iemMemCommitAndUnmapJmp(pVCpu, pu128Dst, IEM_ACCESS_DATA_W); 7967 Log8(("IEM WR dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst)); 7929 7968 } 7930 7969 #endif … … 7954 7993 pu256Dst->au64[3] = pu256Value->au64[3]; 7955 7994 rc = iemMemCommitAndUnmap(pVCpu, pu256Dst, IEM_ACCESS_DATA_W); 7995 Log8(("IEM WR qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst)); 7956 7996 } 7957 7997 return rc; … … 7979 8019 pu256Dst->au64[3] = pu256Value->au64[3]; 7980 8020 iemMemCommitAndUnmapJmp(pVCpu, pu256Dst, IEM_ACCESS_DATA_W); 8021 Log8(("IEM WR qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst)); 7981 8022 } 7982 8023 #endif … … 8006 8047 pu256Dst->au64[3] = pu256Value->au64[3]; 8007 8048 rc = iemMemCommitAndUnmap(pVCpu, pu256Dst, IEM_ACCESS_DATA_W); 8049 Log8(("IEM WR qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst)); 8008 8050 } 8009 8051 return rc; … … 8033 8075 pu256Dst->au64[3] = pu256Value->au64[3]; 8034 8076 iemMemCommitAndUnmapJmp(pVCpu, pu256Dst, IEM_ACCESS_DATA_W); 8077 Log8(("IEM WR qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst)); 8035 8078 } 8036 8079 #endif
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