Changeset 100826 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Aug 9, 2023 1:57:40 AM (18 months ago)
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
r100607 r100826 1034 1034 1035 1035 1036 IEM_DECL_IMPL_DEF(void, iemAImpl_cmp_u8,(uint8_t *puDst, uint8_t uSrc, uint32_t *pfEFlags))1036 IEM_DECL_IMPL_DEF(void, iemAImpl_cmp_u8,(uint8_t const *puDst, uint8_t uSrc, uint32_t *pfEFlags)) 1037 1037 { 1038 1038 uint8_t uDstTmp = *puDst; … … 1068 1068 1069 1069 1070 IEM_DECL_IMPL_DEF(void, iemAImpl_test_u8,(uint8_t *puDst, uint8_t uSrc, uint32_t *pfEFlags))1070 IEM_DECL_IMPL_DEF(void, iemAImpl_test_u8,(uint8_t const *puDst, uint8_t uSrc, uint32_t *pfEFlags)) 1071 1071 { 1072 1072 uint8_t uResult = *puDst & uSrc; -
trunk/src/VBox/VMM/VMMAll/IEMAllInstOneByte.cpp.h
r100804 r100826 63 63 * Used with IEMOP_BODY_BINARY_rm_r8_NO_LOCK or IEMOP_BODY_BINARY_rm_r8_LOCKED. 64 64 */ 65 #define IEMOP_BODY_BINARY_rm_r8 (a_fnNormalU8, a_fRW) \65 #define IEMOP_BODY_BINARY_rm_r8_RW(a_fnNormalU8) \ 66 66 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); \ 67 67 \ … … 94 94 if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK)) \ 95 95 { \ 96 IEM_MC_BEGIN(3, 2); \96 IEM_MC_BEGIN(3, 3); \ 97 97 IEM_MC_ARG(uint8_t *, pu8Dst, 0); \ 98 98 IEM_MC_ARG(uint8_t, u8Src, 1); \ 99 99 IEM_MC_ARG_LOCAL_EFLAGS(pEFlags, EFlags, 2); \ 100 100 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 101 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 101 102 \ 102 103 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 103 104 IEMOP_HLP_DONE_DECODING(); \ 104 IEM_MC_MEM_MAP (pu8Dst, a_fRW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \105 IEM_MC_MEM_MAP_U8_RW(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 105 106 IEM_MC_FETCH_GREG_U8(u8Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 106 107 IEM_MC_FETCH_EFLAGS(EFlags); \ 107 108 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU8, pu8Dst, u8Src, pEFlags); \ 108 109 \ 109 IEM_MC_MEM_COMMIT_AND_UNMAP (pu8Dst, a_fRW); \110 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu8Dst, bUnmapInfo); \ 110 111 IEM_MC_COMMIT_EFLAGS(EFlags); \ 111 112 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 116 117 (void)0 117 118 119 /** 120 * Body for instructions like TEST & CMP, ++ with a byte memory/registers as 121 * operands. 122 * 123 * Used with IEMOP_BODY_BINARY_rm_r8_NO_LOCK or IEMOP_BODY_BINARY_rm_r8_LOCKED. 124 */ 125 #define IEMOP_BODY_BINARY_rm_r8_RO(a_fnNormalU8) \ 126 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); \ 127 \ 128 /* \ 129 * If rm is denoting a register, no more instruction bytes. \ 130 */ \ 131 if (IEM_IS_MODRM_REG_MODE(bRm)) \ 132 { \ 133 IEM_MC_BEGIN(3, 0); \ 134 IEM_MC_ARG(uint8_t *, pu8Dst, 0); \ 135 IEM_MC_ARG(uint8_t, u8Src, 1); \ 136 IEM_MC_ARG(uint32_t *, pEFlags, 2); \ 137 \ 138 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 139 IEM_MC_FETCH_GREG_U8(u8Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 140 IEM_MC_REF_GREG_U8(pu8Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); \ 141 IEM_MC_REF_EFLAGS(pEFlags); \ 142 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU8, pu8Dst, u8Src, pEFlags); \ 143 \ 144 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 145 IEM_MC_END(); \ 146 } \ 147 else \ 148 { \ 149 /* \ 150 * We're accessing memory. \ 151 * Note! We're putting the eflags on the stack here so we can commit them \ 152 * after the memory. \ 153 */ \ 154 if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK)) \ 155 { \ 156 IEM_MC_BEGIN(3, 3); \ 157 IEM_MC_ARG(uint8_t const *, pu8Dst, 0); \ 158 IEM_MC_ARG(uint8_t, u8Src, 1); \ 159 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 160 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 161 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 162 \ 163 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 164 IEMOP_HLP_DONE_DECODING(); \ 165 IEM_MC_MEM_MAP_U8_RO(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 166 IEM_MC_FETCH_GREG_U8(u8Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 167 IEM_MC_FETCH_EFLAGS(EFlags); \ 168 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU8, pu8Dst, u8Src, pEFlags); \ 169 \ 170 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(pu8Dst, bUnmapInfo); \ 171 IEM_MC_COMMIT_EFLAGS(EFlags); \ 172 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 173 IEM_MC_END(); \ 174 } \ 175 else \ 176 { \ 177 (void)0 178 118 179 #define IEMOP_BODY_BINARY_rm_r8_NO_LOCK() \ 119 180 IEMOP_HLP_DONE_DECODING(); \ … … 124 185 125 186 #define IEMOP_BODY_BINARY_rm_r8_LOCKED(a_fnLockedU8) \ 126 IEM_MC_BEGIN(3, 2); \187 IEM_MC_BEGIN(3, 3); \ 127 188 IEM_MC_ARG(uint8_t *, pu8Dst, 0); \ 128 189 IEM_MC_ARG(uint8_t, u8Src, 1); \ 129 190 IEM_MC_ARG_LOCAL_EFLAGS(pEFlags, EFlags, 2); \ 130 191 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 192 IEM_MC_LOCAL(uint8_t, bMapInfoDst); \ 131 193 \ 132 194 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 133 195 IEMOP_HLP_DONE_DECODING(); \ 134 IEM_MC_MEM_MAP (pu8Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \196 IEM_MC_MEM_MAP_U8_RW(pu8Dst, bMapInfoDst, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 135 197 IEM_MC_FETCH_GREG_U8(u8Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 136 198 IEM_MC_FETCH_EFLAGS(EFlags); \ 137 199 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU8, pu8Dst, u8Src, pEFlags); \ 138 200 \ 139 IEM_MC_MEM_COMMIT_AND_UNMAP (pu8Dst, IEM_ACCESS_DATA_RW); \201 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu8Dst, bMapInfoDst); \ 140 202 IEM_MC_COMMIT_EFLAGS(EFlags); \ 141 203 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 527 589 { 528 590 IEMOP_MNEMONIC2(MR, ADD, add, Eb, Gb, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_LOCK_ALLOWED); 529 IEMOP_BODY_BINARY_rm_r8 ( iemAImpl_add_u8, IEM_ACCESS_DATA_RW);591 IEMOP_BODY_BINARY_rm_r8_RW( iemAImpl_add_u8); 530 592 IEMOP_BODY_BINARY_rm_r8_LOCKED(iemAImpl_add_u8_locked); 531 593 } … … 644 706 IEMOP_MNEMONIC2(MR, OR, or, Eb, Gb, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_LOCK_ALLOWED); 645 707 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF); 646 IEMOP_BODY_BINARY_rm_r8 ( iemAImpl_or_u8, IEM_ACCESS_DATA_RW);708 IEMOP_BODY_BINARY_rm_r8_RW( iemAImpl_or_u8); 647 709 IEMOP_BODY_BINARY_rm_r8_LOCKED(iemAImpl_or_u8_locked); 648 710 } … … 811 873 { 812 874 IEMOP_MNEMONIC2(MR, ADC, adc, Eb, Gb, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_LOCK_ALLOWED); 813 IEMOP_BODY_BINARY_rm_r8 ( iemAImpl_adc_u8, IEM_ACCESS_DATA_RW);875 IEMOP_BODY_BINARY_rm_r8_RW( iemAImpl_adc_u8); 814 876 IEMOP_BODY_BINARY_rm_r8_LOCKED(iemAImpl_adc_u8_locked); 815 877 } … … 926 988 { 927 989 IEMOP_MNEMONIC2(MR, SBB, sbb, Eb, Gb, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_LOCK_ALLOWED); 928 IEMOP_BODY_BINARY_rm_r8 ( iemAImpl_sbb_u8, IEM_ACCESS_DATA_RW);990 IEMOP_BODY_BINARY_rm_r8_RW( iemAImpl_sbb_u8); 929 991 IEMOP_BODY_BINARY_rm_r8_LOCKED(iemAImpl_sbb_u8_locked); 930 992 } … … 1033 1095 IEMOP_MNEMONIC2(MR, AND, and, Eb, Gb, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_LOCK_ALLOWED); 1034 1096 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF); 1035 IEMOP_BODY_BINARY_rm_r8 ( iemAImpl_and_u8, IEM_ACCESS_DATA_RW);1097 IEMOP_BODY_BINARY_rm_r8_RW( iemAImpl_and_u8); 1036 1098 IEMOP_BODY_BINARY_rm_r8_LOCKED(iemAImpl_and_u8_locked); 1037 1099 } … … 1158 1220 { 1159 1221 IEMOP_MNEMONIC2(MR, SUB, sub, Eb, Gb, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_LOCK_ALLOWED); 1160 IEMOP_BODY_BINARY_rm_r8 ( iemAImpl_sub_u8, IEM_ACCESS_DATA_RW);1222 IEMOP_BODY_BINARY_rm_r8_RW( iemAImpl_sub_u8); 1161 1223 IEMOP_BODY_BINARY_rm_r8_LOCKED(iemAImpl_sub_u8_locked); 1162 1224 } … … 1271 1333 IEMOP_MNEMONIC2(MR, XOR, xor, Eb, Gb, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_LOCK_ALLOWED); 1272 1334 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF); 1273 IEMOP_BODY_BINARY_rm_r8 ( iemAImpl_xor_u8, IEM_ACCESS_DATA_RW);1335 IEMOP_BODY_BINARY_rm_r8_RW( iemAImpl_xor_u8); 1274 1336 IEMOP_BODY_BINARY_rm_r8_LOCKED(iemAImpl_xor_u8_locked); 1275 1337 } … … 1427 1489 { 1428 1490 IEMOP_MNEMONIC(cmp_Eb_Gb, "cmp Eb,Gb"); 1429 IEMOP_BODY_BINARY_rm_r8 (iemAImpl_cmp_u8, IEM_ACCESS_DATA_R);1491 IEMOP_BODY_BINARY_rm_r8_RO(iemAImpl_cmp_u8); 1430 1492 IEMOP_BODY_BINARY_rm_r8_NO_LOCK(); 1431 1493 } … … 3641 3703 * iemOp_Grp1_Eb_Ib_80. 3642 3704 */ 3643 #define IEMOP_BODY_BINARY_Eb_Ib (a_fnNormalU8, a_fRW) \3705 #define IEMOP_BODY_BINARY_Eb_Ib_RW(a_fnNormalU8) \ 3644 3706 if (IEM_IS_MODRM_REG_MODE(bRm)) \ 3645 3707 { \ … … 3664 3726 if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK)) \ 3665 3727 { \ 3666 IEM_MC_BEGIN(3, 2); \3728 IEM_MC_BEGIN(3, 3); \ 3667 3729 IEM_MC_ARG(uint8_t *, pu8Dst, 0); \ 3668 3730 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 3669 3731 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 3732 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 3670 3733 \ 3671 3734 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ … … 3674 3737 IEMOP_HLP_DONE_DECODING(); \ 3675 3738 \ 3676 IEM_MC_MEM_MAP (pu8Dst, a_fRW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \3739 IEM_MC_MEM_MAP_U8_RW(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 3677 3740 IEM_MC_FETCH_EFLAGS(EFlags); \ 3678 3741 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU8, pu8Dst, u8Src, pEFlags); \ 3679 3742 \ 3680 IEM_MC_MEM_COMMIT_AND_UNMAP (pu8Dst, a_fRW); \3743 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu8Dst, bUnmapInfo); \ 3681 3744 IEM_MC_COMMIT_EFLAGS(EFlags); \ 3682 3745 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 3687 3750 (void)0 3688 3751 3752 #define IEMOP_BODY_BINARY_Eb_Ib_LOCKED(a_fnLockedU8) \ 3753 IEM_MC_BEGIN(3, 3); \ 3754 IEM_MC_ARG(uint8_t *, pu8Dst, 0); \ 3755 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 3756 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 3757 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 3758 \ 3759 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 3760 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \ 3761 IEM_MC_ARG_CONST(uint8_t, u8Src, /*=*/ u8Imm, 1); \ 3762 IEMOP_HLP_DONE_DECODING(); \ 3763 \ 3764 IEM_MC_MEM_MAP_U8_RW(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 3765 IEM_MC_FETCH_EFLAGS(EFlags); \ 3766 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU8, pu8Dst, u8Src, pEFlags); \ 3767 \ 3768 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu8Dst, bUnmapInfo); \ 3769 IEM_MC_COMMIT_EFLAGS(EFlags); \ 3770 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 3771 IEM_MC_END(); \ 3772 } \ 3773 } \ 3774 (void)0 3775 3776 #define IEMOP_BODY_BINARY_Eb_Ib_RO(a_fnNormalU8) \ 3777 if (IEM_IS_MODRM_REG_MODE(bRm)) \ 3778 { \ 3779 /* register target */ \ 3780 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \ 3781 IEM_MC_BEGIN(3, 0); \ 3782 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 3783 IEM_MC_ARG(uint8_t *, pu8Dst, 0); \ 3784 IEM_MC_ARG_CONST(uint8_t, u8Src, /*=*/ u8Imm, 1); \ 3785 IEM_MC_ARG(uint32_t *, pEFlags, 2); \ 3786 \ 3787 IEM_MC_REF_GREG_U8(pu8Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); \ 3788 IEM_MC_REF_EFLAGS(pEFlags); \ 3789 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU8, pu8Dst, u8Src, pEFlags); \ 3790 \ 3791 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 3792 IEM_MC_END(); \ 3793 } \ 3794 else \ 3795 { \ 3796 /* memory target */ \ 3797 if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK)) \ 3798 { \ 3799 IEM_MC_BEGIN(3, 3); \ 3800 IEM_MC_ARG(uint8_t const *, pu8Dst, 0); \ 3801 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 3802 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 3803 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 3804 \ 3805 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 3806 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \ 3807 IEM_MC_ARG_CONST(uint8_t, u8Src, /*=*/ u8Imm, 1); \ 3808 IEMOP_HLP_DONE_DECODING(); \ 3809 \ 3810 IEM_MC_MEM_MAP_U8_RO(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 3811 IEM_MC_FETCH_EFLAGS(EFlags); \ 3812 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU8, pu8Dst, u8Src, pEFlags); \ 3813 \ 3814 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(pu8Dst, bUnmapInfo); \ 3815 IEM_MC_COMMIT_EFLAGS(EFlags); \ 3816 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 3817 IEM_MC_END(); \ 3818 } \ 3819 else \ 3820 { \ 3821 (void)0 3822 3689 3823 #define IEMOP_BODY_BINARY_Eb_Ib_NO_LOCK() \ 3690 3824 IEMOP_HLP_DONE_DECODING(); \ … … 3694 3828 (void)0 3695 3829 3696 #define IEMOP_BODY_BINARY_Eb_Ib_LOCKED(a_fnLockedU8) \3697 IEM_MC_BEGIN(3, 2); \3698 IEM_MC_ARG(uint8_t *, pu8Dst, 0); \3699 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \3700 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \3701 \3702 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \3703 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \3704 IEM_MC_ARG_CONST(uint8_t, u8Src, /*=*/ u8Imm, 1); \3705 IEMOP_HLP_DONE_DECODING(); \3706 \3707 IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \3708 IEM_MC_FETCH_EFLAGS(EFlags); \3709 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU8, pu8Dst, u8Src, pEFlags); \3710 \3711 IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Dst, IEM_ACCESS_DATA_RW); \3712 IEM_MC_COMMIT_EFLAGS(EFlags); \3713 IEM_MC_ADVANCE_RIP_AND_FINISH(); \3714 IEM_MC_END(); \3715 } \3716 } \3717 (void)03718 3830 3719 3831 … … 3725 3837 { 3726 3838 IEMOP_MNEMONIC(add_Eb_Ib, "add Eb,Ib"); 3727 IEMOP_BODY_BINARY_Eb_Ib ( iemAImpl_add_u8, IEM_ACCESS_DATA_RW);3839 IEMOP_BODY_BINARY_Eb_Ib_RW( iemAImpl_add_u8); 3728 3840 IEMOP_BODY_BINARY_Eb_Ib_LOCKED(iemAImpl_add_u8_locked); 3729 3841 } … … 3737 3849 { 3738 3850 IEMOP_MNEMONIC(or_Eb_Ib, "or Eb,Ib"); 3739 IEMOP_BODY_BINARY_Eb_Ib ( iemAImpl_or_u8, IEM_ACCESS_DATA_RW);3851 IEMOP_BODY_BINARY_Eb_Ib_RW( iemAImpl_or_u8); 3740 3852 IEMOP_BODY_BINARY_Eb_Ib_LOCKED(iemAImpl_or_u8_locked); 3741 3853 } … … 3749 3861 { 3750 3862 IEMOP_MNEMONIC(adc_Eb_Ib, "adc Eb,Ib"); 3751 IEMOP_BODY_BINARY_Eb_Ib ( iemAImpl_adc_u8, IEM_ACCESS_DATA_RW);3863 IEMOP_BODY_BINARY_Eb_Ib_RW( iemAImpl_adc_u8); 3752 3864 IEMOP_BODY_BINARY_Eb_Ib_LOCKED(iemAImpl_adc_u8_locked); 3753 3865 } … … 3761 3873 { 3762 3874 IEMOP_MNEMONIC(sbb_Eb_Ib, "sbb Eb,Ib"); 3763 IEMOP_BODY_BINARY_Eb_Ib ( iemAImpl_sbb_u8, IEM_ACCESS_DATA_RW);3875 IEMOP_BODY_BINARY_Eb_Ib_RW( iemAImpl_sbb_u8); 3764 3876 IEMOP_BODY_BINARY_Eb_Ib_LOCKED(iemAImpl_sbb_u8_locked); 3765 3877 } … … 3773 3885 { 3774 3886 IEMOP_MNEMONIC(and_Eb_Ib, "and Eb,Ib"); 3775 IEMOP_BODY_BINARY_Eb_Ib ( iemAImpl_and_u8, IEM_ACCESS_DATA_RW);3887 IEMOP_BODY_BINARY_Eb_Ib_RW( iemAImpl_and_u8); 3776 3888 IEMOP_BODY_BINARY_Eb_Ib_LOCKED(iemAImpl_and_u8_locked); 3777 3889 } … … 3785 3897 { 3786 3898 IEMOP_MNEMONIC(sub_Eb_Ib, "sub Eb,Ib"); 3787 IEMOP_BODY_BINARY_Eb_Ib ( iemAImpl_sub_u8, IEM_ACCESS_DATA_RW);3899 IEMOP_BODY_BINARY_Eb_Ib_RW( iemAImpl_sub_u8); 3788 3900 IEMOP_BODY_BINARY_Eb_Ib_LOCKED(iemAImpl_sub_u8_locked); 3789 3901 } … … 3797 3909 { 3798 3910 IEMOP_MNEMONIC(xor_Eb_Ib, "xor Eb,Ib"); 3799 IEMOP_BODY_BINARY_Eb_Ib ( iemAImpl_xor_u8, IEM_ACCESS_DATA_RW);3911 IEMOP_BODY_BINARY_Eb_Ib_RW( iemAImpl_xor_u8); 3800 3912 IEMOP_BODY_BINARY_Eb_Ib_LOCKED(iemAImpl_xor_u8_locked); 3801 3913 } … … 3809 3921 { 3810 3922 IEMOP_MNEMONIC(cmp_Eb_Ib, "cmp Eb,Ib"); 3811 IEMOP_BODY_BINARY_Eb_Ib (iemAImpl_cmp_u8, IEM_ACCESS_DATA_R);3923 IEMOP_BODY_BINARY_Eb_Ib_RO(iemAImpl_cmp_u8); 3812 3924 IEMOP_BODY_BINARY_Eb_Ib_NO_LOCK(); 3813 3925 } … … 4567 4679 IEMOP_MNEMONIC(test_Eb_Gb, "test Eb,Gb"); 4568 4680 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF); 4569 IEMOP_BODY_BINARY_rm_r8 (iemAImpl_test_u8, IEM_ACCESS_DATA_R);4681 IEMOP_BODY_BINARY_rm_r8_RO(iemAImpl_test_u8); 4570 4682 IEMOP_BODY_BINARY_rm_r8_NO_LOCK(); 4571 4683 } … … 4615 4727 * We're accessing memory. 4616 4728 */ 4617 /** @todo the register must be committed separately! */ 4618 IEM_MC_BEGIN(2, 2); 4619 IEM_MC_ARG(uint8_t *, pu8Mem, 0); 4620 IEM_MC_ARG(uint8_t *, pu8Reg, 1); 4729 IEM_MC_BEGIN(2, 4); 4621 4730 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 4731 IEM_MC_LOCAL(uint8_t, bUnmapInfo); 4732 IEM_MC_LOCAL(uint8_t, uTmpReg); 4733 IEM_MC_ARG(uint8_t *, pu8Mem, 0); 4734 IEM_MC_ARG_LOCAL_REF(uint8_t *, pu8Reg, uTmpReg, 1); 4622 4735 4623 4736 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 4624 4737 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4625 IEM_MC_MEM_MAP (pu8Mem, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/);4626 IEM_MC_ REF_GREG_U8(pu8Reg, IEM_GET_MODRM_REG(pVCpu, bRm));4738 IEM_MC_MEM_MAP_U8_RW(pu8Mem, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 4739 IEM_MC_FETCH_GREG_U8(uTmpReg, IEM_GET_MODRM_REG(pVCpu, bRm)); 4627 4740 if (!(pVCpu->iem.s.fExec & IEM_F_X86_DISREGARD_LOCK)) 4628 4741 IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u8_locked, pu8Mem, pu8Reg); 4629 4742 else 4630 4743 IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u8_unlocked, pu8Mem, pu8Reg); 4631 IEM_MC_MEM_COMMIT_AND_UNMAP(pu8Mem, IEM_ACCESS_DATA_RW); 4744 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu8Mem, bUnmapInfo); 4745 IEM_MC_STORE_GREG_U8(IEM_GET_MODRM_REG(pVCpu, bRm), uTmpReg); 4632 4746 4633 4747 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 7092 7206 { 7093 7207 /* memory */ 7094 IEM_MC_BEGIN(3, 2);7208 IEM_MC_BEGIN(3, 3); 7095 7209 IEM_MC_ARG(uint8_t *, pu8Dst, 0); 7096 7210 IEM_MC_ARG(uint8_t, cShiftArg, 1); 7097 7211 IEM_MC_ARG_LOCAL_EFLAGS(pEFlags, EFlags, 2); 7098 7212 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 7213 IEM_MC_LOCAL(uint8_t, bUnmapInfo); 7099 7214 7100 7215 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); … … 7102 7217 IEM_MC_ASSIGN(cShiftArg, cShift); 7103 7218 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 7104 IEM_MC_MEM_MAP (pu8Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/);7219 IEM_MC_MEM_MAP_U8_RW(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 7105 7220 IEM_MC_FETCH_EFLAGS(EFlags); 7106 7221 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags); 7107 7222 7108 IEM_MC_MEM_COMMIT_AND_UNMAP (pu8Dst, IEM_ACCESS_DATA_RW);7223 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu8Dst, bUnmapInfo); 7109 7224 IEM_MC_COMMIT_EFLAGS(EFlags); 7110 7225 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 7688 7803 { 7689 7804 /* memory */ 7690 IEM_MC_BEGIN(3, 2);7805 IEM_MC_BEGIN(3, 3); 7691 7806 IEM_MC_ARG(uint8_t *, pu8Dst, 0); 7692 7807 IEM_MC_ARG_CONST(uint8_t, cShiftArg,/*=*/1, 1); 7693 7808 IEM_MC_ARG_LOCAL_EFLAGS(pEFlags, EFlags, 2); 7694 7809 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 7810 IEM_MC_LOCAL(uint8_t, bUnmapInfo); 7695 7811 7696 7812 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 7697 7813 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 7698 IEM_MC_MEM_MAP (pu8Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/);7814 IEM_MC_MEM_MAP_U8_RW(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 7699 7815 IEM_MC_FETCH_EFLAGS(EFlags); 7700 7816 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags); 7701 7817 7702 IEM_MC_MEM_COMMIT_AND_UNMAP (pu8Dst, IEM_ACCESS_DATA_RW);7818 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu8Dst, bUnmapInfo); 7703 7819 IEM_MC_COMMIT_EFLAGS(EFlags); 7704 7820 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 7885 8001 { 7886 8002 /* memory */ 7887 IEM_MC_BEGIN(3, 2);8003 IEM_MC_BEGIN(3, 3); 7888 8004 IEM_MC_ARG(uint8_t *, pu8Dst, 0); 7889 8005 IEM_MC_ARG(uint8_t, cShiftArg, 1); 7890 8006 IEM_MC_ARG_LOCAL_EFLAGS(pEFlags, EFlags, 2); 7891 8007 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 8008 IEM_MC_LOCAL(uint8_t, bUnmapInfo); 7892 8009 7893 8010 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 7894 8011 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 7895 8012 IEM_MC_FETCH_GREG_U8(cShiftArg, X86_GREG_xCX); 7896 IEM_MC_MEM_MAP (pu8Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/);8013 IEM_MC_MEM_MAP_U8_RW(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 7897 8014 IEM_MC_FETCH_EFLAGS(EFlags); 7898 8015 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags); 7899 8016 7900 IEM_MC_MEM_COMMIT_AND_UNMAP (pu8Dst, IEM_ACCESS_DATA_RW);8017 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu8Dst, bUnmapInfo); 7901 8018 IEM_MC_COMMIT_EFLAGS(EFlags); 7902 8019 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 11813 11930 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 1); \ 11814 11931 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 11932 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 11815 11933 \ 11816 11934 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \ 11817 11935 IEMOP_HLP_DONE_DECODING(); \ 11818 IEM_MC_MEM_MAP (pu8Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \11936 IEM_MC_MEM_MAP_U8_RW(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 11819 11937 IEM_MC_FETCH_EFLAGS(EFlags); \ 11820 11938 IEM_MC_CALL_VOID_AIMPL_2(a_fnNormalU8, pu8Dst, pEFlags); \ 11821 11939 \ 11822 IEM_MC_MEM_COMMIT_AND_UNMAP (pu8Dst, IEM_ACCESS_DATA_RW); \11940 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu8Dst, bUnmapInfo); \ 11823 11941 IEM_MC_COMMIT_EFLAGS(EFlags); \ 11824 11942 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 11831 11949 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 1); \ 11832 11950 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 11951 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 11833 11952 \ 11834 11953 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \ 11835 11954 IEMOP_HLP_DONE_DECODING(); \ 11836 IEM_MC_MEM_MAP (pu8Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \11955 IEM_MC_MEM_MAP_U8_RW(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 11837 11956 IEM_MC_FETCH_EFLAGS(EFlags); \ 11838 11957 IEM_MC_CALL_VOID_AIMPL_2(a_fnLockedU8, pu8Dst, pEFlags); \ 11839 11958 \ 11840 IEM_MC_MEM_COMMIT_AND_UNMAP (pu8Dst, IEM_ACCESS_DATA_RW); \11959 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu8Dst, bUnmapInfo); \ 11841 11960 IEM_MC_COMMIT_EFLAGS(EFlags); \ 11842 11961 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 12060 12179 { 12061 12180 /* memory access. */ 12062 IEM_MC_BEGIN(3, 2);12063 IEM_MC_ARG(uint8_t *,pu8Dst, 0);12181 IEM_MC_BEGIN(3, 3); 12182 IEM_MC_ARG(uint8_t const *, pu8Dst, 0); 12064 12183 IEM_MC_ARG(uint8_t, u8Src, 1); 12065 12184 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); 12066 12185 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 12186 IEM_MC_LOCAL(uint8_t, bUnmapInfo); 12067 12187 12068 12188 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); … … 12070 12190 IEM_MC_ASSIGN(u8Src, u8Imm); 12071 12191 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12072 IEM_MC_MEM_MAP (pu8Dst, IEM_ACCESS_DATA_R, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/);12192 IEM_MC_MEM_MAP_U8_RO(pu8Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 12073 12193 IEM_MC_FETCH_EFLAGS(EFlags); 12074 12194 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u8, pu8Dst, u8Src, pEFlags); 12075 12195 12076 IEM_MC_MEM_COMMIT_AND_UNMAP (pu8Dst, IEM_ACCESS_DATA_R);12196 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(pu8Dst, bUnmapInfo); 12077 12197 IEM_MC_COMMIT_EFLAGS(EFlags); 12078 12198 IEM_MC_ADVANCE_RIP_AND_FINISH(); -
trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r100753 r100826 2801 2801 'IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE': (McBlock.parseMcGeneric, True), 2802 2802 'IEM_MC_MEM_COMMIT_AND_UNMAP': (McBlock.parseMcGeneric, True), 2803 'IEM_MC_MEM_COMMIT_AND_UNMAP_RW': (McBlock.parseMcGeneric, True), 2804 'IEM_MC_MEM_COMMIT_AND_UNMAP_RO': (McBlock.parseMcGeneric, True), 2805 'IEM_MC_MEM_COMMIT_AND_UNMAP_WO': (McBlock.parseMcGeneric, True), 2803 2806 'IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE': (McBlock.parseMcGeneric, True), 2804 2807 'IEM_MC_MEM_MAP': (McBlock.parseMcGeneric, True), 2805 2808 'IEM_MC_MEM_MAP_EX': (McBlock.parseMcGeneric, True), 2809 'IEM_MC_MEM_MAP_U8_RW': (McBlock.parseMcGeneric, True), 2810 'IEM_MC_MEM_MAP_U8_RO': (McBlock.parseMcGeneric, True), 2811 'IEM_MC_MEM_MAP_U8_WO': (McBlock.parseMcGeneric, True), 2812 'IEM_MC_MEM_MAP_U16_RW': (McBlock.parseMcGeneric, True), 2813 'IEM_MC_MEM_MAP_U16_RO': (McBlock.parseMcGeneric, True), 2814 'IEM_MC_MEM_MAP_U16_WO': (McBlock.parseMcGeneric, True), 2815 'IEM_MC_MEM_MAP_U32_RW': (McBlock.parseMcGeneric, True), 2816 'IEM_MC_MEM_MAP_U32_RO': (McBlock.parseMcGeneric, True), 2817 'IEM_MC_MEM_MAP_U32_WO': (McBlock.parseMcGeneric, True), 2818 'IEM_MC_MEM_MAP_U64_RW': (McBlock.parseMcGeneric, True), 2819 'IEM_MC_MEM_MAP_U64_RO': (McBlock.parseMcGeneric, True), 2820 'IEM_MC_MEM_MAP_U64_WO': (McBlock.parseMcGeneric, True), 2806 2821 'IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX': (McBlock.parseMcGeneric, True), 2807 2822 'IEM_MC_MERGE_YREG_U64_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True), -
trunk/src/VBox/VMM/VMMAll/IEMAllMemRWTmpl.cpp.h
r100822 r100826 100 100 /* The lazy approach for now... */ 101 101 TMPL_MEM_TYPE *puDst; 102 VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&puDst, sizeof(*puDst), iSegReg, GCPtrMem, IEM_ACCESS_DATA_W, 0);102 VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&puDst, sizeof(*puDst), iSegReg, GCPtrMem, IEM_ACCESS_DATA_W, TMPL_MEM_TYPE_ALIGN); 103 103 if (rc == VINF_SUCCESS) 104 104 { … … 128 128 # endif 129 129 Log8(("IEM WR " TMPL_MEM_FMT_DESC " %d|%RGv: " TMPL_MEM_FMT_TYPE "\n", iSegReg, GCPtrMem, uValue)); 130 TMPL_MEM_TYPE *puDst = (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, sizeof(*puDst), iSegReg, GCPtrMem, IEM_ACCESS_DATA_W, 0); 130 TMPL_MEM_TYPE *puDst = (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, sizeof(*puDst), iSegReg, GCPtrMem, 131 IEM_ACCESS_DATA_W, TMPL_MEM_TYPE_ALIGN); 131 132 *puDst = uValue; 132 133 iemMemCommitAndUnmapJmp(pVCpu, puDst, IEM_ACCESS_DATA_W); 133 134 } 135 #endif /* IEM_WITH_SETJMP */ 136 137 138 #ifdef IEM_WITH_SETJMP 139 140 /** 141 * Maps a data buffer for read+write direct access (or via a bounce buffer), 142 * longjmp on error. 143 * 144 * @param pVCpu The cross context virtual CPU structure of the calling thread. 145 * @param pbUnmapInfo Pointer to unmap info variable. 146 * @param iSegReg The index of the segment register to use for 147 * this access. The base and limits are checked. 148 * @param GCPtrMem The address of the guest memory. 149 */ 150 TMPL_MEM_TYPE * 151 RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,RwSafeJmp)(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, 152 uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP 153 { 154 # if defined(IEM_WITH_DATA_TLB) && defined(IN_RING3) 155 pVCpu->iem.s.DataTlb.cTlbSafeWritePath++; 156 # endif 157 Log8(("IEM RW/map " TMPL_MEM_FMT_DESC " %d|%RGv\n", iSegReg, GCPtrMem)); 158 *pbUnmapInfo = 1 | ((IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE) << 4); /* zero is for the TLB hit */ 159 return (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, sizeof(TMPL_MEM_TYPE), iSegReg, GCPtrMem, IEM_ACCESS_DATA_RW, TMPL_MEM_TYPE_ALIGN); 160 } 161 162 163 /** 164 * Maps a data buffer for writeonly direct access (or via a bounce buffer), 165 * longjmp on error. 166 * 167 * @param pVCpu The cross context virtual CPU structure of the calling thread. 168 * @param pbUnmapInfo Pointer to unmap info variable. 169 * @param iSegReg The index of the segment register to use for 170 * this access. The base and limits are checked. 171 * @param GCPtrMem The address of the guest memory. 172 */ 173 TMPL_MEM_TYPE * 174 RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,WoSafeJmp)(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, 175 uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP 176 { 177 # if defined(IEM_WITH_DATA_TLB) && defined(IN_RING3) 178 pVCpu->iem.s.DataTlb.cTlbSafeWritePath++; 179 # endif 180 Log8(("IEM WO/map " TMPL_MEM_FMT_DESC " %d|%RGv\n", iSegReg, GCPtrMem)); 181 *pbUnmapInfo = 1 | (IEM_ACCESS_TYPE_WRITE << 4); /* zero is for the TLB hit */ 182 return (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, sizeof(TMPL_MEM_TYPE), iSegReg, GCPtrMem, IEM_ACCESS_DATA_W, TMPL_MEM_TYPE_ALIGN); 183 } 184 185 186 /** 187 * Maps a data buffer for readonly direct access (or via a bounce buffer), 188 * longjmp on error. 189 * 190 * @param pVCpu The cross context virtual CPU structure of the calling thread. 191 * @param pbUnmapInfo Pointer to unmap info variable. 192 * @param iSegReg The index of the segment register to use for 193 * this access. The base and limits are checked. 194 * @param GCPtrMem The address of the guest memory. 195 */ 196 TMPL_MEM_TYPE const * 197 RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,RoSafeJmp)(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, 198 uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP 199 { 200 # if defined(IEM_WITH_DATA_TLB) && defined(IN_RING3) 201 pVCpu->iem.s.DataTlb.cTlbSafeWritePath++; 202 # endif 203 Log8(("IEM WO/map " TMPL_MEM_FMT_DESC " %d|%RGv\n", iSegReg, GCPtrMem)); 204 *pbUnmapInfo = 1 | (IEM_ACCESS_TYPE_READ << 4); /* zero is for the TLB hit */ 205 return (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, sizeof(TMPL_MEM_TYPE), iSegReg, GCPtrMem, IEM_ACCESS_DATA_R, TMPL_MEM_TYPE_ALIGN); 206 } 207 134 208 #endif /* IEM_WITH_SETJMP */ 135 209 -
trunk/src/VBox/VMM/VMMAll/IEMAllMemRWTmplInline.cpp.h
r100822 r100826 50 50 51 51 #ifdef IEM_WITH_SETJMP 52 53 /********************************************************************************************************************************* 54 * Fetches * 55 *********************************************************************************************************************************/ 52 56 53 57 /** … … 196 200 } 197 201 202 203 /********************************************************************************************************************************* 204 * Stores * 205 *********************************************************************************************************************************/ 198 206 # ifndef TMPL_MEM_NO_STORE 199 207 … … 348 356 # endif /* !TMPL_MEM_NO_STORE */ 349 357 358 359 /********************************************************************************************************************************* 360 * Mapping / Direct Memory Access * 361 *********************************************************************************************************************************/ 362 # ifndef TMPL_MEM_NO_MAPPING 363 364 /** 365 * Inlined read-write memory mapping function that longjumps on error. 366 */ 367 DECL_INLINE_THROW(TMPL_MEM_TYPE *) 368 RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,RwJmp)(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, 369 uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP 370 { 371 return RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,RwSafeJmp)(pVCpu, pbUnmapInfo, iSegReg, GCPtrMem); 372 } 373 374 375 /** 376 * Inlined flat read-write memory mapping function that longjumps on error. 377 */ 378 DECL_INLINE_THROW(TMPL_MEM_TYPE *) 379 RT_CONCAT3(iemMemFlatMapData,TMPL_MEM_FN_SUFF,RwJmp)(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, 380 RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP 381 { 382 return RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,RwSafeJmp)(pVCpu, pbUnmapInfo, UINT8_MAX, GCPtrMem); 383 } 384 385 386 /** 387 * Inlined write-only memory mapping function that longjumps on error. 388 */ 389 DECL_INLINE_THROW(TMPL_MEM_TYPE *) 390 RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,WoJmp)(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, 391 uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP 392 { 393 return RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,WoSafeJmp)(pVCpu, pbUnmapInfo, iSegReg, GCPtrMem); 394 } 395 396 397 /** 398 * Inlined flat write-only memory mapping function that longjumps on error. 399 */ 400 DECL_INLINE_THROW(TMPL_MEM_TYPE *) 401 RT_CONCAT3(iemMemFlatMapData,TMPL_MEM_FN_SUFF,WoJmp)(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, 402 RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP 403 { 404 return RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,WoSafeJmp)(pVCpu, pbUnmapInfo, UINT8_MAX, GCPtrMem); 405 } 406 407 408 /** 409 * Inlined read-only memory mapping function that longjumps on error. 410 */ 411 DECL_INLINE_THROW(TMPL_MEM_TYPE const *) 412 RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,RoJmp)(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, 413 uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP 414 { 415 return RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,RoSafeJmp)(pVCpu, pbUnmapInfo, iSegReg, GCPtrMem); 416 } 417 418 419 /** 420 * Inlined read-only memory mapping function that longjumps on error. 421 */ 422 DECL_INLINE_THROW(TMPL_MEM_TYPE const *) 423 RT_CONCAT3(iemMemFlatMapData,TMPL_MEM_FN_SUFF,RoJmp)(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, 424 RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP 425 { 426 return RT_CONCAT3(iemMemMapData,TMPL_MEM_FN_SUFF,RoSafeJmp)(pVCpu, pbUnmapInfo, UINT8_MAX, GCPtrMem); 427 } 428 429 # endif /* !TMPL_MEM_NO_MAPPING */ 430 431 350 432 #endif /* IEM_WITH_SETJMP */ 351 433 -
trunk/src/VBox/VMM/VMMAll/IEMAllThrdPython.py
r100811 r100826 489 489 'IEM_MC_POP_EX_U64': ( -1, 'IEM_MC_FLAT_POP_EX_U64' ), 490 490 'IEM_MC_MEM_MAP': ( 2, 'IEM_MC_MEM_FLAT_MAP' ), 491 'IEM_MC_MEM_MAP_U8_RW': ( 2, 'IEM_MC_MEM_FLAT_MAP_U8_RW' ), 492 'IEM_MC_MEM_MAP_U8_RO': ( 2, 'IEM_MC_MEM_FLAT_MAP_U8_RO' ), 493 'IEM_MC_MEM_MAP_U8_WO': ( 2, 'IEM_MC_MEM_FLAT_MAP_U8_WO' ), 494 'IEM_MC_MEM_MAP_U16_RW': ( 2, 'IEM_MC_MEM_FLAT_MAP_U16_RW' ), 495 'IEM_MC_MEM_MAP_U16_RO': ( 2, 'IEM_MC_MEM_FLAT_MAP_U16_RO' ), 496 'IEM_MC_MEM_MAP_U16_WO': ( 2, 'IEM_MC_MEM_FLAT_MAP_U16_WO' ), 497 'IEM_MC_MEM_MAP_U32_RW': ( 2, 'IEM_MC_MEM_FLAT_MAP_U32_RW' ), 498 'IEM_MC_MEM_MAP_U32_RO': ( 2, 'IEM_MC_MEM_FLAT_MAP_U32_RO' ), 499 'IEM_MC_MEM_MAP_U32_WO': ( 2, 'IEM_MC_MEM_FLAT_MAP_U32_WO' ), 500 'IEM_MC_MEM_MAP_U64_RW': ( 2, 'IEM_MC_MEM_FLAT_MAP_U64_RW' ), 501 'IEM_MC_MEM_MAP_U64_RO': ( 2, 'IEM_MC_MEM_FLAT_MAP_U64_RO' ), 502 'IEM_MC_MEM_MAP_U64_WO': ( 2, 'IEM_MC_MEM_FLAT_MAP_U64_WO' ), 491 503 'IEM_MC_MEM_MAP_EX': ( 3, 'IEM_MC_MEM_FLAT_MAP_EX' ), 492 504 };
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